Hi synonymous, Kanwar and others
The dual die laterals from semelab are not that easy to use.
The problem you are having is related to lead inductance and can be fixed a number of ways...
The problem also gets worse when you start to parallel these devices.
They will be oscillating at around the >50mhz range
This causes the distortion in the wave form and also gets worse as your load impedance drops.
Try some of these fixes.
1. solder 22pf 100v monolithic ceramic caps across Gate/Drain on the N-channel devices.
2. decouple each mosfet with the same cap from the Drain pin to power ground of each device, Low ESR electros of around 100uf at this point can also help.
3. Use at least 820 Ohms on the N-channel Gates and 470 Ohms on the P-channel.
Forget the Application notes from NS relating to using the LM4702 with laterals, some of it is helpful, but alot is not helpful when using these dual die devices.
PCB layout will also have a large influence on the performace of these devices.
Regarding the biasing, in IMHO use as little as you need to get rid of Cross over distortion.
I have used as little as 60ma per single die device.
This will need to be doubled with dual die devices.
I have not observed any problems relating to thermal drift when using this or less amount of bias.
I hope this has been helpful.
Just as a final note, these fixes are a result of 3 years R&D and many of these amplifiers built with these dual die devices.
Others may have confilicting advice which may help, but these fixes have been developed based on my topologies and PCB layouts and may not apply to your pcb layouts or Randy slones designs.
The dual die laterals from semelab are not that easy to use.
The problem you are having is related to lead inductance and can be fixed a number of ways...
The problem also gets worse when you start to parallel these devices.
They will be oscillating at around the >50mhz range
This causes the distortion in the wave form and also gets worse as your load impedance drops.
Try some of these fixes.
1. solder 22pf 100v monolithic ceramic caps across Gate/Drain on the N-channel devices.
2. decouple each mosfet with the same cap from the Drain pin to power ground of each device, Low ESR electros of around 100uf at this point can also help.
3. Use at least 820 Ohms on the N-channel Gates and 470 Ohms on the P-channel.
Forget the Application notes from NS relating to using the LM4702 with laterals, some of it is helpful, but alot is not helpful when using these dual die devices.
PCB layout will also have a large influence on the performace of these devices.
Regarding the biasing, in IMHO use as little as you need to get rid of Cross over distortion.
I have used as little as 60ma per single die device.
This will need to be doubled with dual die devices.
I have not observed any problems relating to thermal drift when using this or less amount of bias.
I hope this has been helpful.
Just as a final note, these fixes are a result of 3 years R&D and many of these amplifiers built with these dual die devices.
Others may have confilicting advice which may help, but these fixes have been developed based on my topologies and PCB layouts and may not apply to your pcb layouts or Randy slones designs.
Upped the gate resistance, from the 680 to 750 and then to 1k.
May have helped some but still get the distortion.
How high could I raise this value before I can rule it out??
Have to find some 22pF caps as well. What range if any could I substitute?
Much thanks for all the help.
I guess the Semelabs aren't all that great.
May have helped some but still get the distortion.
How high could I raise this value before I can rule it out??
Have to find some 22pF caps as well. What range if any could I substitute?
Much thanks for all the help.
I guess the Semelabs aren't all that great.
Hi synonymous
The Semelab devices work best when used in an N channel design, the N and P devices are a pain to deal with when used in a complementry designs.
However our redesigned laterals in N and P work just great.
The problems that you have with the semelab devices just do not exist, they are clean as... ACD100NDD and ACD102NDD
If you have not got it running clean by 820 ohms then don't bother going further.
Try the ceramic caps they have proven to be most effective in most cases, Sometimes using them in the P channel between Gate and Drain can help as well.
make sure the caps go right on the Gate after the gate resistor and keep the leads as short as possible
The caps you need I got from RS components, just look under Monolithic ceramic, Sorry I don't have a part number with me.
22pf is the highest that I would go I have tried higher, but this doesn't help.
The Semelab devices work best when used in an N channel design, the N and P devices are a pain to deal with when used in a complementry designs.
However our redesigned laterals in N and P work just great.
The problems that you have with the semelab devices just do not exist, they are clean as... ACD100NDD and ACD102NDD
If you have not got it running clean by 820 ohms then don't bother going further.
Try the ceramic caps they have proven to be most effective in most cases, Sometimes using them in the P channel between Gate and Drain can help as well.
make sure the caps go right on the Gate after the gate resistor and keep the leads as short as possible
The caps you need I got from RS components, just look under Monolithic ceramic, Sorry I don't have a part number with me.
22pf is the highest that I would go I have tried higher, but this doesn't help.
BUZ901D/906D Devices
I recently designed and debugged a ~400 WPC amp that uses four 901D/906D devices in the output. However, each set of four is buffered by a single 901/906 in a manner analogous to a darlington. Also, the amplifier is an error correcting topology in which there is no feedback between the diff/vas stages and the EC/output stages.
I run each 901D/906D device with only 100 ohms of gate resistance. In order to eliminate a HF oscillation I did have to add 100 pf between gate and ground on the 901/906 devices that drive the paralleled 901D/906D output devices. As mentioned before, it is necessary to locally bypass each output device (I used 0.1 uF 100V film caps). Also, the output boards are two-layers with power and ground planes throughout. I have tested the amp into both resistive and capacitive loads without seeing any signs of oscillation, and I am using a 300 MHz scope, which is fast enough to display any.
Other than that, I have not had any instability problems, and the amps sound great.
I am also a bit surprised about the recommendations for running such a high bias current per output device. I am currently running no more than 40 mA per output device and have not seen any tendancy towards bias instability. Perhaps it is due to the large heatsinks; each channel is housed in a separate chassis, and the heatsinks run the entire depth of the chassis on both sides.
Running the amp at full power did not cause any thermal problems. The heatsinks just got hot, but then cooled once the output level was decreased.
synonymous said:
I recently designed and debugged a ~400 WPC amp that uses four 901D/906D devices in the output. However, each set of four is buffered by a single 901/906 in a manner analogous to a darlington. Also, the amplifier is an error correcting topology in which there is no feedback between the diff/vas stages and the EC/output stages.
I run each 901D/906D device with only 100 ohms of gate resistance. In order to eliminate a HF oscillation I did have to add 100 pf between gate and ground on the 901/906 devices that drive the paralleled 901D/906D output devices. As mentioned before, it is necessary to locally bypass each output device (I used 0.1 uF 100V film caps). Also, the output boards are two-layers with power and ground planes throughout. I have tested the amp into both resistive and capacitive loads without seeing any signs of oscillation, and I am using a 300 MHz scope, which is fast enough to display any.
Other than that, I have not had any instability problems, and the amps sound great.
I am also a bit surprised about the recommendations for running such a high bias current per output device. I am currently running no more than 40 mA per output device and have not seen any tendancy towards bias instability. Perhaps it is due to the large heatsinks; each channel is housed in a separate chassis, and the heatsinks run the entire depth of the chassis on both sides.
Running the amp at full power did not cause any thermal problems. The heatsinks just got hot, but then cooled once the output level was decreased.
I'm with Anthony. I run my latfets at 50mA per device. The distortion I get is very difficult for me to measure, and I've got access to some pretty advanced test gear. While they might have a positive temperature coefficient to 100mA or so, it's a pretty flat curve, with a broad operating range.
If you hear distortion, I'd bet the problem is oscillation. Latfets can be really difficult to tame. When I first built my 100W amp (using 2SK1058 and 2SJ162s) it oscillated beautifully at 1MHz.
There are a number of strategies you can employ to tame them. Increasing the gate resistance is often useful, as is increasing the loop gain, and playing with the VAS Miller compensation.
If you hear distortion, I'd bet the problem is oscillation. Latfets can be really difficult to tame. When I first built my 100W amp (using 2SK1058 and 2SJ162s) it oscillated beautifully at 1MHz.
There are a number of strategies you can employ to tame them. Increasing the gate resistance is often useful, as is increasing the loop gain, and playing with the VAS Miller compensation.
Besides the gate resistors, I found that it is crucial to have a local bypass cap on the power supply rail. This needs to be physically close to each output device. I used a 1000 pF (= 1 nF = 0.001 uF) Wima PP film part from the rail to the heatsink, which is part of the chassis ground. This is mentioned in the original Hitachi app notes, and cured a 20 MHz oscillation.
Right now I am blasting the amp, or shall I say speakers, pretty hard and it is about as clear as music could be. I replaced the gate resistor back to the 750 ohm resistor. In addition, I received a tip that the culprit could be the foldback protection circuit and to solder in parallel another .5 ohm source resistor to halve the resistance. As of now, I have the source resistance at .25 ohm and cannot hear the distortion. I do suspect that this could end up being a simple conflict in schematic vs part selection. I guess .1 ohm source resistors are in order at this time. I must admit that i suspected a conspiracy promoting BJT amps here. (Jokin). Will post the final results when all including the other channel is completed. In addition, each of the suggestions here will be adapted into the next board design. (that is unless the next is BJT).
THX again
Scott
Here is the transcript..
Hi Scott,
I won't spend much time on your problem before first excluding the most
probable cause. If you are using the foldback protection circuit used in
most of Randy's designs this is most likely what is being triggered. This
can happen when the load impedance goes below expected or when say a 0.5 ohm
resistor is carrying all of the load current.
There are several ways to sort this out. Using double dies you can
temporarily solder another 0.5 across each source resistor to make the
source resistors about 0.2 ohms. You can also use different values in the
foldback resistor divider to reduce the threshold level reaching the
foldback stage. You can also bight the bullet and remove the foldback stage
completely. Providing a bit of common sense is used nothing will get
damaged. The last option is to use a load which has a constant impedance
over the audio spectrum. If your problems do not show up on say a 15 ohms
load I would say the foldback circuit is definitely being stirred up by a
non linear load.
I'll tell you how I adjust quiescent current when I can't be bothered
getting out the big test gear. I play a female vocal track I know is good
and reduce the quiescent current at low audio level until I can hear
crossover distortion. Then just increase quiescent until the distortion
disappears. Measuring very low voltages across the source resistors is full
of traps because of noise and meter accuracy at low levels. If you or a mate
have a CRO and a sine wave generator you will see that not much current is
needed through lateral mosfets to get rid of crossover distortion. DMOS
[Hexfets etc.] is another ball game.
Like the Girl in the song sang,
Don't stop never give up,
Let me know how you go,
DE
THX again
Scott
Here is the transcript..
Hi Scott,
I won't spend much time on your problem before first excluding the most
probable cause. If you are using the foldback protection circuit used in
most of Randy's designs this is most likely what is being triggered. This
can happen when the load impedance goes below expected or when say a 0.5 ohm
resistor is carrying all of the load current.
There are several ways to sort this out. Using double dies you can
temporarily solder another 0.5 across each source resistor to make the
source resistors about 0.2 ohms. You can also use different values in the
foldback resistor divider to reduce the threshold level reaching the
foldback stage. You can also bight the bullet and remove the foldback stage
completely. Providing a bit of common sense is used nothing will get
damaged. The last option is to use a load which has a constant impedance
over the audio spectrum. If your problems do not show up on say a 15 ohms
load I would say the foldback circuit is definitely being stirred up by a
non linear load.
I'll tell you how I adjust quiescent current when I can't be bothered
getting out the big test gear. I play a female vocal track I know is good
and reduce the quiescent current at low audio level until I can hear
crossover distortion. Then just increase quiescent until the distortion
disappears. Measuring very low voltages across the source resistors is full
of traps because of noise and meter accuracy at low levels. If you or a mate
have a CRO and a sine wave generator you will see that not much current is
needed through lateral mosfets to get rid of crossover distortion. DMOS
[Hexfets etc.] is another ball game.
Like the Girl in the song sang,
Don't stop never give up,
Let me know how you go,
DE
No, I still have just one side, has always been the side of protection. Perhaps I should have confirmed that following your earlier post. Thanks yes.
Yes it seems to have fixed it. I have been piercing myself with Guitarissma and some of the newer Steely Dan. On one speaker LOL. Got to put it down so I can finish it.
I have been needing something like this for a long time.
Smilies-
Scott
Yes it seems to have fixed it. I have been piercing myself with Guitarissma and some of the newer Steely Dan. On one speaker LOL. Got to put it down so I can finish it.
I have been needing something like this for a long time.
Smilies-
Scott
LMOSFET devices and power handling
Hello again,
Polling what kind of experiences have people here had with using LMOSFET's in particular designs of power?
The double die Semelab devices are rated at 16A apiece and 250W dissipation. When paired, this should bring the total power dissipation to 500W.
When using differing supply voltages and load impedances, I get the hint that this nearly always causes variation in the amount of output transistors required.
My particular design uses 75Vx75V no load rails at 7.5A each rail. Would you think using just a single pair of double die devices as safe for load impedances down to 2 ohm??
What are your experiences?
THX
Hello again,
Polling what kind of experiences have people here had with using LMOSFET's in particular designs of power?
The double die Semelab devices are rated at 16A apiece and 250W dissipation. When paired, this should bring the total power dissipation to 500W.
When using differing supply voltages and load impedances, I get the hint that this nearly always causes variation in the amount of output transistors required.
My particular design uses 75Vx75V no load rails at 7.5A each rail. Would you think using just a single pair of double die devices as safe for load impedances down to 2 ohm??
What are your experiences?
THX
It's not as simple as just adding up the wattage of the output transistors you're using. You've got to take into account the heatsink they're bolted to, as well as how they're connected to the heatsink.
You can construct a thermal "circuit", using the Rth of the transistor to case, the Rth of a mounting pad, and the Rth of your heatsink to work out the total thermal resistance of your system. Given the maximum die temperature and the ambient temperature, you can then work out the maximum allowable dissipated power for a given system.
For a heatsink of a given size, adding more parallel transistors will increase the total power that you can dissipate, as the Rth of each of the transistors and mounting pads is in parallel. Or with a given number of output drivers, you can increase the power by using a larger (lower Rth) heatsink.
Simulations are good for working out the worst-case power dissipation using a given load and power supply.
I went through some of the math when designing my 100W power amp - see http://www.littlefishbicycles.com/poweramp/index.html for details.
You can construct a thermal "circuit", using the Rth of the transistor to case, the Rth of a mounting pad, and the Rth of your heatsink to work out the total thermal resistance of your system. Given the maximum die temperature and the ambient temperature, you can then work out the maximum allowable dissipated power for a given system.
For a heatsink of a given size, adding more parallel transistors will increase the total power that you can dissipate, as the Rth of each of the transistors and mounting pads is in parallel. Or with a given number of output drivers, you can increase the power by using a larger (lower Rth) heatsink.
Simulations are good for working out the worst-case power dissipation using a given load and power supply.
I went through some of the math when designing my 100W power amp - see http://www.littlefishbicycles.com/poweramp/index.html for details.
synonymous said:
Hello Scott,
I am trying to recite from memory but there is bias problems or stability problems with that amplifier design. If it is the one i am thinking of with dual differentials/ dual current mirrors etc.
Search for optimos or posts from andy-c or mikeks. I think those guys done sims and said it could not be stable or there is bias problems.
Kevin
Hi Syn,
+-75Vdc supply rails can give approaching 200W into 8ohms.
1pair of those 250W devices should just about cope with a speaker load.
2pair driving 4ohms should go to about 350W into 4ohms.
4pair driving 2ohms should go to about 600W into 2ohms.
Each of these will require a mighty power supply and massive cooling to sustain reliable power.
+-75Vdc supply rails can give approaching 200W into 8ohms.
1pair of those 250W devices should just about cope with a speaker load.
2pair driving 4ohms should go to about 350W into 4ohms.
4pair driving 2ohms should go to about 600W into 2ohms.
Each of these will require a mighty power supply and massive cooling to sustain reliable power.
Thanks for the clarifications and thumb rules. I should have made a statement about my heatsink although I kinda just assumed it okay and everything equal in my question.
What kind of a scenario do they set up for rating these? Do they assume a perfect heatsink or? Seems a spreadsheet and graph are needed to really get a grasp of the tradeoffs in voltages and currents.
One poster said that my idle current is around 12W or so. In paralleling output devices, does this increase my idle current? I suppose that would make it 24W at idle. This also would have an impact on power and dissipation yes.
BTW, my measured DCV at outputs are 2.5mV and 3.5mV. Does this look good??
Thanks all, this thing cranks.
What kind of a scenario do they set up for rating these? Do they assume a perfect heatsink or? Seems a spreadsheet and graph are needed to really get a grasp of the tradeoffs in voltages and currents.
One poster said that my idle current is around 12W or so. In paralleling output devices, does this increase my idle current? I suppose that would make it 24W at idle. This also would have an impact on power and dissipation yes.
BTW, my measured DCV at outputs are 2.5mV and 3.5mV. Does this look good??
Thanks all, this thing cranks.
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