Hello,
seems I finally got another excuse to play with something interesting: Got a four of these rather old and very good active DSP bi-amped speakers, and after almost 20 years, the internet finally gave out the schematic for them. During some repairs in the recent years, I have reverse engineered the complete schematic of the HF amp. This time however, we can finally see the Italian beauty in its fullest, and finally I can get some understanding how they have designed the class D LF woofer amp. Please find the schematic attached.
The most relevant part of the class D design is at page 10 (modulator) and page 11 (power stage). At first, it did look intimidating, but most of the parts are rather simple and easy to understand, except one that is pictured below.
For others not familiar, to easier orient in the design, I made the following notes:
The input differential audio signal is fed into U5-A (gain is about 0,66) and low-pass filtered by U5-B (~100kHz cutoff). U1-A seems to be the main error amplifier and U1-D seems to be some form of a PI-controller* (see further). Transistors Q4, Q5 make a form of amplitude limiter to about +-2.56V (5.12Vpp, just assuming Vbe of 600mV). This control signal is then split into a buffered (U1-B) and negative (inverted by U1-C) portions. Further (negative only) amplitude limiting is applied to these by means of Q2 and Q3 to about no less than -2.48V (again, assuming 600mV Vbe). This pair of limited signals is fed to a pair of comparators, which produce a PWM signal by comparing with a triangle wave generated by U9-A. PWM signals are then again split into positive and inverted by using the OR and NAND gate (to make matched delays in both positive and inverted paths) and provided to the respective gate drivers (IR2110 on the page 11).
Feedback is provided to the U1-A and U1-D from an output of the power stage. A differential amplifier U4-A, U4-B senses the differential voltage across the load after the PWM is low-pass filtered.
The triangle wave is produced by an integration of a 50% square wave by U9-A. Square wave of 250 kHz is generated by dividing a 1MHz ceramic resonator oscillator by 4, using two T flip-flops. Feedback network R27, R28, C27 provides a stable DC operational point of the integrator, so the triangle is well centered across 0V at all times. The trimmer R53 can slightly tweak the integrator's time constant, so an exact amplitude on the output can be set. Mid-point position of the trim pot seems to provide almost exactly 5Vpp of triangle wave (at mentioned 250kHz).
The part of schematic i am not confident I understand enough, is this one around U1-A and U1-D.
It seems to me, U1-A is a kind-of normal non-inverting amplifier, setting the overall gain of the whole class D to be (1+R46/R43) = (1+47k/10k) = 5.7, multiplied by the gain of the diff-amp U4 (gain of the diff amp is about R34/R35 = 330k/35k = 9.43 or rather 1/9.43). The overall gain of the class D amp then should be 5.7*9.43 = 53.7x, not counting the input attenuation of the U5 differential amp. That sounds reasonable, however not true, see at the end.
U1-D seems to be a PI controller, with the DC gain set to R14/R11. What is however a bit strange to me is where the non-inverting input of U1-D (pin 12) is connected at: There is a voltage divider R12 R13, providing a portion of the feedback signal from U4. Is it some kind of a feed-forward?
My main question now is are all my assumptions right?
I think this must be some pretty standard class D modulator topology, however I was unable to find anything about it. I am only familiar with the single-ended Philips-patented self-oscillating thing (with feedback after LC filter) and the single-ended "IR audio amp" scheme using the self oscillating second-order integrator (feedback before LC filter). Do you know about any application notes or papers describing this topology and its design in detail?
My intention is to try to build a class D like this for some other application, hence trying to understand the design, so I could take some inspiration.
So far I have put in LTSpice the main part of the class D, and made it work. The simulation is also attached, for reference. What I have learned from the simulation, is that by removing the feed-forward path (R12, R13 divider or R24, R23 in simulation) from the controller ("PI regulator") opamp U1-D (U7 in simulation), the amplifier of course also works, but the step response of the amplifier gets much worse. Applying the feed-forward however influences the overall amplifier's gain and I am unable to figure out, how to calculate that one just from the resistor values.
Thank you for any suggestions or comments to help me understand how it works.
Regards,
Yan
seems I finally got another excuse to play with something interesting: Got a four of these rather old and very good active DSP bi-amped speakers, and after almost 20 years, the internet finally gave out the schematic for them. During some repairs in the recent years, I have reverse engineered the complete schematic of the HF amp. This time however, we can finally see the Italian beauty in its fullest, and finally I can get some understanding how they have designed the class D LF woofer amp. Please find the schematic attached.
The most relevant part of the class D design is at page 10 (modulator) and page 11 (power stage). At first, it did look intimidating, but most of the parts are rather simple and easy to understand, except one that is pictured below.
For others not familiar, to easier orient in the design, I made the following notes:
The input differential audio signal is fed into U5-A (gain is about 0,66) and low-pass filtered by U5-B (~100kHz cutoff). U1-A seems to be the main error amplifier and U1-D seems to be some form of a PI-controller* (see further). Transistors Q4, Q5 make a form of amplitude limiter to about +-2.56V (5.12Vpp, just assuming Vbe of 600mV). This control signal is then split into a buffered (U1-B) and negative (inverted by U1-C) portions. Further (negative only) amplitude limiting is applied to these by means of Q2 and Q3 to about no less than -2.48V (again, assuming 600mV Vbe). This pair of limited signals is fed to a pair of comparators, which produce a PWM signal by comparing with a triangle wave generated by U9-A. PWM signals are then again split into positive and inverted by using the OR and NAND gate (to make matched delays in both positive and inverted paths) and provided to the respective gate drivers (IR2110 on the page 11).
Feedback is provided to the U1-A and U1-D from an output of the power stage. A differential amplifier U4-A, U4-B senses the differential voltage across the load after the PWM is low-pass filtered.
The triangle wave is produced by an integration of a 50% square wave by U9-A. Square wave of 250 kHz is generated by dividing a 1MHz ceramic resonator oscillator by 4, using two T flip-flops. Feedback network R27, R28, C27 provides a stable DC operational point of the integrator, so the triangle is well centered across 0V at all times. The trimmer R53 can slightly tweak the integrator's time constant, so an exact amplitude on the output can be set. Mid-point position of the trim pot seems to provide almost exactly 5Vpp of triangle wave (at mentioned 250kHz).
The part of schematic i am not confident I understand enough, is this one around U1-A and U1-D.
It seems to me, U1-A is a kind-of normal non-inverting amplifier, setting the overall gain of the whole class D to be (1+R46/R43) = (1+47k/10k) = 5.7, multiplied by the gain of the diff-amp U4 (gain of the diff amp is about R34/R35 = 330k/35k = 9.43 or rather 1/9.43). The overall gain of the class D amp then should be 5.7*9.43 = 53.7x, not counting the input attenuation of the U5 differential amp. That sounds reasonable, however not true, see at the end.
U1-D seems to be a PI controller, with the DC gain set to R14/R11. What is however a bit strange to me is where the non-inverting input of U1-D (pin 12) is connected at: There is a voltage divider R12 R13, providing a portion of the feedback signal from U4. Is it some kind of a feed-forward?
My main question now is are all my assumptions right?
I think this must be some pretty standard class D modulator topology, however I was unable to find anything about it. I am only familiar with the single-ended Philips-patented self-oscillating thing (with feedback after LC filter) and the single-ended "IR audio amp" scheme using the self oscillating second-order integrator (feedback before LC filter). Do you know about any application notes or papers describing this topology and its design in detail?
My intention is to try to build a class D like this for some other application, hence trying to understand the design, so I could take some inspiration.
So far I have put in LTSpice the main part of the class D, and made it work. The simulation is also attached, for reference. What I have learned from the simulation, is that by removing the feed-forward path (R12, R13 divider or R24, R23 in simulation) from the controller ("PI regulator") opamp U1-D (U7 in simulation), the amplifier of course also works, but the step response of the amplifier gets much worse. Applying the feed-forward however influences the overall amplifier's gain and I am unable to figure out, how to calculate that one just from the resistor values.
Thank you for any suggestions or comments to help me understand how it works.
Regards,
Yan