The three-stage amplifier (sometimes referred as Lin topology or Blameless by D.Self) is a fundamental design in the realm of analog electronics, particularly in audio and power amplification. By dividing the amplification process into three distinct stages, each responsible for a specific part of the signal processing chain, this design offers a robust solution for various applications. The stages include the input stage, the voltage amplifier stage (VAS), and the output stage, each presenting its own advantages and disadvantages.
In the input stage, a differential amplifier is typically employed, which plays a crucial role in preparing the incoming signal. This stage is essential for rejecting unwanted noise, especially common-mode noise, which refers to interference affecting both input terminals similarly, such as electrical noise picked up along signal cables. The input stage often operates as a transconductance amplifier, converting the input voltage signal into a proportional current that will be further processed in the subsequent stage. By maintaining the signal's integrity, the input stage sets a solid foundation for the amplification process.
One of the primary benefits of the input stage is its noise rejection capability. The differential amplifier excels at filtering out common-mode noise, making it particularly effective for sensitive applications where clean signals are critical. Additionally, the input stage typically presents a high input impedance to the source, minimizing loading effects and preserving the original signal's quality. However, this stage does come with challenges. It requires precise matching of its components to ensure optimal performance, which can increase design complexity and manufacturing costs. Furthermore, the complexity of the differential amplifier adds a layer of difficulty to the overall circuit design, making it harder to tune and optimize.
The voltage amplifier stage (VAS) is where the majority of the signal's voltage gain occurs. Once the input stage has prepared the signal, the VAS amplifies it to the desired voltage level. This stage functions as a transimpedance amplifier, converting the current output from the input stage back into a voltage signal. The VAS ensures that the signal possesses sufficient voltage swing to drive the output stage, which ultimately handles the current demands of the load.
The VAS provides significant advantages, primarily in its ability to deliver high voltage gain. This stage is essential for amplifying low-level input signals to the required amplitude, ensuring that the original audio quality is preserved during the process. Moreover, the separation of voltage gain into a dedicated stage allows for easier fine-tuning and optimization of this critical aspect of the amplifier's performance. However, the VAS is not without its drawbacks. If improperly designed, it can introduce harmonic distortion or other artifacts, particularly when handling high-voltage signals. Additionally, voltage amplifiers can be prone to thermal instability, necessitating careful thermal management and compensation.
The output stage is responsible for driving the final load, usually a speaker or other low-impedance device. This stage provides current amplification, ensuring that the amplified voltage signal from the VAS is delivered with enough current to effectively power the load. Typically, the output stage is designed to operate efficiently while minimizing distortion, particularly in Class AB configurations, which offer a balance between efficiency and linearity.
The output stage presents its own set of advantages. It supplies the necessary current to drive low-impedance loads, ensuring that the amplifier can handle high-power applications. Class AB output stages are particularly efficient, striking a compromise between the linearity of Class A amplifiers and the efficiency of Class B designs. This reduces heat generation while maintaining high-quality output. Nonetheless, the output stage also generates significant heat, especially in high-power applications, which requires careful thermal management. Additionally, the output stage must be accurately matched to the load to avoid instability and distortion, complicating the design process.
When considering the three-stage amplifier design as a whole, several compelling advantages emerge, alongside some challenges that designers must address. The division of amplification into three distinct stages allows for performance optimization, enabling engineers to tailor each stage for its specific function. The input stage focuses on noise rejection and signal conditioning, the VAS provides critical voltage gain, and the output stage delivers the necessary current to the load. This modularity enhances flexibility, making it easier to adapt the design for various power levels, load types, and performance requirements. Moreover, the inherent noise immunity provided by the differential input stage is vital for high-fidelity applications, ensuring that the amplifier remains resilient to interference.
However, the three-stage amplifier approach does have its complexities. The intricacies of tuning and matching each stage require meticulous attention to detail, potentially extending development time and increasing costs. Managing heat becomes a common challenge, particularly in the output stage, as excessive heat can lead to performance degradation or component failure if not properly addressed. Furthermore, variations in the characteristics of transistors or other active components can affect overall performance, particularly in the input and VAS stages, necessitating careful design and testing.
Inspired by the three-stage topology, I set out to create opamp schematics consisting of discrete components that offer distinct design advantages over commercially available opamps. Main goal of my design was achieving a high open-loop gain within audio band frequencies. To accomplish this, I employed an advanced type of voltage amplifier stage (VAS) compensation known as two-pole compensation. This technique creates two poles on the Bode plot, effectively expanding the open-loop gain at higher audio frequencies. As a result, the loop gain plot exhibits a steeper roll-off of 12 dB per octave, compared to the simpler Miller compensation method, which rolls off at a rate of 6 dB per decade.
To optimize LTP, PMP5201 and PMP4201 matched double transistors were used. These transistors are essential for ensuring precision in the input differential pair, current mirror, and constant current sources. Using just two matched devices also simplifies the bill of materials.
Update: newly redesigned opamp uses all 2N3904/3906 transistors as those offer higher bandwidth resulting in better performance. See post #17
Opamp specs:
THD (G=+1, 600R, Vin=1.41Vrms, 1kHz): 0.000004% or -147dB
THD (G=+1, 600R, Vin=9Vrms, 1kHz): 0.00005% or -126dB
THD (G=+1, 300R, Vin=1.41Vrms, 1kHz): 0.000005% or -146dB
THD (G=+1, 300R, Vin=9Vrms, 1kHz): 0.000754% or -102dB
BW (G=1): 4.25MHz
Noise: 5.77 nV/rtHz
Voffset: 0.1mA
AOL (100Hz): 118dB
AOL (20kHz): 72dB
This is posted as a concept and does not perform correctly in frequency response simulation yet.
In the input stage, a differential amplifier is typically employed, which plays a crucial role in preparing the incoming signal. This stage is essential for rejecting unwanted noise, especially common-mode noise, which refers to interference affecting both input terminals similarly, such as electrical noise picked up along signal cables. The input stage often operates as a transconductance amplifier, converting the input voltage signal into a proportional current that will be further processed in the subsequent stage. By maintaining the signal's integrity, the input stage sets a solid foundation for the amplification process.
One of the primary benefits of the input stage is its noise rejection capability. The differential amplifier excels at filtering out common-mode noise, making it particularly effective for sensitive applications where clean signals are critical. Additionally, the input stage typically presents a high input impedance to the source, minimizing loading effects and preserving the original signal's quality. However, this stage does come with challenges. It requires precise matching of its components to ensure optimal performance, which can increase design complexity and manufacturing costs. Furthermore, the complexity of the differential amplifier adds a layer of difficulty to the overall circuit design, making it harder to tune and optimize.
The voltage amplifier stage (VAS) is where the majority of the signal's voltage gain occurs. Once the input stage has prepared the signal, the VAS amplifies it to the desired voltage level. This stage functions as a transimpedance amplifier, converting the current output from the input stage back into a voltage signal. The VAS ensures that the signal possesses sufficient voltage swing to drive the output stage, which ultimately handles the current demands of the load.
The VAS provides significant advantages, primarily in its ability to deliver high voltage gain. This stage is essential for amplifying low-level input signals to the required amplitude, ensuring that the original audio quality is preserved during the process. Moreover, the separation of voltage gain into a dedicated stage allows for easier fine-tuning and optimization of this critical aspect of the amplifier's performance. However, the VAS is not without its drawbacks. If improperly designed, it can introduce harmonic distortion or other artifacts, particularly when handling high-voltage signals. Additionally, voltage amplifiers can be prone to thermal instability, necessitating careful thermal management and compensation.
The output stage is responsible for driving the final load, usually a speaker or other low-impedance device. This stage provides current amplification, ensuring that the amplified voltage signal from the VAS is delivered with enough current to effectively power the load. Typically, the output stage is designed to operate efficiently while minimizing distortion, particularly in Class AB configurations, which offer a balance between efficiency and linearity.
The output stage presents its own set of advantages. It supplies the necessary current to drive low-impedance loads, ensuring that the amplifier can handle high-power applications. Class AB output stages are particularly efficient, striking a compromise between the linearity of Class A amplifiers and the efficiency of Class B designs. This reduces heat generation while maintaining high-quality output. Nonetheless, the output stage also generates significant heat, especially in high-power applications, which requires careful thermal management. Additionally, the output stage must be accurately matched to the load to avoid instability and distortion, complicating the design process.
When considering the three-stage amplifier design as a whole, several compelling advantages emerge, alongside some challenges that designers must address. The division of amplification into three distinct stages allows for performance optimization, enabling engineers to tailor each stage for its specific function. The input stage focuses on noise rejection and signal conditioning, the VAS provides critical voltage gain, and the output stage delivers the necessary current to the load. This modularity enhances flexibility, making it easier to adapt the design for various power levels, load types, and performance requirements. Moreover, the inherent noise immunity provided by the differential input stage is vital for high-fidelity applications, ensuring that the amplifier remains resilient to interference.
However, the three-stage amplifier approach does have its complexities. The intricacies of tuning and matching each stage require meticulous attention to detail, potentially extending development time and increasing costs. Managing heat becomes a common challenge, particularly in the output stage, as excessive heat can lead to performance degradation or component failure if not properly addressed. Furthermore, variations in the characteristics of transistors or other active components can affect overall performance, particularly in the input and VAS stages, necessitating careful design and testing.
Inspired by the three-stage topology, I set out to create opamp schematics consisting of discrete components that offer distinct design advantages over commercially available opamps. Main goal of my design was achieving a high open-loop gain within audio band frequencies. To accomplish this, I employed an advanced type of voltage amplifier stage (VAS) compensation known as two-pole compensation. This technique creates two poles on the Bode plot, effectively expanding the open-loop gain at higher audio frequencies. As a result, the loop gain plot exhibits a steeper roll-off of 12 dB per octave, compared to the simpler Miller compensation method, which rolls off at a rate of 6 dB per decade.
To optimize LTP, PMP5201 and PMP4201 matched double transistors were used. These transistors are essential for ensuring precision in the input differential pair, current mirror, and constant current sources. Using just two matched devices also simplifies the bill of materials.
Update: newly redesigned opamp uses all 2N3904/3906 transistors as those offer higher bandwidth resulting in better performance. See post #17
Opamp specs:
THD (G=+1, 600R, Vin=1.41Vrms, 1kHz): 0.000004% or -147dB
THD (G=+1, 600R, Vin=9Vrms, 1kHz): 0.00005% or -126dB
THD (G=+1, 300R, Vin=1.41Vrms, 1kHz): 0.000005% or -146dB
THD (G=+1, 300R, Vin=9Vrms, 1kHz): 0.000754% or -102dB
BW (G=1): 4.25MHz
Noise: 5.77 nV/rtHz
Voffset: 0.1mA
AOL (100Hz): 118dB
AOL (20kHz): 72dB
This is posted as a concept and does not perform correctly in frequency response simulation yet.
Attachments
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Sound fidelity or not, a discrete opamp built along an integrated opamp topology will have the same shortcomings - for example, common mode distortion. Try feeding your circuit from a higher impedance signal source and see what happens. In addition, this amp doesn't include overcurrent protection at the output, which comes standard in all integrated opamps since uA709. BTW how it behaves when clipping?
Also, two pole compensation means the phase margin, which is not phenomenal to start with, will be degraded when your configure the amplifier for a higher gain, say, +10. It will have more ringing at fast transients. Using frequency dependent feedback network with a two pole amplifier, as in filters, can be fun.
Oh, and current sources do not need matched transistors. It won't hurt, of course.
Also, two pole compensation means the phase margin, which is not phenomenal to start with, will be degraded when your configure the amplifier for a higher gain, say, +10. It will have more ringing at fast transients. Using frequency dependent feedback network with a two pole amplifier, as in filters, can be fun.
Oh, and current sources do not need matched transistors. It won't hurt, of course.
I try to avoid competing against IC op-amps on the same metrics.
Rather, I design for moderate open-loop gain (60dB). Then, the open-loop distortion, bandwidth, and PSRR can be much better. This works in most circuits that don't require enormous open-loop gain.
Ed
Rather, I design for moderate open-loop gain (60dB). Then, the open-loop distortion, bandwidth, and PSRR can be much better. This works in most circuits that don't require enormous open-loop gain.
Ed
Few updates:
Added current limiting transistors at the output to limit 0.6V/22R = 0.027A or 27mA
Added protection diodes
Changed all transistors to BC847/BC857, adjusted current for LTP, changed degeneration resistors - reduced noise down to 2.3 nV/Hz/1/2
Simulated I to V converter for current based output DAC
All results and LTSpice simulation files are attached
Added current limiting transistors at the output to limit 0.6V/22R = 0.027A or 27mA
Added protection diodes
Changed all transistors to BC847/BC857, adjusted current for LTP, changed degeneration resistors - reduced noise down to 2.3 nV/Hz/1/2
Simulated I to V converter for current based output DAC
All results and LTSpice simulation files are attached
Attachments
With this kind of protection, you also need to protect from overcurrent your Q17 (the VAS common emitter transistor).
I would assume all those additions will add a lot of OLG which will probably make it harder to compensate.
It has been a challenge to apply TPC to the current version. And I am not sure I did it correctly as a square wave response still shows overshot.
It has been a challenge to apply TPC to the current version. And I am not sure I did it correctly as a square wave response still shows overshot.
Thank you all for the input - now I added everything that was suggested
So I was able to get 0.000001% THD from this topology!
All 3906/3904 transistors.
LTP current was set to 580uA, VAS current was set to 1.88mA, and EF OPS current was set to 2mA.
Instead of playing with two pole compensation I started with a simple Miller cap. This allowed me to find optimum operating conditions as far as the phase margin that is usually set to be at least 45 degrees on Bode plot where the gain is equal to 0 or GBW.
Only after experimenting with Miller cap I changed to TPC.
I also simulated overvoltage and overcurrent conditions by sending 20V of sine input into the amplifier and by changing the load to 1 ohm. As a result of this test I added protection diodes to inverting and noninverting inputs and also added overcurrent protection transistors to VAS and OPS.
New specs (for TPC version):
THD (G=+1, 600R, Vin=2Vrms, 1kHz): 0.000001% or -160dB
THD (G=+1, 600R, Vin=13Vrms, 1kHz): 0.000020% or -133dB
Voffset: 0.011mA
GBW : 18MHz
Phase margin: 37 deg
AOL (100Hz): 133dB
AOL (20kHz): 76dB
Noise: 2.36 nV/Hz1/2
Slew rate: 6V/uS
So I was able to get 0.000001% THD from this topology!
All 3906/3904 transistors.
LTP current was set to 580uA, VAS current was set to 1.88mA, and EF OPS current was set to 2mA.
Instead of playing with two pole compensation I started with a simple Miller cap. This allowed me to find optimum operating conditions as far as the phase margin that is usually set to be at least 45 degrees on Bode plot where the gain is equal to 0 or GBW.
Only after experimenting with Miller cap I changed to TPC.
I also simulated overvoltage and overcurrent conditions by sending 20V of sine input into the amplifier and by changing the load to 1 ohm. As a result of this test I added protection diodes to inverting and noninverting inputs and also added overcurrent protection transistors to VAS and OPS.
New specs (for TPC version):
THD (G=+1, 600R, Vin=2Vrms, 1kHz): 0.000001% or -160dB
THD (G=+1, 600R, Vin=13Vrms, 1kHz): 0.000020% or -133dB
Voffset: 0.011mA
GBW : 18MHz
Phase margin: 37 deg
AOL (100Hz): 133dB
AOL (20kHz): 76dB
Noise: 2.36 nV/Hz1/2
Slew rate: 6V/uS
Attachments
Last edited:
Great work! Looking forward to the prototype measurements. Hope you can test with all three sets of PMP, BC and 2N diff stage transistors.
Thank you!
I wish I had Audio Precision Analyzer APx555 for that lol
PMP appeared to be the noisiest out of all.
As it is, LTP transistors 2N3906 are contributing 1 nV/rtHz of noise each; totaling in 2.32 nV/rtHz at the output.
If I change LTP transistors to PMP5201 they are twice as noisy at 2 nV/rtHz each; totaling in 3.46 nV/rtHz.
BC857C each contributes 931 pV/rtHz; totaling 2.24 nV/rtHz.
BC857C is 100 MHz
vs 2N3906 is 250 MHz devices
Not sure if that matters for LTP, but I was able to get better performance when all 3906/3904 transistors were used.
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