LR4 SMD filter project

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Hi
I'll be having a go at building a sub filter using a LR4 filter, with atleast an input buffer, and perhaps an output buffer as well (for only sub out or all channels)

Here's the v1 schematic. An input buffer, to highpass as well as sum+lowpass. I'm using quad packages and I'll be making it a pcb design/smd work project as well.
An externally hosted image should be here but it was not working when we last tested it.

It's my first time "designing" an audio circuit and I'd appreciate some critisism.
Is 300k too large a resistance -> will there be extra noise?
I chose it as I could only find quite low value c0g smd caps. But just now I have found a place to get 47nF caps for this.
Also open to questions about choices and better recommendations. But they have to be sanely priced.

I will post the first version of the PCB soon, and I feel it may do with some help 😀
-rgds
Progress edit: here you can see my first PCB revision: http://puu.sh/gKL8B/64c8bc7e99.png
It's missing power decoupling everywhere, but I think it's pretty close otherwise.. But it's my first PCB so I bet you guys can spot something 😉
When I get back I'll go back to work on adding decoupling.
And I'll be ordering these from OSHPark I think. It seems to be the cheapest and easiest place to get small orders?
 
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generally for an S&K and for the equal value we use between 5k and 20k for reasonable capacitor values combined with acceptable noise.
All the Power Amp gain amplifies the noise since the vol pot is before the active crossover.

Add input filtering, but at least RF attenuation.
Change IC2a to an inverting summing opamp.
or
Change the whole bass channel to an MFB filter. It acts as both the summing at the input and as the Low Pass Filter in one opamp. Then follow with a second Low pass MFB to invert back to normal phase.

Have a look at your speaker driver sensitivities. You may need attenuation of either the low pass, or the high pass to get the required SPL to match at your ears.

D.Self uses an inverting Buffer at the input.
It can be set for no gain as in a true Buffer, or with some gain if working with lower level signals, or with some attenuation when the signals are already a bit too hot.

Have a look at an inverting opamp. Just one resistor to be switched/adjusted to give +Xdb, or 0dB, or -YdB.
 
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Ok I have a revision and questions.
Here is the new circuit. It will feed a non-inverting gainclone and some other amp.
An externally hosted image should be here but it was not working when we last tested it.

Input filter added. Will the cap and resistor in series form a highpass filter, if the - terminal will be at ground potential? Also, I forgot the RF filter cap between + and - inputs.
Read up on MFB filter's, thanks for the tip!
Switched the input buffer to inverting-type.

What is meant by S&K?
What situation do you mean where the vol pot is before the active crossover? I wasn't planning on doing that. I thought it would be better to control the gain using an output buffer with adjustable gain?

Had loads of fun designing the pcb so far 🙂
 
Tthe vol pot needs to be before the crossover.

Only insert a bit of relative level adjustment after the crossover to match levels to suit driver sensitivities.

You changed the bass channel filters. They are now wrong.
You should not add a cap to the -IN pin of the opamp unless you know a lot about compensation techniques.
Add the RF attenuation to the input Signal Hot to Signal cold/return.
 
I understand the volume adjustment approach now. I will use the pot before the input buffer, so that noise in the incoming signal will not be amplified. Then if needed I can adjust sub/main balance by changing the input buffer resistance.
Yes, I changed the lowpass filter section, like you recommended. It is two MFB type lowpass filters with a Q of 0.5, as in a LR filter. I found the circuit here Multiple Feedback Low-pass Filter Design Tool
Could you care to tell me in what way they are wrong/not good? I surely do not yet know a lot about compensation techniques 🙂
I will add the rf filter in the next revision.
 
LR uses two cascaded Butterworth filters.
LR4 is two B2 filters. It is NOT two Q=½ filters.

MFB are inverting filters. You need to look again at the way the +IN & -IN are oriented.

Isolate the C of the RF filter from the -IN pin using a low value of R. i.e. split the input R into r+r and couple the filtering cap to the junction of the two r.

D.Self tells us that MFB is good for low pass duty. He has results showing it is not quite so good in high pass duty. He suggests we stay with S&K and similar filters, for high pass.

I will not try to explain compensation, I am a relative Newbie and I would probably get any explanation wrong.
Just avoid hanging C from the -IN pin.
Tomchr has a couple of Threads on his 86 composite chipamp. In there he does show and to some extent explain what is needed for the 3886 implementation for his particular amplifier. It's to do with the C across the +IN and -IN pins shown in the National datasheet.
 
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Thank you so much for your pointers Andrew! I have now read a few of D. Self's books, and they are very nice information for me 🙂 I fixed my mistakes and used Self's design guidelines to come up with the newest version.
A small bit about my setup: A ES9023 DAC á la Subbu, outputting (to my knowledge) 2Vrms, and as the amplifier a non-inverting gainclone, closely resembling Peter Daniels's kit. It has a gain of 33. This means the signal from the DAC is already quite strong: I have used this to my advantage in the circuit. The output voltages are quite low, and so don't have that much headroom. This is ok, as I will not have a proper volume control until I make one, so reducing levels this way is ok. I don't think I'll have any problems with overhead.
I have also switched to 5532's all around, as they have the most published info of their performance with different loads. I have realized this is not an optimum project for SMD board design: the caps at bare minimum will be TH.
I have not yet simulated this design in spice.
I am looking for low noise and distortion, especially in the HF path.
2e0l5l4.jpg

50ppbb.jpg


I am much more confident in the design now, but I still appreciate input 🙂
E: A quick explanation of input side: RF and DC filtering, buffer with 1.45x gain, S&K third order lowpass @20Hz, lowpass @50KHz. Essentially straight from "The Design of Active Crossovers".
 
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5532 (and 5534) are BJT input opamps. These are generally not suitable for filter duty. The input impedance breaks the second rule for a filter.
The two rules are:
1.) the Source impedance should be near zero ohms.
2.) the Load impedance should be near infinite ohms.

With clever circuitry and a LOT OF MATHEMATICS one can shift the filter component values to correct for non zero source impedance and correct for less than infinite load impedance.

It is simpler to use the high input impedance of a FET input opamp.
 
Having played rather a lot with active filters over the years, I've also come to the same conclusion - best to use JFET opamps and then the working impedances can be very high (over 100kohms) and the caps can be (technically almost perfect) NP0s which are also small and relatively cheap.

I'd suggest not driving the outputs direct from the opamps rather use some discrete transistor classA buffers - also easy and very cheap.

<edit> Attached a pic of my most recent AXO build - this is a stereo, balanced 3rd order using TL084s (totally 16opamps). The largest NP0 caps are 10nF (in this case made of two paralleled 4n7s). The discrete output buffers are using SOT-23 transistors in the central part of the PCB.
 

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So you both recommend JFET-input opamps. Hmm. And Self on the other hand almost entirely skips over JFET devices in his book, deeming them irrelevant. Obviously the difference would be in the loading style of the filter:
BJT - lower impedances - lower noise (both from resistors and opamps) and larger caps - 1 cap price ~.50 €
JFET - higher impedances (abraxalito recommending really high impedances) - higher noise (both opamps and resistors) - cheap caps: 1 15nF np0 cap ~.11 € - more potential for smd work.
It doesn't seem that np0 caps would sound any better than PP (in the right places).

Obviously the higher input impedance would prevent the responses going off track, but I feel it wouldn't make a difference. Do you have some proof/simulations or papers to show me? In my mind, 15k max resistance with maybe 300k input resistance in parallel doesn't seem too worrying. Should I worry? 🙂

I'm toying around the idea of making a PCB with multiple build options, so I could perhaps test tl072/ne5532 performance, both with their optimal circuit around them.

and abraxalito, interesting board! Haven't seen a build like that before.
Thank you for your help 🙂
 
Noise is certainly a significant issue to be addressed when working with higher impedances (as are appropriate with JFET opamps). I address it by working at higher signal levels - after all its signal to noise we're concerned about, not just noise. With TL084s it seems the noise is dominated by the resistors, not the opamps when working in the 100's of kilohms. Since noise scales with the square root of resistance, to get better SNR just go to higher voltages.

I'd agree that there's no reason to suspect NP0 sounds better than PP, just its more convenient.

There is another reason to run at higher impedances (and higher signal levels if deemed necessary) - that is sound quality. From my experiments opamps sound best when given the lightest possible loads which I figure is down to how much power supply noise is generated. Keeping the opamp's output stage in classA (which I assume means drawing less than 100uA peak current from it) means switching artifacts aren't generated on the rails. Going balanced really gilds the lily which is what I've done in that build because balanced tends to cancel any power supply noise.

Thanks for your interest in my build - incidentally its using TL431s to power the opamps and the output buffers.
 
Here's the first "proper" PCB design for this project. It's based around the NE5532. I will have access to a THD/noise analyzer to test this crossover.
All TH caps are mounted under the board, shielded by the ground plane.
Is there anything obviously wrong in the layout?
An externally hosted image should be here but it was not working when we last tested it.

It's the first time ordering a board and I'd like it to atleast function.

Edit: I'm adding the level limiting resistors to the outputs. Output level will be expected to be 1.4Vrms, when input is 2Vrms.
 
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Very true Andew 🙂
The pricing for PCB's is in 5cm steps at itead, where I'll be ordering these. Didn't quite get it to fit on 5x5 with everything I wanted so expanded it to 10x5.
I'm perfectly fine with the size and I enjoy smd soldering more than TH 🙂
Of course, it might be cheaper to do the whole project in TH on veroboard, but I'm interested in pcb design.
 
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