Hi All
I want to know how a Full Complementary Symmetrical power amplifier sounds and add it to my RCP130 collection.
After reading that Mr. Slone symmetrical IPS with mirrors might suffer from undefined VAS standing current, I searched and found several solutions:
https://www.diyaudio.com/forums/solid-state/335074-bryston-4b-sst-clone-7.html#post5920143
https://www.diyaudio.com/forums/solid-state/335074-bryston-4b-sst-clone-10.html#post5930001 chalky
https://www.diyaudio.com/forums/sol...ogy-construction-troubles-25.html#post5951772 Cordell
https://www.diyaudio.com/forums/sol...logy-construction-troubles-4.html#post2177541 E Stuart
https://www.diyaudio.com/forums/sol...pology-construction-troubles.html#post2163428 BV
https://www.diyaudio.com/forums/sol...logy-construction-troubles-2.html#post2169779 BV
https://www.diyaudio.com/forums/sol...logy-construction-troubles-2.html#post2169816 BV
https://www.diyaudio.com/forums/solid-state/99252-mini-class-amp-3.html#post1413451 GK
https://www.diyaudio.com/forums/sol...mosfet-normal-diamond-buffer.html#post1120959 fab
http://www.ne.jp/asahi/evo/amp/J200K1529/report.htm JAP
https://www.angelfire.com/sd/paulkemble/sound3.html JLH
I simulated some of them and found that all solutions did never provide the promised Low THD from the original design.
I know Bob Cordell's solution to work well at the expense of some THD deterioration.
Here I want to share a solution that provides excellent THD figures while not being too sensible to temperature variations and beta mismatches.
In my implementation I connected a feedback resistor from the VAS emitter Q3 to the input stage mirror input leg emitter Q10 and adjusted the emitter resistors
So to have nearly the same Vdrop over R2 and R11 (+-700mV)
I built this amp based on the files below, I found it to be quite sensible to temp variations and the currents over R11 R38 (VAS emitter resistors) are never steady.
It seems the both positive and negative VAS are trying to set idle current and as it is never exactly the same, they tend to "fight each other" creating a permanent fluctuation.
Decreasing the feedback resistors R12 and R39 helps minimize this fluctuations but OLG is severely reduced.
I listened to it for a while and although HF is very extended and clear, LF suffers from some blur.
Then I had one idea.... why not fix the current only on the top VAS bjt Q3 and let the lower one Q5 to follow ?
In simulation, even with a very low feedback resistor R12 (1k) I have a fixed current in both VAS and best of all, OLG is only slightly affected.
Now I have 111dB OLG until 600Hz
108dB @ 1KHz
59dB @ 20KHz
0dB @ 1.18MHz (66° PM and 22dB GM)
Damping factor into 8ohms is 5Mohm until 1KHz and 34Kohm @ 20KHz
It took me a while to get the TMC right but now this amplifier is a top contender.
HF is crystal clear and very extended, LF presentation is FullOn with increased detail compared to my Blameless and voices are realistic.
This amplifier sounds more natural and almost reaches the "Meridian 103 Magic" in terms of instrument placement and depth of image.
For general information I am leaving here the last EVO8.33 that represents the actual build I am now enjoying.
Kind regards
I want to know how a Full Complementary Symmetrical power amplifier sounds and add it to my RCP130 collection.
After reading that Mr. Slone symmetrical IPS with mirrors might suffer from undefined VAS standing current, I searched and found several solutions:
https://www.diyaudio.com/forums/solid-state/335074-bryston-4b-sst-clone-7.html#post5920143
https://www.diyaudio.com/forums/solid-state/335074-bryston-4b-sst-clone-10.html#post5930001 chalky
https://www.diyaudio.com/forums/sol...ogy-construction-troubles-25.html#post5951772 Cordell
https://www.diyaudio.com/forums/sol...logy-construction-troubles-4.html#post2177541 E Stuart
https://www.diyaudio.com/forums/sol...pology-construction-troubles.html#post2163428 BV
https://www.diyaudio.com/forums/sol...logy-construction-troubles-2.html#post2169779 BV
https://www.diyaudio.com/forums/sol...logy-construction-troubles-2.html#post2169816 BV
https://www.diyaudio.com/forums/solid-state/99252-mini-class-amp-3.html#post1413451 GK
https://www.diyaudio.com/forums/sol...mosfet-normal-diamond-buffer.html#post1120959 fab
http://www.ne.jp/asahi/evo/amp/J200K1529/report.htm JAP
https://www.angelfire.com/sd/paulkemble/sound3.html JLH
I simulated some of them and found that all solutions did never provide the promised Low THD from the original design.
I know Bob Cordell's solution to work well at the expense of some THD deterioration.
Here I want to share a solution that provides excellent THD figures while not being too sensible to temperature variations and beta mismatches.
In my implementation I connected a feedback resistor from the VAS emitter Q3 to the input stage mirror input leg emitter Q10 and adjusted the emitter resistors
So to have nearly the same Vdrop over R2 and R11 (+-700mV)
I built this amp based on the files below, I found it to be quite sensible to temp variations and the currents over R11 R38 (VAS emitter resistors) are never steady.
It seems the both positive and negative VAS are trying to set idle current and as it is never exactly the same, they tend to "fight each other" creating a permanent fluctuation.
Decreasing the feedback resistors R12 and R39 helps minimize this fluctuations but OLG is severely reduced.
I listened to it for a while and although HF is very extended and clear, LF suffers from some blur.
Then I had one idea.... why not fix the current only on the top VAS bjt Q3 and let the lower one Q5 to follow ?
In simulation, even with a very low feedback resistor R12 (1k) I have a fixed current in both VAS and best of all, OLG is only slightly affected.
Now I have 111dB OLG until 600Hz
108dB @ 1KHz
59dB @ 20KHz
0dB @ 1.18MHz (66° PM and 22dB GM)
Damping factor into 8ohms is 5Mohm until 1KHz and 34Kohm @ 20KHz
It took me a while to get the TMC right but now this amplifier is a top contender.
HF is crystal clear and very extended, LF presentation is FullOn with increased detail compared to my Blameless and voices are realistic.
This amplifier sounds more natural and almost reaches the "Meridian 103 Magic" in terms of instrument placement and depth of image.
For general information I am leaving here the last EVO8.33 that represents the actual build I am now enjoying.
Kind regards
Attachments
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Because you use input JFET which have lower gain than BJT and Latfet output which is also have lower gain than BJT. How much low that you consider as low THD?
In my simulation, I used resistor loading instead of current mirror. It can achieve low enough THD.
https://www.diyaudio.com/forums/solid-state/248105-slewmaster-cfa-vs-vfa-rumble-1054.html#post6461396
Hi bimo
With this circuit I simulated 0.00002% thd @ 1khz @ unloaded. I believe it is good.
What i need is to be sure it will keep vas current stable.
What is your opinion regarding the feedback resistor between vas and input mirror emitters?
With this circuit I simulated 0.00002% thd @ 1khz @ unloaded. I believe it is good.
What i need is to be sure it will keep vas current stable.
What is your opinion regarding the feedback resistor between vas and input mirror emitters?
I did not simulate that solution yet. Maybe it increase impedance of the current mirror a bit.
Dr. Arto Kolinummi has other solution which add constant current source at base of positive VAS to base of negative VAS a few micro ampere. Resistor at CM still needed. I simulated this solution with all BJT and can achieve 0.000008% THD at 1kHz 8 Ohm full power.
I also tried that approach but found it difficult to have a good 100ua ccs
Can you please run my asc file ?
It should run as is.
Can you please run my asc file ?
It should run as is.
Note that in this case I left r1 and r57 as (belts and braces).
These 200k resistors are just place holders in case the feedback scheme does not work. They can be removed if the system is stable without.
These 200k resistors are just place holders in case the feedback scheme does not work. They can be removed if the system is stable without.
I have played a bit with your model.
I don't like this way of setting the current in the LTP's because it is highly component and temp dependent, that's why I inserted two 8mA current sources.
I did not immediately understand the complex structure around the input, so for a quick analysis I removed this.
R17, the 4R resistor was replaced by 2R.
Amp was perfectly stable with all loads.
To lower distortion by 16dB, a second order feedback was arranged around the VAS feedback.
Hans
.
I don't like this way of setting the current in the LTP's because it is highly component and temp dependent, that's why I inserted two 8mA current sources.
I did not immediately understand the complex structure around the input, so for a quick analysis I removed this.
R17, the 4R resistor was replaced by 2R.
Amp was perfectly stable with all loads.
To lower distortion by 16dB, a second order feedback was arranged around the VAS feedback.
Hans
.
Thank you very much Hans.
Now I feel much more confident about this design.
BTW.... I have the MPP phono on standby waiting for some parts.
Now I feel much more confident about this design.
BTW.... I have the MPP phono on standby waiting for some parts.
The problem you are trying to solve with the Slone is that the VAS input voltage is not defined by any reference voltage, so it depends on the VAS base current and the Early voltage of each transistor connected to that node, as well as the common mode offset current of the LTP.
R1 and R12 work then by shunting current from the VAS input to stabilize it's input voltage. This shunting lowers loop gain so you have a tradeoff between loopgain and VAS current stability.
The "proper" solution is a common mode control loop which regulates the VAS current (which is common mode) without affecting the forward gain (which is differential mode).
R1 and R12 are both ways of regulating VAS current without a common mode control loop (who said it was necessary anyway). R1 works passively by shunting VAS input current to the CM input which acts as a voltage reference. R12 works actively by converting the VAS and CM into a CCS (analogous to the standard 2Q CCS).
R1 shunts the VAS input voltage which includes the drop of it's emitter resistor and associated Vbe's. Both the VAS base current and Vbe's cause a positive tempco.
Either resistor must shunt the same current from the VAS node when it is working correctly, but R12 has the advantage that it only responds to VAS current, not Vbe. Therefore one mechanism of positive tempco is eliminated, and distortions conveyed by Vbe are also eliminated. Applying feedback through the CM emitter also eliminates tempco caused by the CM Vbe, although it is still affected by the LTP quiescent tempco.
So it seems to me that R1 could be eliminated and R12 will provide the same or better VAS stability with less loss of loopgain.
The combined current offset of the LTP will determine how large R12 can be. The offset current creates a voltage across R12 which determines the voltage offset on the R11. So if you have zero LTP offset, the VAS base still draw 3uA, so 3uA*3k=9mV, 9mV/33=270uA or a 2.7% change in VAS current. If your LTP offset current is 30uA then you have a27% change in VAS current.
So your final distortion value is largely limited by your LTP offset current because that determines how large you can make R12 (the action of which reduces loopgain and increases distortion). This is the kind of lose-lose scenario that drives people like Bonsai to design a common mode control loop instead.
If you want this circuit to work optimally you will use precision emitter resistors in the LTP and current mirrrors and match the transistors, and then find the largest value of R12 that gives satisfactory bias stability.
R1 and R12 work then by shunting current from the VAS input to stabilize it's input voltage. This shunting lowers loop gain so you have a tradeoff between loopgain and VAS current stability.
The "proper" solution is a common mode control loop which regulates the VAS current (which is common mode) without affecting the forward gain (which is differential mode).
R1 and R12 are both ways of regulating VAS current without a common mode control loop (who said it was necessary anyway). R1 works passively by shunting VAS input current to the CM input which acts as a voltage reference. R12 works actively by converting the VAS and CM into a CCS (analogous to the standard 2Q CCS).
R1 shunts the VAS input voltage which includes the drop of it's emitter resistor and associated Vbe's. Both the VAS base current and Vbe's cause a positive tempco.
Either resistor must shunt the same current from the VAS node when it is working correctly, but R12 has the advantage that it only responds to VAS current, not Vbe. Therefore one mechanism of positive tempco is eliminated, and distortions conveyed by Vbe are also eliminated. Applying feedback through the CM emitter also eliminates tempco caused by the CM Vbe, although it is still affected by the LTP quiescent tempco.
So it seems to me that R1 could be eliminated and R12 will provide the same or better VAS stability with less loss of loopgain.
The combined current offset of the LTP will determine how large R12 can be. The offset current creates a voltage across R12 which determines the voltage offset on the R11. So if you have zero LTP offset, the VAS base still draw 3uA, so 3uA*3k=9mV, 9mV/33=270uA or a 2.7% change in VAS current. If your LTP offset current is 30uA then you have a27% change in VAS current.
So your final distortion value is largely limited by your LTP offset current because that determines how large you can make R12 (the action of which reduces loopgain and increases distortion). This is the kind of lose-lose scenario that drives people like Bonsai to design a common mode control loop instead.
If you want this circuit to work optimally you will use precision emitter resistors in the LTP and current mirrrors and match the transistors, and then find the largest value of R12 that gives satisfactory bias stability.
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Yes, i left r1 there as a place holder for the pcb layout.
I will use it only if r12 does not work.
R1 comes from cordell book so I know it works. (Everything i built following Bob's designs works well).
I call it belt and braces solution.
I will use it only if r12 does not work.
R1 comes from cordell book so I know it works. (Everything i built following Bob's designs works well).
I call it belt and braces solution.
I verified that using R12 = 3kohm, VAS output impedance is 34ohm from 100hz to 100khz.
Using R12 = 5kohm I have higher OLG but VAS OI is lowered to 21ohm
Using R12 = 10kohm, OLG is now 100dB @ 10Hz and VAS OI is 11ohm (In this case any mismatch between resistors and betas can get the circuit non operational.)
What should be the best VAS output impedance in this circuit ?
Using R12 = 5kohm I have higher OLG but VAS OI is lowered to 21ohm
Using R12 = 10kohm, OLG is now 100dB @ 10Hz and VAS OI is 11ohm (In this case any mismatch between resistors and betas can get the circuit non operational.)
What should be the best VAS output impedance in this circuit ?
The VAS output impedance falls because there is more loopgain to keep it's output voltage constant as it is loaded. So lower is better. Inability of the amp to regulate it's VAS output voltage translates to higher distortion.
Thank you Kean.
Now I understand better the VAS output impedance.
So when I there is higher VAS output impedance (as in my folded cascode 1 stage power amp), VAS output voltage will not be totally under control and so distortion will rise. I noticed it principally in the LF.
Now I understand better the VAS output impedance.
So when I there is higher VAS output impedance (as in my folded cascode 1 stage power amp), VAS output voltage will not be totally under control and so distortion will rise. I noticed it principally in the LF.
Finished populating the boards according to the latest schematic below.
The layout has provision for a floating IPS current setting based on a trimmer between the N and PJFET sources and also for two CCS to do the same IPS current setting.
In my first build I did not populate the CCS and am using the floating R Trimmer.
R12 is now 5k1 ohm. (R1 is not present in this layout)
Instead of a resistor based OPS bias spreader I am using a CFP Bias spreader (Q17 Q18)
Output stage current is quite stable because of the CFP bias spreader.
VAS current is not so stable... in wanders slowly between 10 to 8mA
Offset also wanders between 2.5mV and -0.8mV
I would like to freeze VAS current while idling but have no idea why it is not stable right now.
Varying offset adjustment does not affect VAS current variations in LT SPICE and has very small effect in the real build so I believe offset control is not related to VAS current variations. That leaves off the option to use a servo for offset control.
Voltage over R69 is stable at 2.26V so current in the IPS is not wandering. (I confirmed by reading a stable 46.5mV on R41 (NJFET emitter degen 11ohm))
This leaves off the option to use the CCS to set IPS current as this is stable as is.
The only possible solution seems to be to reduce R12 from 5k1 to 3k as this will render VAS current more stable. The penalty will be a slight increase in 20THD.
So my final question is: Why does VAS current fluctuate ?
The layout has provision for a floating IPS current setting based on a trimmer between the N and PJFET sources and also for two CCS to do the same IPS current setting.
In my first build I did not populate the CCS and am using the floating R Trimmer.
R12 is now 5k1 ohm. (R1 is not present in this layout)
Instead of a resistor based OPS bias spreader I am using a CFP Bias spreader (Q17 Q18)
Output stage current is quite stable because of the CFP bias spreader.
VAS current is not so stable... in wanders slowly between 10 to 8mA
Offset also wanders between 2.5mV and -0.8mV
I would like to freeze VAS current while idling but have no idea why it is not stable right now.
Varying offset adjustment does not affect VAS current variations in LT SPICE and has very small effect in the real build so I believe offset control is not related to VAS current variations. That leaves off the option to use a servo for offset control.
Voltage over R69 is stable at 2.26V so current in the IPS is not wandering. (I confirmed by reading a stable 46.5mV on R41 (NJFET emitter degen 11ohm))
This leaves off the option to use the CCS to set IPS current as this is stable as is.
The only possible solution seems to be to reduce R12 from 5k1 to 3k as this will render VAS current more stable. The penalty will be a slight increase in 20THD.
So my final question is: Why does VAS current fluctuate ?
You can try putting a finger on the transistor cases to see which transistors have the highest thermal effects. Does it drift when you blow on it?
Going from 5.1k to 3k is not much of a penalty considering how much could have gone wrong, This isn't such a bad result.
Going from 5.1k to 3k is not much of a penalty considering how much could have gone wrong, This isn't such a bad result.