This is the continuation for the hardware part of https://www.diyaudio.com/community/threads/stm32-usb-to-i2s-multi-channel-log-ask-for-help.409771/
For active speakers, all DSP can be now done in the Host (Rpi with CamillaDSP, Windows), but are not that many options to output those multiple channels to DAC or amplifiers. So the objective is to provide an open "simple" USB to 4xI2S, so 8 channels, implementing UAC2 in Asynchronous mode.
I nthe end it looks as a simplified version of https://www.minidsp.com/products/usb-audio-interface/mchstreamer-lite (which I was not aware of when I started the project).
PCB will be designed with KiCAD. HW design and source code will be in Github at the end.
The project is strongly inspired from: https://www.diyaudio.com/community/threads/open-sourced-uac2-bridge-based-on-stm32.404656/ (credits to @slerpxcq) and will be based on a stm32 processor.
I want to keep it a simple device to ensure that the project will succeed (and avoid fitting all possible functions). Clear and realistic use cases are the key.
I'm not a pro and I'm a slow doer... so this is not for tomorrow ;-)
I'm missing many skills in hardware, so all advices are welcomed to achieve a sound design.
Specifications:
Specs of the USB to 4xI2S board:
Proof of concept working with stm32F746 Disco board:
In assembly perspective, source as many as possible components from JLCPCB (preferably Basic components)
On JLCPCB, there is a large choice of stm32H7 at reasonable prices (simlar to F4 and cheaper than F7). They offer higher process power. Interesting references:
STM32H723VGT6 MFR.Part # STM32H723VGT6 Package LQFP-100(14x14), Description 1MB 564KB FLASH 80 1.71V~3.6V 550MHz LQFP-100(14x14) Microcontroller Units (MCUs/MPUs/SOCs) ROHS
Typical and maximum current consumption should be in the 150-250mA. This looks OK for the SY8088 that can deliver up to 1A
First tentative BOM:
I will log progress, questions and so on here.
Best regards,
JMF
For active speakers, all DSP can be now done in the Host (Rpi with CamillaDSP, Windows), but are not that many options to output those multiple channels to DAC or amplifiers. So the objective is to provide an open "simple" USB to 4xI2S, so 8 channels, implementing UAC2 in Asynchronous mode.
I nthe end it looks as a simplified version of https://www.minidsp.com/products/usb-audio-interface/mchstreamer-lite (which I was not aware of when I started the project).
PCB will be designed with KiCAD. HW design and source code will be in Github at the end.
The project is strongly inspired from: https://www.diyaudio.com/community/threads/open-sourced-uac2-bridge-based-on-stm32.404656/ (credits to @slerpxcq) and will be based on a stm32 processor.
I want to keep it a simple device to ensure that the project will succeed (and avoid fitting all possible functions). Clear and realistic use cases are the key.
I'm not a pro and I'm a slow doer... so this is not for tomorrow ;-)
I'm missing many skills in hardware, so all advices are welcomed to achieve a sound design.
Specifications:
- One board USB to 4xI2S,
- then possible expansion boards (as examples ; connected with flat ribbon cables):
- 4 optical Toslink,
- 4 SPDIF
- 8xchannels DAC SE (ES9080 ; my personal objective),
- 8xchannels DAC Balanced (2xES9080)
Specs of the USB to 4xI2S board:
- USB 2.0 HS with UAC2
- Asynchronous feedback
- To 8xI2S or 8xSPDIF 24-32 bits up to 192k
- Connector identical or inspired from https://www.minidsp.com/products/usb-audio-interface/mchstreamer
- Audio Frequencies crystals for 44.1 and 48k audio families (TBC)
- few (ex 5x) Digital IO
- 1xAnalog input
- 1 or 2 xI2C (to possibly control connected devices like the ES9080 which is my primary objective)
- Serial line
- 1 or 2 xLed
- Powered from USB
- Exports 5V (and 3.3V) to Expansion boards?
Proof of concept working with stm32F746 Disco board:
- at 200 MHz
- Using For Stm32F7 test code for 192k 32bits: RAM: 140Ko and Flash: 108Ko
In assembly perspective, source as many as possible components from JLCPCB (preferably Basic components)
On JLCPCB, there is a large choice of stm32H7 at reasonable prices (simlar to F4 and cheaper than F7). They offer higher process power. Interesting references:
STM32H723VGT6 MFR.Part # STM32H723VGT6 Package LQFP-100(14x14), Description 1MB 564KB FLASH 80 1.71V~3.6V 550MHz LQFP-100(14x14) Microcontroller Units (MCUs/MPUs/SOCs) ROHS
Typical and maximum current consumption should be in the 150-250mA. This looks OK for the SY8088 that can deliver up to 1A
First tentative BOM:
- STM32H723VGT6 (MFR.Part # STM32H723VGT6 JLCPCB Part # C730142)(4.8$ extended)
- USB Phy USB3300 (USB3300-EZK-TR (MFR.Part USB3300-EZK-TR JLCPCB Part # C108383) (1.2$ extended)
- TYPE-C-31-M-12 (MFR.Part TYPE-C-31-M-12 JLCPCB Part # C165948) (0.2$ extended)
- USBLC6-2SC6 Manufacturer UMW(Youtai Semiconductor Co., Ltd.) MFR.Part # USBLC6-2SC6 JLCPCB Part # C2687116 (0.03$ extended)
- SY8088IAAC (Manufacturer Silergy Corp MFR.Part #SY8088IAAC JLCPCB Part #C479072 (0.05$ extended)
- Crystals NZ2520SDA for both sampling frequencies families (Digikey)
I will log progress, questions and so on here.
Best regards,
JMF
Even if not finished, to prepare the MCU configuration and pins layout, I share main ideas below. Feedback welcomed:
For clock frequencies like those targeted for stm32H7, it seems preferebal to implement a 4 layers PCB than a 2 layers one, from EMI perspective. High speed tracks need specific attention.
- SYS
- The USB needs a precise clock, which can't be achieved alone by the internal HSI oscillator, as it is not precise enough. The stm32H7 has a clock recovery system, CRS, to calibrate the HSI with the SOF signal. But it looks safer to use an external oscillator, as in the Nucleo board.
=> External 8MHz HSE, for a 544 MHz system clock - No LSE, will use the LSI
- CRS disabled
- Audio Clock Input (I2S_CKIN)
- Power parameters TBD?
- Time base on TIM6 as using USBX which needs Systick. Check clocking scheme for TIM6 for that purpose
- The USB needs a precise clock, which can't be achieved alone by the internal HSI oscillator, as it is not precise enough. The stm32H7 has a clock recovery system, CRS, to calibrate the HSI with the SOF signal. But it looks safer to use an external oscillator, as in the Nucleo board.
- Debug
- Trace Asynchronous SW <=> SWD + SWO for traces output
- USB_OTG_HS:
- Externel Phy - Device Only
- Activate_SOF unchecked (TBC). No use of SOF out of the stm32H7. The captures for the feedback values are done internally
- Activate VBUS is disabled as the board will be powered by the USB (AN4879 section 2.6). (TBD: as ULPI is used, no need to take care of requirements listed in https://community.st.com/t5/stm32-mcus/management-of-vbus-sensing-for-usb-device-design/ta-p/49485
- (TBC: no alternate pins for USB periph to UPLI connection)
- SAI (SAI1 and SAI4):
- The SAI clock will be generated from dedicated audio frequencies crystales through I2S_CKIN
- SAI will be possible to configure as:
- Either SAI1_A master with master clock out, SAI1_B Synchronous slave, External Synchro out (to control the SAI slaves), SAI4_A Synchronous slave, SAI4_B Synchronous slave,,
- Or 2xSPDIF each (total 4 SPDIF)
- TIM2
- Counting will be done on the Audio master clock, for best precision
- For the stm32H723, TIM2 can be synchronized to USB_OTG_HS_SOF and ITR5,
- On SOF, the capture function will be used and the Timer will be reset,
- Reset mode,
- Clock source = ETR
- Channel1 Input capture triggered by ITR5 (USB SOF)
- Check what is CubeIDE option "use ETR as clearing source"?
- I2C2:
- to be on opposite side compared to most USB ULPI pins
For clock frequencies like those targeted for stm32H7, it seems preferebal to implement a 4 layers PCB than a 2 layers one, from EMI perspective. High speed tracks need specific attention.
I'm working on the schematic:
Open questions:
Power section:
I consider an I2S/TDM header and a Misc header:
I2S/TDM:
Misc Header:
Open questions:
Power section:
- Primary design is for the board to be powered by the Host USB. The board won't perform D/A and have an Analog section => Is it needed to implement the possibility of an External 5V for the board? For which purpose?
- On open-sourced-uac2-bridge-based-on-stm32, the power section is based on a SY8088 DC-DC step down converter to deliver the 3.3V from the USB 5V. What would be the reasons not to use a simpler fixed 3.3V LDO like TLV1117-33 or AMS1117-33? (ex the coreh743 board uses an AMS1117)
I consider an I2S/TDM header and a Misc header:
I2S/TDM:
- Dupont 2x4 2.54 pitch connector for I2S and I2C
- 1 MCLK out ; 2 BCLK
- 3 LRCLK ; 4 I2S data out 1&2
- 5 GND ; 6 I2S data out 3&4
- 7 I2S data out 5&6 ; 8 I2S data out 7&8
Misc Header:
- Dupont 2x2 2.54 pitch connector Power (or 1x3):
- 1 5V Out ; 2 GND
- 3 3.3V ; 4 GND
- 5 I2C SCL ; 6 I2C SDA
- 7 I/O ; 8 I/O
- 9 I/O ; 10 I/O
- 11 I/O ; 12 I/O
IME external 5V is not needed. Linear 3.3V regulator is fine but I would use something better than AMS1117. E.g. TPS7A20 or NCV8165.
Unless you include RF connectors for I2S (e.g. U.FL) I would use the second row of I2S pin header for GND. In this way flat ribbon cable would have GND wire between all signal wires. But this would require 2x7 pin header.
Unless you include RF connectors for I2S (e.g. U.FL) I would use the second row of I2S pin header for GND. In this way flat ribbon cable would have GND wire between all signal wires. But this would require 2x7 pin header.
Thanks for the feedback Bohrock. Using a a better LDO would be to reduce noise on the crystals for the audio clock and possibly the I2S lines? I believed (which may be wrong) that this use case was not very sensitive to noise. I would be happy to learn.
By the way, for your similar boards, do you use 2 layers or 4 layers PCBs?
JMF
By the way, for your similar boards, do you use 2 layers or 4 layers PCBs?
JMF
Better LDOs are not only about lower noise as they also have better PSRR at HF. Also the package is smaller so they take up less PCB space. On my boards audio clocks are digitally isolated from MCU and powered separately.
My boards have 4 layers which I would consider minimum.
My boards have 4 layers which I would consider minimum.
I had a read to the discussions in https://www.diyaudio.com/community/threads/es9038q2m-board.314935/page-399 (and following pages) about the clocking possibilities for the Master Clock. Markw4 advocates a dedicated crystal near the DAC. In my case I always thought about putting the effort upstream on the stm32 and I'm following your advice of 2x good audio freq crystals to clock the SAI's.
What are the conditions to make this worthwhile and not have a too degraded MCLK reaching the DAC, so that the result is "similar" to having dedicated crystal near the DAC?
What are the conditions to make this worthwhile and not have a too degraded MCLK reaching the DAC, so that the result is "similar" to having dedicated crystal near the DAC?