Tcxo

Status
Not open for further replies.
Jump to Latest
X

XTAL

Member
Joined 2003
#1
Dear All,
I want to build a DAC.
The combination CS8414 --> DF1704 -->PCM1704.
Q1 : I read the page 6 of DF1704 spec. sheet. The table show the fs 44.1k (It means the CD player O/P? It's fixed value ?). So I can only apply the 11.2896, 16.9344 and 22.5792 ?
Q2 : Do you have any web site will sell the TCXO like the above frequency? Please recommand.

Thanks a lot
 
#6
VCXO Not required

Hello Fin,
although I am not Guido I can probably answer your question.
A voltage controlled osc is not really required for the application you are going to use it for.
The added complexity of the osc circuit will make the Phase Noise ( Jitter ) performance of the osc worse and good Phase Noise performance is what you are really after.

Regards
Blair
 
#7
hi XTAL,

TCXO (Temperature Compensated Crystal Oscillator) belongs to the higher grade oscillator and usually have better temperature stability as well as frequency stability, and hopefully less jitter.

You may have a look around Farnell and Digikey for TCXO.

BTW, do you really need a crystal in your config?

Figure14 on DF1704 datasheet (page16) shown how DF1704 XTI is connected from the CS8414 MCK (pin19). I guess if you feed 16.934MHz crystal into XTI (running 384fs), your DAC will only accept 44.1KHz sampling rate but not 48KHz or 96KHz.
 
#8
TCXO vs XO

Hi Xtal,
purchasing a TCXO rather than a XO does not guarantee you that the jitter performance will be any better than a XO.

A well made XO will have better jitter performance compared to a TCXO using the same circuit topology . This is due to the compensation network normally ( resistor / capacitor and themister ) adding additional noise.

Regards
Blair
 
#9
Re: VCXO Not required

BlairHatcher said:
Hello Fin,
although I am not Guido I can probably answer your question.
A voltage controlled osc is not really required for the application you are going to use it for.
The added complexity of the osc circuit will make the Phase Noise ( Jitter ) performance of the osc worse and good Phase Noise performance is what you are really after.

Regards
Blair
Click to expand...


Hi

Nothing to add, perfect answer (though realy good VCXO's are nearly as good as free running oscs, but not as good.......)

cheers
 
#10
banana said:
hi XTAL,

TCXO (Temperature Compensated Crystal Oscillator) belongs to the higher grade oscillator and usually have better temperature stability as well as frequency stability, and hopefully less jitter.

You may have a look around Farnell and Digikey for TCXO.

BTW, do you really need a crystal in your config?

Figure14 on DF1704 datasheet (page16) shown how DF1704 XTI is connected from the CS8414 MCK (pin19). I guess if you feed 16.934MHz crystal into XTI (running 384fs), your DAC will only accept 44.1KHz sampling rate but not 48KHz or 96KHz.
Click to expand...

Hi

TCXO have less VLF jitter, but again, that is of NO importance for audio playback

pin 19 contains too much jitter for serious low distortion conversion...........

enjoy
 
#11
I would like to confirm Guido Tent statement - that normally TCXO’s (the types that use “Tuner” diodes) normally have worst LF say 0.1Hz to 10KHz (not VLF) phase noise then simpler XO’s (The diode junction and supporting biasing circuit can introduce significant LF Phase Noise).

However, some “budget” TCXO’s use a combination of capacitor dielectrics as the crystal load - to achieve temperature compensation, and there’s no reason why this method of temperature compensation should introduce more phase noise then standard non compensated XO circuits.

For normal high-end audio use (i.e. non archiving), there’s no need for an ultra accurate master clock frequency – only short-term phase noise is important.

Better to spend you money on ultra low noise PSU for the clock, don’t even consider 7805 – 317 type regulators for this application (Ok for Pre-regulation), as they are very noisy at LF. Interestingly a LM7805 has lower LF noise then a well-decoupled LM317 (with 100uF + 100nF on its V-Adjust pin).

The lowest phase noise conventional clock circuit in the range of 10MHz to 25MHz (higher with 3rd / 5th order harmonic operation) is a discrete transistor Pierce oscillator & single transistor output buffer – not to be confused with the poor phase-noise Pierce designs based around a CMOS logic gate.
 
#12
Hi XTAL

Sorry if I have caused your thread to go in a slightly different direction than you intended - but hopefully some of this additional information might help anyway.


BlairHatcher said:
Hello Fin,
although I am not Guido I can probably answer your question.
A voltage controlled osc is not really required for the application you are going to use it for.
The added complexity of the osc circuit will make the Phase Noise ( Jitter ) performance of the osc worse and good Phase Noise performance is what you are really after.

Regards
Blair
Click to expand...

Thanks Blair
So where is a VCXO generally used? Is it mainly for reclocking the SPDIF in an external DAC?


Guido Tent said:
Hi

Nothing to add, perfect answer (though realy good VCXO's are nearly as good as free running oscs, but not as good.......)

cheers
Click to expand...


Hi Guido

So, if XTAL were to place his proposed DAC inside his CDP and control the clocking/reclocking from a free running osc, he could achieve better jitter results????

Alternatively, if he placed a free running osc in the external DAC and fed that back to the transport/CDP, it would also work well??
 
#13
Hello Fin,
in terms of audio I am not to sure where you would require a VCXO. For other applications the voltage control is used to correct for the aging of the xtal which would be app 1 ppm / yr for a good xtal depending on the package type.
Can also be used for FM modulation in cell phones and radio phone applications.

Regards
Blair
 
#14
#15
Thanks all,
Actually, I am a beginner of the DAC and electronics.
I saw it in Wadia 861 CDP, so interest in this component.
I don't know the outcome when I apply it.

Banana
You means the 32K , 44.1K , 48K , 96K is the upsampling? If I connect a CDP 44.1k it will be up to 96K sampling when I apply 24.567MHz ?

Thanks
 
#16
Fin said:
Hi XTAL

So where is a VCXO generally used? Is it mainly for reclocking the SPDIF in an external DAC?

So, if XTAL were to place his proposed DAC inside his CDP and control the clocking/reclocking from a free running osc, he could achieve better jitter results????

Alternatively, if he placed a free running osc in the external DAC and fed that back to the transport/CDP, it would also work well??
Click to expand...


Hi

A VCXO can be tuned, using a PLL circuit, to lock the VCXO freq to another clock, in the case of a DAC that clock is derived from SPDIF.

Clock in DAC and feedback works well. Make sure to respect RF wise signal handling

cheers
 
#17
You means the 32K , 44.1K , 48K , 96K is the upsampling? If I connect a CDP 44.1k it will be up to 96K sampling when I apply 24.567MHz ?
Click to expand...

hi XTAL,

DF1704 is a "8 times Oversampling Digital Interpolation Filter", that means it'll "upsample" input data (synchronizely) at the rate of 1:8. For example 44.1KHz input sampling rate will be upsampled (better say oversampled) to 352.4KHz.

Table I listed the required system clock frequency for different input sampling rate.

If your digital sourse is a CDP, there is no problem to run a fixed system clock. However, if you use DVDP as your sourse, I'm afraid there might be mismatch problem. Using the recovered clock from the DIR could solve this problem.

Experts please correct me if I missed anything.
 
#18
Hi Guido

Originally posted by Guido Tent
A VCXO can be tuned, using a PLL circuit, to lock the VCXO freq to another clock, in the case of a DAC that clock is derived from SPDIF.
Click to expand...

In this case, how important is the quality of the clock in the transport?
If the SPDIF is infected with jitter from going through the interconnect, how does the VCXO lock onto a moving target?
Does it somehow just get an idea of what the frequency should be and then provide a new, clean and precise frequency?

Originally posted by Guido Tent
Clock in DAC and feedback works well. Make sure to respect RF wise signal handling.
Click to expand...

How do you do this? Use a screened cable to feed the clock to the transport?

From a jitter point of view, is the best possible option to place the dac inside the cdp and clock it from a free running XO (XO2 Module)?

If so, is reclocking still advisable?
 
#19
Fin said:
Hi Guido

In this case, how important is the quality of the clock in the transport?
If the SPDIF is infected with jitter from going through the interconnect, how does the VCXO lock onto a moving target?
Does it somehow just get an idea of what the frequency should be and then provide a new, clean and precise frequency?



How do you do this? Use a screened cable to feed the clock to the transport?

From a jitter point of view, is the best possible option to place the dac inside the cdp and clock it from a free running XO (XO2 Module)?

If so, is reclocking still advisable?
Click to expand...

Hi

The drive should add as little jitter as possible, as any DAC is " just" a jitter attenuator, not an eliminator

Best is to have afree running clock close to the DACs, and reclock all signals entering the DAC.

In case of a seperate drive, the clock can be fed back from the DAC to the drive using a 75 ohm transmission line system, with 75 ohm driver, connectors/cable and 75 ohm termination.

Video opamps are quite suitable to perform this function
cheers
 
#20
Guido Tent said:
Best is to have a free running clock close to the DACs, and reclock all signals entering the DAC.
Click to expand...

So, in a one box CDP, is it beneficial to reclock the signal between the filter and DAC?

If the filter is included in the DAC chip (SAA7321), is it worthwhile to reclock between the decoder and filter/dac?
 
Status
Not open for further replies.
Top Bottom