Return-to-zero shift register FIRDAC

[Markw4]

The simulation set-up of Hans can read in a .dsf file and calculate an FFT using LTSpice, if I understand it correctly.

Isn't the question about the algorithm used?

To calculate a DFT directly from a DSD stream, wouldn't that require cross-correlation of sine and cosine waves with the DSD stream of 1-bit samples? It would presumably be a form of averaging, seems like anyway. (where a 1 is taken as a +1 sample, and a 0 is taken as a -1 sample, or something equivalent to that?)

 

[ThorstenL]

The ADC and DAC have separate voltage references, so they will drift a bit with respect to each other when the temperature changes. How would that cause pumping?

It would not. But (if say) the regulator employed a complex AC/DC feedback scheme with peaking at sub-hz frequencies... (and yes, I did that and found out)...

Well, I'll be thunderstruck.

That's correct: the order is typically around five and any normal single-loop sigma-delta modulator of order greater than two is conditionally stable in the control-theoretical sense: reduce its loop gain too much without changing the loop's poles and zeros and it will oscillate. That's true no matter whether the loop filter is analogue or digital.

Why is this relevant?

I am trying to determine our confidence level that our digital domain modulators do not have some weird sub-Hz oscillation. I had some interesting experiences with sub Hz loop instability (in the analogue age) involving VERY large and VERY hot industrial plant machinery, which seared itself literally into both retina and memory. So I guess burned children and all that.

For PCM2DSD v4, my hypothesis was that there is some extremely small digital offset left, leading to split peaks with a distance well below the resolution bandwidth of the measurement. It sounded plausible until v3 and PWM8 also turned out to have varying distortion levels.

Well, we can only state that the system composed of Modulator(PCM2DSDV3, PCM2DSDV4, PWM8), DAC(RTZ) and ADC(suffusion of yellow) have what appears in an FFT to be varying distortion levels and unexpected distortion (I presume - as this unexpected distortion send us on this collective snark hunt and ALL THE WAY down the rabbit hole....

I can and have simulated the spectrum of PWM8 in the digital domain. I can run it longer and do DFTs on several parts of the output waveform.

Mind you, the SRC4392 asynchronous sample rate converter that I use and the interpolation chain are not included. The SRC4392 definitely has something with large time constants on board, namely the sample frequency ratio estimator.

Besides, I usually haven't included the dithered integer arithmetic used in the FPGA code, but rather extended wordlength floating point numbers - except for the quantizer output, of course.

Reminder to self, all simulation is only as good as the models are complete... As models are never complete, selecting what to omit is a minefield.

The simulation set-up of Hans can read in a .dsf file and calculate an FFT using LTSpice, if I understand it correctly.

Splendid, Does anyone with PWM8 and PCM2DSD hardware also happen to have a sufficiently fast logic analyser to record the output?

Thor

 

[MarcelvdG]

Isn't the question about the algorithm used?

To calculate a DFT directly from a DSD stream, wouldn't that require cross-correlation of sine and cosine waves with the DSD stream of 1-bit samples? It would presumably be a form of averaging, seems like anyway. (where a 1 is taken as a +1 sample, and a 0 is taken as a -1 sample, or something equivalent to that?)

Yes. You can also interpret it as 0 and 1, then you get a big DC peak.

Basically, a sigma-delta modulate is just a PCM signal with a rather short wordlength and a funny noise spectrum. Calculating its DFT is not different from doing the same with an ordinary PCM signal.

 

[ThorstenL]

Yes. These measurements were made with my own ES9822PRO based ADC.

Ok, my bad. I must have missed that bit.

I guess given that Pjotr25 also noticed pumping, we can exclude the ADC, unless you both use the same one.

Thor

 

[Markw4]

@ThorstenL I have a Saleae logic analyzer which is good for signals up to 50MHz or so, but no PWM8.

Don't know if Bohrok2610 can loopback a DSD stream or not. IIUC he did his own USB device implementation using STM32?