Consumer audio standard line level output is -10 dB, 0.316 V rms [dB = 20 * log (V/1V)]. Some devices like computer sound cards can boost that at the max volume settings, my Asus Xonar can do 6 dB or 2 V rms. Quite a lot of digital audio produces 2 V rms output, DACs and CD players and not just computer sound cards.

The amount of output current required by the line driver is the signal level divided by the load impedance, so to estimate the worst case scenario we have to consider the smallest practical load and the largest likely signal. The input impedance of consumer audio is typically 10k to 100k. 10k is the lowest design point, but sometimes people do strange things like drive two components at once which halves the value, or headphones, or pro audio gear with 600 ohm inputs.

The long and short of it, though, is that consumer audio inputs are never normally going to draw more than 1 mA. For pro audio the maximum is meanwhile 3 mA. 5 mA bias current through...

A [just my opinion, bro] post...

I actually had occasion to try this the other week. I had a box with a volume control followed by the bboard unity gain buffer and in preparation for replacing it with a similar buffer with voltage gain (a power-derated Sapphire 3) I removed the buffer and briefly used the box as passive preamp, i.e. just the 47k stepped attuator, with 1 m interconnects to the amp and 2 m interconnects back to the phono stage. Sure enough the system noise increased, depending on the position of the volume control, with some nasty low level buzzing interference.

Why does this happen? It's pretty simple really. Noise is usually induced as a current, and the larger the resistance (impedance) this noise current is forced to flow through to reach circuit common, the larger the noise voltage since by Ohm's Law, V=IR. Noise induced between the volume control and the amp is faced with the high impedance of the amp (47k) or the output impedance of the...

When I need to pick the right capacitor for a coupling capacitor, rather than working out the time constant or 3dB cutoff I just remember the mnemonic "0.1-220" (meaning 0.1 uF and 220 kohms) and adjust the ratio up/down for the resistance I happen to be looking at: 0.22-100, 1-22, 0.47-47.

This amounts to a time constant (t=RC) of 20 ms, and 3 dB cutoff of 7 Hz. The bass attenuation at 20 Hz is half a dB.

If there are several stages the attenuation of all these filters add up, so it can be a good idea to make the capacitance about twice as large. There is rarely any advantage making it much larger still.

Excel worksheet attached. It spits out all the numbers so you don't have to guess.

* calculating the attenuation involves complex numbers. Zr=R, Zc=-i/(2 pi f RC), attenuation (high pass) = | Zr / (Zr+Zc) |. In excel you can use IMSUM, IMDIV, and IMABS to do the complex math.

Asus Xonar Essence STX, Audacity 2.1.2, VLC, Windows 10 [and DigiOnSound6 Express for 24 bit recording]

Purpose

To confirm the calibration of the sound card input and output gain. Also, to determine the relationship between the signal voltage, the recorded signal amplitude displayed in Audacity, and the signal peak and noise baseline levels in the FFT spectra.

Summary

* Setting the volume slider of the device output to 100 gives 1 V rms output for an amplitude 0.5 sine wave.
* Setting the volume slider of the device recording line input to 100 gives records a 1 V rms tone as an amplitude 0.5 sine wave, which is displayed in the frequency spectrum (FFT) as peak of magnitude 0 dB in Audacity when both channels are averaged.
* volume setting 100 needed for unity gain loopback.
* 0.5 amplitude sine wave = 0 dB FFT = 1 V rms.
* noise baseline in averaged stereo FFT is 3 dB lower than single channel measurement....

The original VSPS is getting up in years, and could do with a bit of an update.

The VSPSX adds the foursquare shunt-source voltage regulator and bboard v2.1 output buffer.

Development thread here.

[updated attached content to rev. 1.0a4]

Two mistakes in previous BOM:

C4 was a 5mm lead spacing Wima MKP but the board spacing is only 2.5mm. The part is changed to Wima MKS with 2.5mm lead spacing.

R22,23 was incorrectly given as 47.5k, it should have been 4.7k and has been since updated to 10k. This is not a critical value, the circuit will work with any of the resistances.

[further work]

The boards have been revised to 1.2a. The new design is posted to the development thread.

I'm not totally sure this would work as advertised, but I can't see any obvious reason why it would not...

It's pretty much the same circuit as I used in the CrystalFET, which started out in a previous blog post in the Voltage Regulators for Line Level Audio series, but here I've replaced the MOSFETs with bipolars. It is shown configured to deliver 20 mA @ 12 V, split supply. Enough to power an op amp phono stage for example, or a preamp, or the voltage gain stage of a headphone amplifier.

[developed further under the S-Reg name, with pcb layout.]

A little bit of the sapphire headphone amp output stage, and a little bit of the LSK489 application note of all things (scroll down to Fig 10.).

Yes, this is probably the third "version 2" of this line buffer I've posted... I keep tossing it out and starting over. This variant looks pretty good: though the transistor count is a little high for such a basic function the performance is definitely there.

The main innovation re. the sapphire circuit is to replace the bias set resistors with diodes made out of the Vbe of transistors Q9 and Q10. This generates more voltage than is ideal, but can be handled by using largish values for the emitter resistors R13 and R14. Since this is a line stage buffer and not a headphone amplifier the output impedance of about 30 ohms and the limited output current swing are not critical flaws. It will drive 600 ohms at 0 dB with 0.001% THD. The whole circuit draws just 150 mW. The input impedance is a very high ~15 Mohms...

"To fight the bug, we must understand the bug."
--SKY MARSHALL TEHAT MERU

The J113 datasheet (Fairchild) tells you the following important information,

1. The (absolute) maximum gate-source / gate-drain voltage is 35 V.

2. The gate-source cut-off voltage (V_gs0) varies between -0.5 and -3 V.

3. The minimum zero-gate voltage drain current (I_dss) is 2 mA.

4. (from Fig. 11) the transconductance for I_ds 1-10 mA is about 10 mS largely independent of V_gs0.

5. (from Fig. 14) the voltage noise rises at low frequency and decreases with drain current, but is about 2-4 nV/sqrtHz over most of the audio bandwidth.

*****

I bought 200 J113 off eBay, but my measurements were set back after I realized my test rig was oscillating. Fixed that, and can now say a few things in addition to the datasheet.

The first is that the transfer curve (measured at RT, V_ds 10 V) does...

Truth be told, for a self-biased jfet audio circuit like the CrystalFET the main reason we need to used matched jfets is to ensure that the signal gain is the same in both channels. The operating point of the amplifier stage (the voltages and currents) can be allowed to vary a little so long as the transconductance, g_m is the same, as this is directly proportional to the open loop voltage gain, A, as

A = g_m R_l (transconductance x load resistance)

Now, yes, ideally you would find two jfets with identical saturation current and pinch off voltages, ensuring not just the same gain but also the same operating point. In practice though you are usually binning parts that are close to each other based on some reference parameter like the pinch off voltage (V_gs0) that you hope closely correlates with the signal gain. This is not quite as good though as the calculating the actual transconductance of the particular device in the circuit it is to be used in. And since...

with only two resistors, a 9 V battery, and a voltmeter...

The current-voltage relationship for a jfet device is approximately a quadratic expression defined by just two parameters, the saturation current, I_dss, and the pinch-off voltage, which I'll call V_gs0.

I = I_dss (1-V/V_gs0)^2

In principle, therefore, to characterize the device all we need is two data points (I1, V1) and (I2, V2) to solve the expression above for I_dss and V_gs0. We don't need to measure I_dss or V_gs0 directly.

All you need to do is connect the jfet device-under-test (DUT) as shown, and measure the voltages across two different source resistances. That's it. The excel worksheet computes the I_dss and V_gs0 values for you (or you can do it by hand, the formulas are provided.)

The math is a bit messy, but if you can solve a quadratic expression it's easy enough.

*****

Note: I found it was important to include...