I/V stages and noise

I/V stages have been a passion for me for a rather large number of years but only very recently have I approached I/V stage design from the point of view of getting the lowest possible noise. In the past so long as my estimate of the I/V noise was 6dB or more below the best recording noisefloor (say -92dB on 16bit material) then I considered job done. Now though my curiosity has been awakened for pursuit of 'how low can I go?' in relation to I/V stage noise.

The first port of call in an I/V stage has always been an opamp in transimpedance mode. Indeed lots of DAC chips are purpose designed for this kind of I/V and even many have on-chip opamps to facilitate this application. The best opamp I/V I've heard to date was from AD811. So I opened LTSpice and downloaded the AD811 spice model from Analog Devices, pasted it in and I figured I was all set to admire AD811's impeccable noise performance as I/V stage.

But it turns out the rabbit hole goes a bit deeper. Setting the I/V resistor to 600R (as AD811 DS recommends for -1 gain) I got an almost perfectly flat response over the audio bandwidth of 5.3nV/rtHz. That's a noise density figure, to get the full audio band noise, multiply by 141.4 (which is the square root of 20,000). Answer = 0.75uVRMS. To get the SNR plug in the signal level - the DAC is PCM56 with +/-1mA output so the signal is 1.2V p-p or 424mV. Crunch the math and out pops an astoundingly good result of 115dB SNR, even ignoring that the output signal needs gain to bring it up to the 2V standard CD level. But I was suspicious of this as based on my experience of modelling CFB amps on paper, they're kinda noisy and 115dB isn't at all noisy, especially with a flat line down to 20Hz where normally noise would be rising due to 1/f.

So I needed some kind of sanity check for this result. I figured I'd find the lowest noise LT CFB opamp (which require no download of subckts, the LT parts are built in to my LTSpice) and do a comparison. The LT part I settled on is LT1227 - its a bit noisier than AD811 (3.2nV vs 1.9nV on voltage and 32pA vs 20pA on current) but close enough for a sanity check. And the result was interesting : 21nV/rtHz at 1kHz and rising reassuringly below that frequency. A huge difference that could not be accounted for by the DS noise difference. That's 12dB worse and just 103dB SNR if we ignore that the density figure more than doubles by 20Hz.

I'm no expert in deciphering Spice subckts but I decided to have a look to see if the AD811 subckt models the noise. Since I have no idea what to look for I opted to compare with the subckt I downloaded for AD797. I reasoned that because low noise was AD797's big selling point they'd be bound to include that in the model. And sure enough, in AD797's subckt there are helpful comments which show the part of the circuit which sets the noise parameters. There are models (DIN,DEN) which are referred to right at the bottom. I'm guessing they're diodes. Any subckt without these won't model noise and sure enough, AD811 lacks them. As does AD844 which I also tried. Since I already had the subckt for it, I wondered - how does AD797 fare as I/V ? (You need to remove the decompensation node in the definition to make it compatible with a standard 5 pin opamp).

AD797 turns in a very impressive 14.3nV/rtHz figure (using 2.8k feedback resistor) giving an SNR of 120dB. LT's competitor LT1115 fell a fraction of a dB short of the AD797, at 15.1nV/rtHz but LT1128 beat it out by about 1dB, at 13.1nV/rtHz. LT1028 gives the same result as LT1115. Oddly, the 1128 only differs from 1028 by virtue of its compensation, the IPS (and hence noise) should be the same. So the last dB of performance seems an area of uncertainty, but clearly CFB opamps aren't the winners in the SNR stakes.

Going back to good old fashioned pencil and paper, how does AD811 do? Its crucial noise parameter is the inverting input current noise which sees 600//1200 (the latter inside the DAC) so 400R. 20pA * 400ohm gives 1.1uV in 20kHz. The +ve input noise at 1.9nV gives 269nV. The noise gain is 1+600/1200 = 1.5 so I'm getting 1.7uV with 424mV output or 108dB SNR. This excluding the intrinsic noise of the resistors themselves so the real result will be slightly poorer. Rather than do that math, I'll estimate back from the LT1227 result : as -ve input current noise dominates and that's 4dB poorer on LT1227 than AD811, I figure the AD811 result with resistors will be 4dB better than with the LT1227, i.e. 107dB.

I'll go on to talk discrete I/V in a later post.

 

[abraxalito]

Discrete I/V stages normally start with the premise that a common-gate (or common-base) stage is going to be foundational, I see no reason to disagree with this - the only way to avoid this kind of topology is by using vast amounts of negative feedback (see my earlier post). Shed-loads of NFB allow a relatively high impedance circuit node (an opamp LTP input) to become low enough impedance to suit a DAC's output. But if you're going the NFB route, you'll go for opamps in the first instance. If you're going discrete you'll probably be going no-NFB and hence you'll need an intrinsically low input impedance circuit to get the ball rolling. Hence the ubiquity of common-base/gate stages in discrete designs.

Since I like passive filters, when I originally designed my lingDAC several years ago, I went for a passive filter prior to the I/V stage. This does work but I've found its not conducive to getting the lowest noise and many DACs don't like the extra compliance swing that a passive filter introduces. So these days, with my focus on lowering the noise and also becoming more DAC chip agnostic, a passive filter straight after the I/V is the only acceptable solution.

I'm no fan of reinventing the wheel, so I have looked around at other people's discrete I/V stages and pondered their design aims. One which has stood the test of time and gotten lots of praise for its sound is Nelson Pass's D1. The D1 uses a couple of MOSFETs - one as common-gate input stage and the second as source-follower buffer. Nice and simple, so you'd think. But if you want to analyze it in LTSpice you'll need a decently representative MOSFET model and those aren't too easy to come by. Seeing as I'm interested primarily in noise here, noise in MOSFETs seems to be something of a taboo, nobody much seems to like talking about it and no datasheet that I've seen gives even a ballpark typical figure. That's understandable for power MOSFETs (the D1 uses such, at least they come in TO220 packages) but signal MOSFETs also are lacking in data. I have made some very rough measurements myself from installing them as IPS on an NE5534 set to give high gain and found that they're noisy, and the quietest of them are about 10X noisier than typical small-signal bipolars. Don't even try to measure 2N7002, that's about the worst I found. Of course quiet MOSFETs do exist but seemingly only within ICs like OPA1656. Even there though the 1/f noise corner is high-ish, you have to go above 5kHz for them to come into their own.

So firstly I ask myself - why choose a MOSFET in an I/V stage when the aim is getting low (and predictable in simulation) noise? The reason for using MOSFETs must I think have something to do with speed - being majority carrier devices they're dynamically superior to bipolars which suffer from stored charge effects. But fast bipolar transistors do exist so there might be a role in an I/V stage for the right bipolar. When it comes to noise, I can't think of a reason to go MOSFET but I am open to suggestions.

When I first examined D1 I figured that although MOSFETs are noisy brutes the particular circuit being used there is effectively a cascode on the output of the DAC and cascodes aren't really that sensitive to the noise of the cascoding transistor since the noise gain of that configuration is fairly low. The source is looking into a high impedance right? Not necessarily. If you read the small print of audio current-out DAC chips you'll discover that very few are true current-sources (i.e. with high impedance outputs). Mostly the Zouts are in the region of 1-2kohm with PCM63 being the worst offender at 670R. That low output impedance puts a spanner in the works as regards noise in a discrete I/V. Nor does it do any favours for opamps except perhaps for those not unity gain stable. It also means that stacking chips in parallel can't easily improve SNRs as the Zout goes down in proportion to the number of chips paralleled. Hence paralleling chips shouldn't be done at the DAC output, I've yet to figure out where instead though (hold my beer...). TDA1387 with its very hi-Z output impedance doesn't suffer from this effect though, thankfully.

Next post - D1 under the microscope

 

[abraxalito]

Here's my simulation of (half) the I/V stage of D1, less the output buffer. The output is taken from 'drain' and the DAC (PCM63) is represented by current source I2, in parallel with 670R.

A common-gate connected transistor needs its bias set by external resistors or current sources. Making the choice between those two alternatives is at the essence of designing - they each have trade-offs. Resistors give the lowest possible noise but also the poorest PSRR. Current sources are noisier but can have excellent PSRR. So it comes down to - how clean are your PSU rails? In the D1 they turn out not to be particularly clean, they're regulated by 7815 and 7915 with what look to be external zeners to boost the output voltage to 30V. In the simulation I assumed the zeners to be noiseless as I'm not sure how to figure out how noisy they are.

I took the datasheet values for output noise of the regulators but then I looked into how much output noise would be due to insufficient ripple rejection (70dB from the DS). And it turned out that potentially the ripple would dominate over the output noise (I say potentially partly because of the unknown contribution of the zeners). Since D1 uses resistors and its rails aren't particularly clean, you'd expect PSRR issues to show in the sim, and indeed they do. At LF, PSU noise intrudes up to 30dB above the noisefloor. At higher freqs the 220uFs keep rail noise in check. In practice though the design uses a pair of PCM63s each with its own I/V stage so as they're running balanced, the noise from the PSU gets turned into common mode (because it affects both sides equally) and therefore should cancel out at the differencing stage further on down the track. For myself I shy away from relying on something beyond my control (the CMRR of another bit of kit) for getting optimum SQ so letting this much supply noise through is a no-no. Someone somewhere might want to run just one output phase for instance. This is just my personal stance - for my own designs resistors aren't really an option because of the extreme PSU sensitivity.

Given I'm going for current sources over resistors, how to make those as quiet as possible? Turns out that the noise in a CCS is inversely proportional to the square root of the resistance. Here are a couple of examples :

The 10mA CCS on the left is 10dB noisier than that on the right, assuming a noise-free zener. Resistor Johnson current noise in R6 and R8 is what determines the noise, which is the polar opposite to the way we're used to thinking - that higher resistor values give rise to more noise. Seeing as for lower noise we need higher resistor values, the rationale for Pass's choice of 30V supplies in the D1 stage becomes apparent. A lower noise CCS is going to need more voltage headroom, hence hotter rail voltages.

 

[abraxalito]

As a notable variation on the D1, Owen (opc)'s NTD1 is definitely worthy of a mention. In this design he's re-worked the D1 to operate with a much higher current input from ESS DACs, rather than the meager 1 or 2mA that comes from R2R DACs. The MOSFET is also selected especially to give the highest possible gm (transconductance) at the working current. No output buffer is included as the output impedance (180ohm) is low enough to use directly, via a DC blocking cap. Here's a simplified schematic - the real design is balanced, like D1 :

R2 represents the output resistance of the DAC, I've filled in with what I dimly recall the Zout is for ES9018, newer ESS DACs have lower numbers. As with D1, the I/V resistor (R1) is terminated at a power supply meaning no (0dB) PSRR, all PSU noise is sent directly through to the output without attenuation. Of course, in balanced mode this PSU noise cancels out, so the effective PSRR becomes the CMRR of the next stage. However the PSU itself is of heroic design, using an Analog Devices ultra-low noise CMOS regulator, the ADP7142. Being CMOS its noise spectrum shows a high-ish noise corner :

Noise at 20Hz is over 20dB higher than at 20kHz but overall very low at (theoretically) 11uV. When I can access the NTD1 specs I'll update, I think I'll need a VPN to see them.

<Update> NTD1 does not specify output noise (N/A on the spec sheet) but we can infer it from the SNR which is quoted as 128dB. Since the maximum output level is +6dB, the noise must therefore be -122dBV or around 0.8uV (in balanced) or from each side (uncorrelated) 0.5uV.

 

[abraxalito]

Given I'm eschewing the use of the main rails as my voltage reference, I need to generate a local very low noise reference voltage. This is rather less onerous than generating a very low voltage main power rail as I have control of its load and therefore it only needs supply a limited amount of current.

The ubiquitous choice of a reference is a zener diode. Which indeed was my first port of call, based on this thread by @Christer : https://www.diyaudio.com/community/threads/some-noise-measurements-for-leds-and-zener-diodes.35821/. His conclusions there suggest that a 15V zener diode to bias a current source should be a low noise choice as that's far away from the zener/avalanche watershed voltage. So initially I went this route for a current source Vref, taking care to RC filter the output with a 220uF 'lytic and 100R in series.

When I got to measure the output of the DAC which used this voltage reference as the 'pull-up' for the I/V resistor I was surprised to find it considerably noisier than simulation predicted. The noise was though reducible by increasing the capacitance of the 220uF so I began to suspect the zener diode - an OnSemi BZX84C15. Pulling another off the reel into a gash noise measurement set-up (using my Cosmos ADC) the noise it was putting out was extraordinarily high, around -70dBV. I decided to measure a few other voltages for a sanity check and found the opposite of what Christer found - as I reduced the voltage from 15V the zeners got quieter. A Nexperia C13 was around -85dBV and a C10 of unknown manufacturer close to -100dBV. A 6V2 was the most promising of all, at -112dBV. I added a second 6V2 in series and found the noise went up around 5dB (at 30% lower operating current). So the first 6V2 zener wasn't a freak. Perhaps the difference here is I'm measuring SMD zeners (SOT23 case) whereas Christers were leaded.

All these numbers made me doubt zener diodes rather so I turned to IR LEDs, which Christer found were the lowest noise source he measured. I'd previously measured some IR LEDs for dynamic impedance and got promising results, they definitely do better than visible LEDs in that metric. First up I dug out my string of 3mm LEDs I'd used for the dynamic impedance measurements I made and tapped off a measurement point at 8 LEDs in series, giving around 10V. At a bias current around 3mA the noise was getting seriously low, about -120dBV. At this level the accuracy of noise measurements is significantly affected by the ADC's own noise floor, around -123dBV. So 3mm IR LEDs are where its at, noise-wise, easily beating out zeners just as Christer found.

A string of 10 or more 3mm LEDs is kinda expensive in PCB real estate so I wondered if 0603 LEDs would fare as well. It was satisfying to discover they were electrically indistinguishable from their bulkier leaded relatives. I'm now in the process of ripping out all the 15V zeners in my prototype DACs and replacing each of them with 13 0603 IR LEDs in series, quite a fiddly soldering job.

Reading through Christer's introduction again, I wonder whether his results might potentially be compromised by the noise from his current sources. While he mentions the low noise transistor type he used to build those, he doesn't say anything about the configuration - the reference voltage used (and hence resistor value) being rather critical as I pointed out in the previous post.

 

[abraxalito]

I realize I'm extremely late to the I/V party - at least 20 years late judging by this old thread which I just came across : https://www.diyaudio.com/community/threads/simple-i-v-for-tda1541.9226/. Rudolf Broer's not claiming any particular originality for his I/V, he's crediting it as a development of Jocko Homo's (RIP) simple I/V. Its very similar to my own I/V just that I only use one CCS, the bottom one and delete the 'folding' CCS at the top (because it needs ~twice the current and hence adds more noise). Oh, and I cascode the common-base transistor.

What's interesting to me as I'm stuck in the noise rut at present is - there is no mention at all of characterizing the noise of this I/V stage amongst all the comments on the thread. Suggestions to add cascodes (to improve THD), raise the supply rails (to add headroom and improve THD) but nada in the realm of noise. So I am curious to simulate this circuit at some point and see what changes might be able to improve the noise. There are a couple of current sources, each biassed by a green LED so I'd like to see what their noise contribution is like.

Ric Schultz (I'm guessing he of ricevs on Audiogon?) suggests using 3 signal silicon diodes in series in place of green LEDs in the CCSs. I wonder if they're lower noise? I figure the noise of a forward biassed silicon diode is going to be a function of its series R - or maybe its dynamic R? So potentially a high current diode might be lower noise than a signal one. What he doesn't suggest is increasing the bias voltage of the CCSs - that would allow larger Rs and hence give lower noise.

<later> Done the sim, here's what it looks like in LTSpice - the left side of the schematic. I'm getting around 10uV output noise relative to 2VRMS that's an SNR of 106dB. Since the zero point SNR for the chip is typically 110dB its not really doing justice to the 1541A. The right side schematic is with the real-world CCSs replaced with idealized CCSs without any noise. The purpose of this is to explore how much better the SNR can be from improving the CCS noise. It measures almost 10X better. CCS noise turns out to be quite sensitive to the Rser of the voltage sources biassing the CCSs. I've modelled the green LEDs with 2.2V voltage sources and a ballpark 80ohm series resistance. The green LED's dynamic resistance is a major noise source, when that's reduced the SNR improves. In practice the LEDs could be bypassed with large 'lytics to reduce that Rser or they could be run at a higher bias. 3300uF across both improves SNR by 4dB and also improves the PSRR. Beyond that I think the bias voltage would need increasing, with R2 and R3 increasing in proportion.

Incidentally I may have uncovered a bug in LTSpice noise modelling - when I set R2 and R3 to the same value, the noise virtually disappears to zero. This can't happen in real-life can it? Surely it must mean the noise contributions of the two CCSs are cancelling out when equal but that's impossible. If not, then I've found a cool way to get really amazingly high SNR! Ah scratch that, putting both current sources to the same value takes Q2 out of conduction (current flows out of R1 taking the collector too negative).

Doubling R2 and R3 (and using two green LEDs per transistor) gains another 3dB or so with the 3300uFs in place. Now the I/V stage is quieter than the DAC itself.