The FET needs to be low enough noise that the noise of the resistor at the input is being measured.
Which is rather trivial to achive for a 10k source resistance, at 1 kHz and in anno Domini 2014. 10k has 12.8319 nV/rtHz at 25°C; with the 1 nV/rtHz of a BF862 added, that's 12.8708 nV/rtHz. If the particular specimen should have 1.2 nV/rtHz instead, 12.8878 nV/rtHz results. A deviation of 0.13%, which should not matter for most applications--unless one uses very long integration times, the random fluctuation of the measurement is likely higher.
The noise of the stage after the device doesn't need to be that low since the gain of the first stage (the device) should move the noise past any limitations.
With the low gm of JFETs it's surprising how significant the second stage contribution is. There are many, many amplifier designs out there where the second stage hurts the performance significantly, particularly in the 1/f region.
Samuel