AB100 Class AB Power Amplifier

What are the signs of instability? Do I see it in the stability of the bias itself? It seems very stable but haven't played any music through it. Also then how many class A watts do i have before going into AB. Is it 5W per trannie X total number of trannies in that channel(operation now at 5W per trannie). Heatsink only 37C
 
At 5W/ device (~.125A apiece), you have a total current one one side of 0.5A. That is the total peak current available before you run out of gas and transition to class AB. RMS watts is that peak current X 0.7 squared, times the load impedance (I'm assuming 8 ohms). So, you get 0.5 X .7 = 0.35. That squared is 0.1225. That times 8 ohms is 0.98.
 
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So playing around with the AB100 again on bench. How safe is it to start upping the bias on this amp? I have large heatsinks that are plenty big enough, I have raised from 40mA per transistor to 100mA per transistor. Heatsinks measure at 35 C after an hour there. So what are the limits when doing something like this. So what is the power dissipated in each transistor. Is it voltage across emitter-collector x current through transistor??
You are not going to get sonic benefits above 100mA from each device.
 
To all punters out there who have actually built this amplifier, what sort of output offset are you seeing? I ran a sim on the current circuit I showed in post 1319 (though I had to sub 2SA965 and 2SC2235 for the VAS drivers and VBE multiplier due to availability of models - they are TO-92L devices similar to the ones used in the original design), and I'm finding it hard to get below around 100mV output offset, and the input diff pair is out of balance. Simulated distortion at 0.2V input (8V output) is around 0.007%, with very low odd-order content, so that's a comfort, at least.
I may need to add an input balance control....
 
I fixed some bonehead **it in my PSpice schematic, also reverting to the original biasing scheme for the diff pair and lower VAS (getting rid of a surface mount part in the bargain). I'm now getting around 1 mV of output offset - no surprise, as the PSpice models for the input diff pair assume identical devices. I'll run a scan when I get back in to work tomorrow to check distortion now that the input diff stage is all nicely balanced out. Yes, I will be matching transistors for the input diff pair and thermally coupling them together when I finally get around to laying out and building this thing.
 
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Sim and simulated distortion plots for the latest spin of the AB100 design - call it AB100X...
 

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