ADCs and DACs for audio instrumentation applications

My own board. My other DAC boards share the same format so they are interchangeable. Forget about ebay boards as most of them have design flaws which cannot be fixed by hacking.

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How many layers does your board have? I design a ES9038Q2M board with ADP151 for AVCC and Opa1612 buffer for AVCC_L, AVCC_R on 2 layer pcb, one layer is solid gnd plane and only get one channel 2nd harmonic at about -110db, 3rd -120db, another channel is -120db, -108db respectively, opamps for IV and SE converter are also opa1612, do you have any suggestions?
 
My board has 4-layers. Like I mentioned earlier in this thread I did not get very good results with op amp buffer for AVCC_L/R. Also for some unknown reason I have not had great success with OPA1612 in my ES9038Q2M dacs which is why I switched to OPA1656. In my ADCs OPA1612 work better. The ADC used in loopback measurements needs to be good as well as otherwise you may be measuring ADC distortions instead. Lowering the level to -10 dBFS or below may work better with some ADCs. Good ADC is also required for THD compensations of ES9038Q2M.
 
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Also for some unknown reason I have not had great success with OPA1612 in my ES9038Q2M dacs which is why I switched to OPA1656.

Could it be that the OPA1656 is better at handling the load from the differential amplifier/filter?
The I/V op-amps look into a 215 ohm load from the next stage. Combined with the 820 ohm feedback resistor each op-amp (IC6 and IC8) will have a load of 170 ohm. Quite a tough load for an op-amp.

Good ADC is also required for THD compensations of ES9038Q2M.

I think that to adjust the compensation of the DAC a notch filter is needed. This will relax the requirements for the ADC.
 
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altor, why do you believe he needs so crazy tight tolerance yet? In my LPF(SK version) I used 5% C0G and 1% 0207 Viking without matching attempt.
Yes, I use 5% C0Gs and 1% 0204 melfs and based on the results without major issues.
Edit: some of the melfs are actually 0.1%. As I'm not selling these the price difference between 1% and 0.1% melfs does not matter.
 
@bohrok2610,
Thank you for these measurements.
It seems to confirm what I had speculated about (for ESS DACs) that this typical error patterns we see are result of glitch energy wandering around when the converter excercises more than one of the 64 current cell segments (the thermometer-coded 6 bit final output current sources).
1/4th the final converter speed ==> 1/4th of glitch energy per time unit ==> 12dB lower levels in spectrum, theoretically. And higher noise. In DSD mode I saw the noise also goes up and the hash seems to go down as well.

Someone has said here(?) that an ESS I/V stage is best realized with a passive filter in its first stage to fully isolate the OpAmp wrt RF glitch energy. I would fully agree (and I'm working on that front, too, also adding shunt caps -- to rails and between +ive and -ive chip output pins). Remaining errors from the glitching should be then down to the base level the chip is really capable of. Which might even be improved by playing with the output pin node voltage (as set by the I/V) and other fine tuning, besides HD2/3 compensation, stiff Vref etc.

In extreme cases the glitch energy corrupts the output to the point that the "ESS hump" is really sticking out in the typical THD+N or IMD vs level plots.
See my investigation here: https://www.audiosciencereview.com/...-hump-revisited-khadas-tone-board-v1-3.30136/

However, for the ESS ADCs not that many options, except lowering the clock. Lowering levels helps for both DAC and ADC but is awkward, of course, with < FS/64 as the target.

Much good work by you!

Two questions. If you already answered these and I missed them, please abuse me accordingly...

1. Do you know at what frequencies these glitches occur?

2. How do you know that the glitches don't cause the AP to have a bad response? Maybe it's the AP that's distorting from out of band signals.

Thanks for your time.
 
Much good work by you!

Two questions. If you already answered these and I missed them, please abuse me accordingly...

1. Do you know at what frequencies these glitches occur?

2. How do you know that the glitches don't cause the AP to have a bad response? Maybe it's the AP that's distorting from out of band signals.

Thanks for your time.
Those are valid concerns, I agree.

1. I haven't managed to clearly measure the glitches in unloaded voltage mode right at the DAC output pins, on a Tone Board board where I completely removed the I/V. Will need to rig up my old 40lbs network analyzer, but like in my scopes I'm limited to <200MHz. I'll probaly also need to use a preamp and 75Ohm (AC-coupled) environment for this, loading the DAC.

For the moment I could check for magnetic fields hovering a simple loop probe over the ESS chip in a Topping D10 (which behaves much better in general) and saw the expected 100Mhz and mutliples of the local 100MHz clock, running from a 100MHZ crystal (ESS in async mode here). Near the DVDD line to the local decoupling cap the field was strongest and showed components at 50MHz and 100Mhz at about equal levels, plus multiples at lower levels. In the time trace I further saw spikes at ~5Mhz repetition rate.
The final DAC stage likely is running at 50MHz or a 2^N subdivision but probably not any lower than 1/4x (12.5MHz). I would guess the spikes are short compared to bit time (at the final output rate) which then again means 50Mhz++ frequencies. As you can see, a lot of guessing for the moment but I hope to clear this up if possible.


2. My old AP is known to bea bit prone to RF demodulation and therefore I almost always have a passive RC filter at the analyzer input right in the cable connector. Further, I run the levels 10..20dB lower than the auto-leveling would suggest as range setting. This reduces HD and should also reduce any RF susceptibility. The noise increase is counteracted by the excessive time-domain averaging in post processing.
Also, I have noted the same or extremely similar residual patterns when hooked up directly to the ADC, removing the fundamental with a digital filter. This, however, gives additional HD contribution from the ADC, that's why I settled using the AP's variable notch and makeup-gain, besides the general convenience benefits.
All in all I'm quite confident I'm not seing results corrupted by RF-demodulation in the AP.
 
Those are valid concerns, I agree.

1. I haven't managed to clearly measure the glitches in unloaded voltage mode right at the DAC output pins, on a Tone Board board where I completely removed the I/V. Will need to rig up my old 40lbs network analyzer, but like in my scopes I'm limited to <200MHz. I'll probaly also need to use a preamp and 75Ohm (AC-coupled) environment for this, loading the DAC.

For the moment I could check for magnetic fields hovering a simple loop probe over the ESS chip in a Topping D10 (which behaves much better in general) and saw the expected 100Mhz and mutliples of the local 100MHz clock, running from a 100MHZ crystal (ESS in async mode here). Near the DVDD line to the local decoupling cap the field was strongest and showed components at 50MHz and 100Mhz at about equal levels, plus multiples at lower levels. In the time trace I further saw spikes at ~5Mhz repetition rate.
The final DAC stage likely is running at 50MHz or a 2^N subdivision but probably not any lower than 1/4x (12.5MHz). I would guess the spikes are short compared to bit time (at the final output rate) which then again means 50Mhz++ frequencies. As you can see, a lot of guessing for the moment but I hope to clear this up if possible.


2. My old AP is known to bea bit prone to RF demodulation and therefore I almost always have a passive RC filter at the analyzer input right in the cable connector. Further, I run the levels 10..20dB lower than the auto-leveling would suggest as range setting. This reduces HD and should also reduce any RF susceptibility. The noise increase is counteracted by the excessive time-domain averaging in post processing.
Also, I have noted the same or extremely similar residual patterns when hooked up directly to the ADC, removing the fundamental with a digital filter. This, however, gives additional HD contribution from the ADC, that's why I settled using the AP's variable notch and makeup-gain, besides the general convenience benefits.
All in all I'm quite confident I'm not seing results corrupted by RF-demodulation in the AP.

The reason I ask about the AP is that I know people who measure Class-D and other pulse based amplifiers almost always have to use filters at the inputs to their AP analyzers to make reliable measurements. I've also heard that some people do the very same when they measure DACs, especially ESS based products. It doesn't even have to be RF demodulation - some input circuit could be getting killed by the transient signals due to slew rate listing or something similar. There is also the question of aliasing. But, it sounds like you may have gotten that covered already.

This all does point out the old fallacy that if a signal is outside of the frequency range of what humans can hear, it doesn't matter...
 
I got THD+N -124db with dual 9038Q2M, and the ref was opa1612.
Hello ivan did you use same voltage divider setup 10k, 6.34k resistor and 1uf cap for vref voltage same as in the evo board schematic. I am glad if you can share the schematic. If you cant i am glad if you teach us the calculation method. For example ESS uses opa1612 in latest es9068 evo board but dac output impadence is different than 9038q2m. And as far as i know opamp feedback resistor and capacitor is dependent on dac output impedance.
 
The 0dBFS Input Voltage of the ES9822PRO is specified as 3.2 Vrms with an AVCC of 4.5 V.
But there is no specification of the Min and Max values.
Does anyone here know what the variation of the input sensitivity of the ES9822PRO is (device to device), given a certain AVCC?
I guess about .1db, because I see a total deviation within .3db but there included AVCC 1%, ES9822 some %, and resistors .5-1% as well.
 
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