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I don't get it either... so I'll try to guess. Looking at the simplified schematic in post 15
C3 samples the output to the top device, like Nelson's 'modulated Cascode' for better linearity ???
C1 bootstraps the gate capacitance on the output device so that it's no longer signal-dependent ???
are we seeing here the 'Wavebourn Tower' perhaps...
No, it's not a 'Wavebourn Tower'. It's a crazy idea about vacuumless triode, made of a MOSFET with capacitive voltage divider in feedback.
Lumba, I don't extend already huge and extremely harmful internal capacitances. I just shunt them by external capacitances that are useful.
Lumba, I don't extend already huge and extremely harmful internal capacitances. I just shunt them by external capacitances that are useful.
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You have to consider me electronics illiterate - I've just started to read the Zen articles and am getting a little bit more comfortable with MOSFETs etc. I amy even build a Zen amp next. So, since your circuit looks similar to Zen I'd like to understand the benefits of your capacitive divider - can you explain a bit more about it using the Zen amp as a comparison ???
While I have you here - I remember reading your comments on a hybrid output device where you have a BJT with heavy emitter degeneration in parallel with a MOSFET and you called it 'the perfect device' - what are it's benefits, perhaps it's a candidate for a Zen amp design too ???
While I have you here - I remember reading your comments on a hybrid output device where you have a BJT with heavy emitter degeneration in parallel with a MOSFET and you called it 'the perfect device' - what are it's benefits, perhaps it's a candidate for a Zen amp design too ???
The problem is, I still can't find neither perfect device, nor perfect usage for non-perfect devices.
What is the difference between this amp ant the rest of them, in usage of capacitors for feedback.
MOSFET has big capacitances. If to use resistors in feedback there will be always phase shift between currents flowing through this resistors to MOSFET's gate and a voltage that is created on the gate, that controls the MOSFET. That means, feedback will be always shifted by phase. Since that capacitances are non-linear there is non-linear modulation of the complex transfer function, and it is frequency dependent.
If to use capacitors for a feedback divider, it would be frequency independent, and there will be no phase shifts between feedback current and voltage.
Now we have a stage with capacitive input impedance, it is a new problem we created solving the previous one.
The world is not perfect!
What is the difference between this amp ant the rest of them, in usage of capacitors for feedback.
MOSFET has big capacitances. If to use resistors in feedback there will be always phase shift between currents flowing through this resistors to MOSFET's gate and a voltage that is created on the gate, that controls the MOSFET. That means, feedback will be always shifted by phase. Since that capacitances are non-linear there is non-linear modulation of the complex transfer function, and it is frequency dependent.
If to use capacitors for a feedback divider, it would be frequency independent, and there will be no phase shifts between feedback current and voltage.
Now we have a stage with capacitive input impedance, it is a new problem we created solving the previous one.
The world is not perfect!
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thanks - it makes sense now. I see what you are hoping to achieve. Would it be correct to say that the feedback phase shifts are going to be more of a problem at high frequencies, so your proposal benefits these frequencies the most ? And, isn't the input impedance capacitive anyway with a MOSFETs ?
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Still learning....
The latest schematic shows no d.c. path to the gate of the lower MOSFET. Yet it has to be biassed. Is it self-biassing ?
The latest schematic shows no d.c. path to the gate of the lower MOSFET. Yet it has to be biassed. Is it self-biassing ?
R4
R3 and R5 provide negative feedback by DC current stabilizing working point on the level defined by voltage divider of regulated bials voltage.
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OK I see it, the output from the Opamp provides the dc biass for the gate of the MOSFET. So you have global resistive feedback and the MOSFET has local capacitive feedback.
So in terms of overall compensation, does C1 or C4 represent Cdom or "how does the compensation work" ?
So in terms of overall compensation, does C1 or C4 represent Cdom or "how does the compensation work" ?
Does it matter that feedback caps aren't non-linear in the quite same way
as the gate? Is gate lead or feedback path inductance of any significance?
as the gate? Is gate lead or feedback path inductance of any significance?
Capacitive feedbacks by voltage in each stage on AC, and DC servo by quiescent current.
No, for compensation resistors in series with feedback cap only for MOSFET ("gate stopper"), the OpAmp is already unity gain stable, inside.
In the quite same way? 😱
Are you kidding, Peter?
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Wavebourn,
Now I`m only paying attention to the reverse transfer capacitance, which is a substantial cause of amplifying device nonlinearity. Suffering from voltage amplification, its value can easily change by a factor of 100. While introducing feedback, the signal voltages are effectively shorted out, restricting the bandwidth.
Crss for IRFP054 is 300pF specified @ Vds 25 and 1MHz, now expanded with 10000pF (for comparable laterals 8-10pF @10Vds, 1MHz). This is not the way to achieve linearity, regardless what you get in simulation. Manufacturers and designers desperately try to keep the parasitic capacitances small, as they severely degrade the performance in every application.
Certainly not, and you are making it even less perfect.
Now I`m only paying attention to the reverse transfer capacitance, which is a substantial cause of amplifying device nonlinearity. Suffering from voltage amplification, its value can easily change by a factor of 100. While introducing feedback, the signal voltages are effectively shorted out, restricting the bandwidth.
Crss for IRFP054 is 300pF specified @ Vds 25 and 1MHz, now expanded with 10000pF (for comparable laterals 8-10pF @10Vds, 1MHz). This is not the way to achieve linearity, regardless what you get in simulation. Manufacturers and designers desperately try to keep the parasitic capacitances small, as they severely degrade the performance in every application.
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