Constant current source for LTP - need help with LTSpice simulation

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Hi all,

Need help in simulation CCS.
I want to know how much impedance it presents depending on the frequency. Not sure how to simulate such thing.

Thanks for help!
 

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Double check the MOSFET in your circuit. In post #1 you call for a 2N7002 which is an Nchannel enhancement mode MOSFET. Unlike discrete JFETs, discrete MOSFETs do not have interchangeable drain and source connections. And you've regrettably connected them backwards, with the source connected to a higher voltage than the drain. Any current which may flow is through the drain-to-substrate PN diode, not the MOSFET channel. It's a BJT current source in series with a PN diode. Probably not what you meant.
 
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Thanks that fixed it!

Dips below 160dB in the range of 3Hz to 700Hz, and below 130dB over 1Hz to 20kHz.
I plotted those by double clicking on 100R load resistor. I wonder if I should probe the wire between CCS out and R load instead?
 

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The way you test the impedance of a CCS in a sim is to drive it with a supply voltage with an AC component on it. Then you look at the CCS current, how much it varies as a result of the supply voltage modulation.
An ideal CCS would not vary in current.

The CCS impedance is delta-V/delta-I (Ohms'Law). For instance, if your supply AC component is 1V pk, and the CCS current variation is 1uA pk, the CCS impedance is 1V / 1uA = 1Megohm.

Jan
 
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Looks like the best result is achieved by using cascoded constant current source.
I think you'll discover that an even better result is achieved when the voltage drop across the emitter resistor (R22) is at least 200 * (kT/q), namely, 5.2 volts or greater. And you can get significant improvement at low frequencies ( < 10 Hz ) if you double regulate the reference voltage: Two zener diodes and two dropping resistors. Finally it can sometimes be helpful to plot the transistor's I-V curves and carefully check that they are constant current {not quasi-saturated} at Vce = 0.65 volts. You wouldn't want to operate a transistor at Vce = Vbe = 0.65 volts, if it isn't constant current there.

_
 

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Good fun!

I have updated my sim to have two voltage sources, one is 20V DC, another is sine wave generator biased to 20V
and with amplitude of 10V (goes up to 30V and down to 10V)

I have threw together few designs and I see a great improvement going from usual feedback two BJT CCS to cascoded JFET.

It was fun trying to get resistor values to align sine waves on the graph on top of each other.... 😵🤣

Bunch of screenshots and sim file attached.
 

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If I understand correctly, CCS is essential in PSRR of the LTP. The better the regulation the better is the PSRR.

I wonder if cascoding LTP improves PSRR as well?

Regulation of one of my favorite CSS which is cascoded using dual SMD transistors is around 0.00018 mA of variation. Not too bad... Comparing to 0.22mA of usual two BJT in feedback. That is 1200x improvement. Another benefit is low voltage transistors can be used as their Vce basically add to each other by using cascode.
 
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I have updated my sim to have two voltage sources, one is 20V DC, another is sine wave generator biased to 20V
and with amplitude of 10V (goes up to 30V and down to 10V)
That's a lot of AC. Are you sure none of the CCS's run outof headroom?
You are trying to simulate the AC ripple on a supply so 1V AC is enough and will make sure the comparisons are more 'fairly'.

Jan
 
I tried doing 1V, but was not able to see sine waves even when zoomed in to the max.
Seems LTSpice can only go to 0.00001 precision scale on the Y axis 😱🤣

Even with 10V variation cascoded JFET looks like a straight line - screenshot attached
 

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I think you'll discover that an even better result is achieved when the voltage drop across the emitter resistor (R22) is at least 200 * (kT/q), namely, 5.2 volts or greater. And you can get significant improvement at low frequencies ( < 10 Hz ) if you double regulate the reference voltage: Two zener diodes and two dropping resistors. Finally it can sometimes be helpful to plot the transistor's I-V curves and carefully check that they are constant current {not quasi-saturated} at Vce = 0.65 volts. You wouldn't want to operate a transistor at Vce = Vbe = 0.65 volts, if it isn't constant current there.

_
I suppose I could add one more diode drop to push things 0.65V ish?
For those transistors that don't like operating at Vce=0.65
Will that move them to Vce=0.13V on the graph?
I'm still learning the basics here lol

I am attaching graph for 2n5401
Is that correct one?
Seems like 2n5401 is low Vce type of transistor.
 

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Unlike discrete JFETs, discrete MOSFETs do not have interchangeable drain and source connections.
It depends, some JFETs are symmetric, some are not, some MOSFETs are symmetric, some aren't (the 4-terminal sort with the substrate pinned-out for instance, although I think they went the way of the dinosaur - MOSFETs in logic chips are symmetric). Power MOSFETs are very asymmetric always though as they are optimized for charge-injection into the channel from the source and out of it into the drain.