^ Then you're spot on... 🙂
Maybe it's a difference in terminology.
R8 / R9 set the voltage at the gates of the MOSFETs => alter current through Q3/Q4 respectively.
When Q3 and Q4 have equal current from D/S => DC offset is 0.
(I think) 🙂
As always - I reply to a lot of things to learn along-side. I try to state nothing definitively, and I may be completely wrong.
Maybe it's a difference in terminology.
You're observing exactly what seventenths is describing. (I think)
R8 / R9 set the voltage at the gates of the MOSFETs => alter current through Q3/Q4 respectively.
When Q3 and Q4 have equal current from D/S => DC offset is 0.
(I think) 🙂
As always - I reply to a lot of things to learn along-side. I try to state nothing definitively, and I may be completely wrong.
What I observe is that adjusting either R8 or R9, the current flows through both Q3 and Q4 change simultaneously.
^ Correct.
Since the MOSFETs D/S run from the rails to OUT. The MOSFETs 'meet in the middle'. So, if you're measuring across R6 (to monitor current through Q3) and you change the current flow through Q4 by twiddling with R9 => Let's say increased it. You're allowing more current to flow from the negative rail to OUT. So, you've also changed the potential at OUT which is the same as altering the potential at the drain of Q3. Since the gate at Q3 was unchanged... and MOSFET current flow is controlled by the differential between gate to drain... You've changed the potential difference between the gate and the drain of Q3... so...
The current through Q3 will change...
(I think). 🙂
Since the MOSFETs D/S run from the rails to OUT. The MOSFETs 'meet in the middle'. So, if you're measuring across R6 (to monitor current through Q3) and you change the current flow through Q4 by twiddling with R9 => Let's say increased it. You're allowing more current to flow from the negative rail to OUT. So, you've also changed the potential at OUT which is the same as altering the potential at the drain of Q3. Since the gate at Q3 was unchanged... and MOSFET current flow is controlled by the differential between gate to drain... You've changed the potential difference between the gate and the drain of Q3... so...
The current through Q3 will change...
(I think). 🙂
I'm AWFUL at this stuff, but here's how I think about it with a diagram. Those that actually know this stuff, feel free to shred it. I need to learn it properly.
Edited to add - that's why biasing and nulling the offset of "amps like this" is always a balancing act... (I think) 🙂
Edited to add - that's why biasing and nulling the offset of "amps like this" is always a balancing act... (I think) 🙂
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input shorted, no load on output
one voltmeter across R6 to observe Iq; Iq=U(R6)/0R47; handy to have desired figure (both in A and mV) written on napkin beside DMM, as reminder
second voltmeter across output (in between OUT and GND)
fiddle with R8 to chase desired Iq; go with half-steps
fiddle with R9 to chase 0V at output
simple as that - iterative fiddling with R8 and R9
remember that final values must be set in state of thermal equilibrium; depending of case used, that can be ( and in most cases is) with top cover in place
Ugs of Q4 and Q3 are just control-value; of interest only if (hopefully not) troubleshooting
one voltmeter across R6 to observe Iq; Iq=U(R6)/0R47; handy to have desired figure (both in A and mV) written on napkin beside DMM, as reminder
second voltmeter across output (in between OUT and GND)
fiddle with R8 to chase desired Iq; go with half-steps
fiddle with R9 to chase 0V at output
simple as that - iterative fiddling with R8 and R9
remember that final values must be set in state of thermal equilibrium; depending of case used, that can be ( and in most cases is) with top cover in place
Ugs of Q4 and Q3 are just control-value; of interest only if (hopefully not) troubleshooting
^ Yep! They're not wondering HOW to set bias and offset. They're asking WHY (as an example) turning R8 affects current through both Q3 and Q4 and not only Q3.
I am trying very clumsily to explain how (I think) it works.
I am trying very clumsily to explain how (I think) it works.
because of negative feedback - circ itself is trying to self-center
simple as that
if someone need more than that simple sentence as explanation, time for LTSpice
while there - veeeeeery similar circ, but having major difference in (no)NFB - is BA3 FE; fiddling with top and bottom trimpots is giving much more independent effects
simple as that
if someone need more than that simple sentence as explanation, time for LTSpice
while there - veeeeeery similar circ, but having major difference in (no)NFB - is BA3 FE; fiddling with top and bottom trimpots is giving much more independent effects
Here is a LTSpice model of the F5M to play with. The trimmers are set at minimum resistance so not much current is flowing. Have fun. 🙂
Here is Michael Rothacher's BAF2023 LTSpice presentation if you need some help getting started:
https://www.diyaudio.com/community/...-and-beyond-for-diy-audio.402932/post-7468621
Here is Michael Rothacher's BAF2023 LTSpice presentation if you need some help getting started:
https://www.diyaudio.com/community/...-and-beyond-for-diy-audio.402932/post-7468621
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Thanks for this. I bodged something together a couple of days ago, so looking forward to "grading" myself :>
Note: No mosfets or JFETs will be harmed when playing with this LTSpice circuit. 🤓
Final button-up completed.
- R6/R7 voltages trimmed to ~530mv. The unit was pretty hot at 780mv, and probably okay, but I dialled back down because 25-30W/ch is plenty for these speakers (88dB sensitivity) in a smallish room. And DC summer just kicked in with a vengeance, which made me feel a bit guilty about the extra heat
- Reconfigured LEDs to monitor V+ and V- to ground respectively, instead of both of them connected across V+ and V-.
- Attaching the front panel was a bit of a chore, as it was hard to position, align, and then tighten the screws. Took me and my son a good half an hour to fiddle everything into place
- Scraped anodized paint from corners of top, bottom, and rear panels, and placed some copper braid between them and the chassis frame to ensure good grounding connections all round
- Mounted feet with some M3/16mm bolts, taking advantage of mounting holes for bottom panel
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LOLNote: No mosfets or JFETs will be harmed when playing with this LTSpice circuit. 🤓
Couple more hours of listening, to a wide range of stuff, and starting to develop a sense of the amp:
- Tonally very similar to the ACA monoblocks, not unexpectedly
- much bigger soundstage, and the ACAs are pretty damned good already
- realized that I was initially playing much louder than usual, so need to get some low-level listening in before commenting
- imaging is so good that I'm "hearing my room" now. Never thought I'd be able to say that, but here we are
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Being in series, Q3 and Q4 must have equal DC currents, even if the output DC voltage is not zero.
Now this is the missing piece of the tuning strategy I've been looking for. Seriously, this should be part of the build instructions. Thank you.
Speakers are earlier version of the Spatial Audio Lab X4 open baffle speakers, back from when they only cost one arm or a leg.
The amp is mercilessly revealing, and has a huge soundstage. It's not imaging as coherently as the ACA monoblocks right now, and mid- to lower-bass is somewhat muted and generally lacking at low listening levels (I just switched back to the ACAs to confirm this).
Per @Zen Mod's hints in post #66, I know that I need to go back in and dial in R8/R9 properly -- hopefully that will tighten up the low level resolution and imaging coherence. Stay tuned.