Hi CyberPit-San and Ludwig-San.
This looks like a great project! If it's not too late, I would like to participate in the group buy with one (populated) board
br Paal
This looks like a great project! If it's not too late, I would like to participate in the group buy with one (populated) board
br Paal
Hi Paal,
no it is not too late, but I think you have to be a little patient. Currently we try come up with a version with better performance. Once this is done we can plan the group buy again.
BR Ludwig
no it is not too late, but I think you have to be a little patient. Currently we try come up with a version with better performance. Once this is done we can plan the group buy again.
BR Ludwig
Hi,
Edit: Not all board inputs can provide multiple channels though. I think with USB and with the raspberry pi you should be able to have multichannel input capabilities.
BR Ludwig
The board has basically 8 output channels. What they do is up to you (up to your programming of the DSP)
Edit: Not all board inputs can provide multiple channels though. I think with USB and with the raspberry pi you should be able to have multichannel input capabilities.
BR Ludwig
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Hi CyberPit-San,
today I switched to TINA-TI, the simulation software from TI, which should have an accurate OPA16532 model since it is from TI as well. And now my simulations have useful results...
So I played around with the fully differential design and came up with the following. It is a design with a second order low pass filter. The value of the resistors and caps can still be tuned to some more available ones. Also the cutoff frequency can be moved. Here, one has to find the sweatspot between the frequency and how much phase shift is acceptable in the higher frequencies. In this example the phase shift is less than one degree.
I also included a termination resistor for the input/dac output. For the final value I have to measure the output impedance of the DAC and then update R7 and R4 accordingly. The datasheet does not include the information.
I have no idea yet how it performs in real live. I might design a small pcb with just a dac and the opamp circuit to test it and also test a pcb design.
It definitly needs more components than your design and is therefore probably more expensive.
I am keen on your opinion on it.
BR Ludwig
today I switched to TINA-TI, the simulation software from TI, which should have an accurate OPA16532 model since it is from TI as well. And now my simulations have useful results...
So I played around with the fully differential design and came up with the following. It is a design with a second order low pass filter. The value of the resistors and caps can still be tuned to some more available ones. Also the cutoff frequency can be moved. Here, one has to find the sweatspot between the frequency and how much phase shift is acceptable in the higher frequencies. In this example the phase shift is less than one degree.
I also included a termination resistor for the input/dac output. For the final value I have to measure the output impedance of the DAC and then update R7 and R4 accordingly. The datasheet does not include the information.
I have no idea yet how it performs in real live. I might design a small pcb with just a dac and the opamp circuit to test it and also test a pcb design.
It definitly needs more components than your design and is therefore probably more expensive.
I am keen on your opinion on it.
BR Ludwig
Member
Joined 2018
Hello Ludwig-San,
Thank you for uploading the 2-pole LPF circuit simulation.
This will be suitable for the PCM1840/PCM1804 input driver circuit.
I simulated the same circuit with MicroCap 12. The result was extremely different, especially in AC simulation.
Here's Transient Simulation
Here's AC Simulation
Completly different results make me confuse...
Which is close to the real circuit behavior?
CyberPit
Thank you for uploading the 2-pole LPF circuit simulation.
This will be suitable for the PCM1840/PCM1804 input driver circuit.
I simulated the same circuit with MicroCap 12. The result was extremely different, especially in AC simulation.
Here's Transient Simulation
Here's AC Simulation
Completly different results make me confuse...
Which is close to the real circuit behavior?
CyberPit
Hi CyberPit-San
I noticed before with LT-Spice and Microcap models that with higher frequencies (15k and above) the gain was always going up even without filters at all. This was strange to me because the opa1632 has much higher bandwidth. In the TINA-TI simulation it looked "normal" to me. I guess a real life circuit would be good to see which simulation is correct. I have my bet on TINA-TI since it is the manufacturer of the opa 1632. I can try to make a test pcb as fast as possible...
BR Ludwig
I noticed before with LT-Spice and Microcap models that with higher frequencies (15k and above) the gain was always going up even without filters at all. This was strange to me because the opa1632 has much higher bandwidth. In the TINA-TI simulation it looked "normal" to me. I guess a real life circuit would be good to see which simulation is correct. I have my bet on TINA-TI since it is the manufacturer of the opa 1632. I can try to make a test pcb as fast as possible...
For the ouput circuit, do you think it is too complicated (too many components) and too expensive?
BR Ludwig
One more thing:
I was thinking about the differential ouput (not balanced). How does your amp input look like. I only know devices with single ended input or XLR balanced differential input. I think this would clear up a thing or two for me.
Ludwig
I was thinking about the differential ouput (not balanced). How does your amp input look like. I only know devices with single ended input or XLR balanced differential input. I think this would clear up a thing or two for me.
Ludwig
Member
Joined 2018
Hello again Ludwig-San,
Well, the bandwidth was always limited to 15kHz. In some of the cases, MC12's subcircuit works fine but it seems un-certenly in the AC performance estimation. So I downloaded TINA's spice model "SBOM182C.ZIP (6 KB) - TINA-TI Spice Model" from the TI website. I used that model for MC12's OPA1632 subcircuit definition,
The result was changed to like this...
The gain is different but it depends on R332 and R331 Voltage Divider.
So, I also simulate a compromised version with TINA's OPA1632 Spice Model...
The phase and gains are highly matched in the RF range.
Considering the sense of parts value, the number of consisted components, and audio performance, the compromised version circuit will fit for the octal DAC section. Fully balanced with a 2-pole LPF circuit will fit the optional differential input ADC boards. The balanced input needs an additional dual op-Amp. Considering SNR of PCM1808 and the chance of using embedded analog RCA-pin Input it does not make sense. An XLR balanced input PCM1840/PCM1804 optional ADC board will be a nice balance of performance and costs.
Your actual hardware evaluation will be safe advanced verification before building a new OCTAVIA board.
CyberPit
Well, the bandwidth was always limited to 15kHz. In some of the cases, MC12's subcircuit works fine but it seems un-certenly in the AC performance estimation. So I downloaded TINA's spice model "SBOM182C.ZIP (6 KB) - TINA-TI Spice Model" from the TI website. I used that model for MC12's OPA1632 subcircuit definition,
The result was changed to like this...
The gain is different but it depends on R332 and R331 Voltage Divider.
So, I also simulate a compromised version with TINA's OPA1632 Spice Model...
The phase and gains are highly matched in the RF range.
Considering the sense of parts value, the number of consisted components, and audio performance, the compromised version circuit will fit for the octal DAC section. Fully balanced with a 2-pole LPF circuit will fit the optional differential input ADC boards. The balanced input needs an additional dual op-Amp. Considering SNR of PCM1808 and the chance of using embedded analog RCA-pin Input it does not make sense. An XLR balanced input PCM1840/PCM1804 optional ADC board will be a nice balance of performance and costs.
Your actual hardware evaluation will be safe advanced verification before building a new OCTAVIA board.
CyberPit
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With the compromised version we only have to make sure that the GND is stable as VN follows the GND offset. I just saw that you also have a cap at the VCOM there in the schematic as well. Depending on the case one shoould also pay attention on how to connect pin 1 of the XLR.
This is worth a read.
With the compromised version it should also be possible to conenct the differential RCA output to a normal single ended RCA input or am I wrong here?
Ludwig
This is worth a read.
With the compromised version it should also be possible to conenct the differential RCA output to a normal single ended RCA input or am I wrong here?
Ludwig
Thats a nice library, thanks a lot! The afternoon reading list is getting bigger and bigger 😉
Member
Joined 2018
Hello Ludwig-San,
I guess XLR pin-1 should connect to AGND, GND or Chassis-GND. XLR pin-1 should not connect to the VG. If the VG moves, the VP-VN is not correctly balanced. VG is only used for the differential RCA-pin output.
Here's now I'm working new 4 Layers layout PCB design of output diver and ADC block.
Removed quad DAC features and a slit between paired channels will decrease the chance of returning current-oriented crosstalks. Each power rail of OPA1632 is individually connected to the newly added decoupling Ele-cap on a -5V rail and +5V decoupling Ele-cap. Each diver circuit block is designed the same as possible. I hope this new design will decrease the crosstalk and distortions. Also the same concept to the ADC part.
CyberPit
I guess XLR pin-1 should connect to AGND, GND or Chassis-GND. XLR pin-1 should not connect to the VG. If the VG moves, the VP-VN is not correctly balanced. VG is only used for the differential RCA-pin output.
This connection is not a good idea, because VN shakes target GND. This will decrease the crosstalk performance.
Here's now I'm working new 4 Layers layout PCB design of output diver and ADC block.
Removed quad DAC features and a slit between paired channels will decrease the chance of returning current-oriented crosstalks. Each power rail of OPA1632 is individually connected to the newly added decoupling Ele-cap on a -5V rail and +5V decoupling Ele-cap. Each diver circuit block is designed the same as possible. I hope this new design will decrease the crosstalk and distortions. Also the same concept to the ADC part.
CyberPit
Hi CyberPit-San,
nice progress! I will start with the layout of my testboard in the next days as well.
The slits are very good. I read about using slits like this in the previously mentioned book and wanted to suggest it, but you already had the same idea.
I have a few small additional suggestions regarding the layout:
BR Ludwig
nice progress! I will start with the layout of my testboard in the next days as well.
The slits are very good. I read about using slits like this in the previously mentioned book and wanted to suggest it, but you already had the same idea.
I have a few small additional suggestions regarding the layout:
- In the datahseet of the OPA1632 is a layout recommendation and they mention to remove the GND and power plane fills under the IC to minimize stray capacitance. Maybe have a look at that.
- I would use the differential pair routing for the differential signals (OUT_N and OUT_P) if possible. This way they are always close together so that noise/EMI will influance both in the same manner.
- In the book where the isolated regions where proposed (usin slits just like you did), it was mentioned that no other traces can cross the slits. I don't know if it is possible to route the +5V and -5V that they don't cross the slit. I also don't know how bad the effects are...
Yes, preferable to the chassis directly. The material from SubSoniks and the documented i linked describe the situation very good.
BR Ludwig
Member
Joined 2018
Hello guys,
Now I just finished designing FreeDSP OCTAVIA version 0.3 board.
I'll update GitHub pages soon...
CyberPit
Now I just finished designing FreeDSP OCTAVIA version 0.3 board.
I'll update GitHub pages soon...
CyberPit
Good Morning Guys.
All together you made a real good job around the Octavia.
A top level realization.
Thanks to share all your knowledge.!
All together you made a real good job around the Octavia.
A top level realization.
Thanks to share all your knowledge.!
Member
Joined 2018
First, I would like to say thank you to all the people who gave comments, requests, and ideas.
Sorry! I found a mistake in the order of the Source Selector Switch position.
If you already ordered a board, please replace the position of RPi and USB in SigmaStudio.
Version 0.30 board was designed (CCW) USB - RPi - DIG -ANA.
I fixed the order as same as before...
Version 0.31 board was designed (CCW) RPi - USB - DIG -ANA.
The GitHub page data is already updated to fixed version 0.31
The Wiki pages also will be updated soon.
CyberPit
Sorry! I found a mistake in the order of the Source Selector Switch position.
If you already ordered a board, please replace the position of RPi and USB in SigmaStudio.
Version 0.30 board was designed (CCW) USB - RPi - DIG -ANA.
I fixed the order as same as before...
Version 0.31 board was designed (CCW) RPi - USB - DIG -ANA.
The GitHub page data is already updated to fixed version 0.31
The Wiki pages also will be updated soon.
CyberPit
Hello again,
small update from my side. My test PCB (DAC with ideal differential balanced circuit) is almost done. A few small things and then I can order it next week.
If this board is done I'll do a differential ADC test board next.
BR Ludwig
small update from my side. My test PCB (DAC with ideal differential balanced circuit) is almost done. A few small things and then I can order it next week.
If this board is done I'll do a differential ADC test board next.
BR Ludwig
Member
Joined 2018
Hello,
The latest FreeDSP OCTAVIA version 0.32 Design has been released.
I found unused S/PDIF coaxial input noise affects the Optical Input sound, so I changed the coaxial input amplifier circuity this way...
Changed Points:
When the coaxial input is opened, the input signal of U10 will be the logic Low level. In the previous version circuit, when no input signal has an Intermediate voltage fed to the U10.
One more thing is added 10uF on PLR135-T10. It improved its VCC stability. I tried to receive 192kHz Optical S/PDIF, but it's not stable because the PLR135-T10 speed spec is 16Mbps max. It's not enough for 25MHz bi-phase mark modulated S/PDIF signals. 😱
CyberPit
The latest FreeDSP OCTAVIA version 0.32 Design has been released.
I found unused S/PDIF coaxial input noise affects the Optical Input sound, so I changed the coaxial input amplifier circuity this way...
Changed Points:
When the coaxial input is opened, the input signal of U10 will be the logic Low level. In the previous version circuit, when no input signal has an Intermediate voltage fed to the U10.
One more thing is added 10uF on PLR135-T10. It improved its VCC stability. I tried to receive 192kHz Optical S/PDIF, but it's not stable because the PLR135-T10 speed spec is 16Mbps max. It's not enough for 25MHz bi-phase mark modulated S/PDIF signals. 😱
CyberPit