Musical Fidelity A220 issue with hum on new output mosfets installed.

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LTSpice working:
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You'll need to get the MPSA models and and I used the 901 and 906 BUZ models (they're the 200V pieces rather than the 160V versions).

I found two duplicated IDs and and some missing ones in the schematic. Also I subbed a value into R110 as mine is discoloured due to heat. PR101 is the Bourns 1K pot. I've not changed mine since the factory so it reads 390 at the moment. No idea of the normal value. The missing values for DZ101 & DZ102 I simply subbed values for diodes. Lastly I increased the rails to 31Vdc
 

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I'd probably add 22pF from base-collector on the two transistors in the VAS section (TR103 and 106) as a starter. Not sure what R144 is supposed to achieve. Hard to tell but the bottom of the blue trace on your SPICE simulation may be showing oscillation. I would definitely do a loop stability test in your sim to see what your phase/gain margin is - known MF, it's right on the edge of instability
 
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I'd probably add 22pF from base-collector on the two transistors in the VAS section (TR103 and 106) as a starter. Not sure what R144 is supposed to achieve. Hard to tell but the bottom of the blue trace on your SPICE simulation may be showing oscillation. I would definitely do a loop stability test in your sim to see what your phase/gain margin is - known MF, it's right on the edge of instability
Good spot.

I've updated the ESR values with the caps I've ordered (leaving the 0.22uF electrolytic signal path decoupling cap C101 in place at 900mOhm), then added the 27pF caps as suggested. There's still some 2MHz instability but it's improved.

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That's messy - that's with. 33Mpts fft and Kaiser-Bessel(20) with almost 1 second of run time.

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So apart from the obvious issue at the top which would explain the high orders, the other point is there's a 2.8MHz instability..

So.. it begins.. first - disconnect the feedback and see if we can get a stable system.. initial results look like there's a few issues.
 
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So the main issue seemed to be the 337-series didn't have caps around to local feedback and control the ~2MHz oscillation. Adding those then adding some on the rails seemed to clear that up better. Seems to me like a patch over a bad design rather than having a design that worked before. I was also looking into the general design pattern here that used the same MPSA chips:

DXGPj.png

Image from a web thread but the thread starter attributes the image to "Audio Power Amplifier Design" by Douglas Self.

Next up to sort out the obvious biasing issue.
 
The 27pF on the power rails wont be doing anything.. C3, C4 and maybe C5 will be the only ones having any effect.

If you want to do loop stability, add an AC voltage source with an amplitude of 1 in the feedback loop, between R108/C104 (call that point A) and the connection to the output stage drain resistors (call that point B). Do an AC sweep from 1 to 100MHz, and then plot V(B)/V(A). You are looking for the point where gain becomes zero, to see the phase - it should be well above 0 degrees (ideally higher than 45). You also want to look at the gain where the phase is zero, and margin between the two values.

I would look at this on the circuit you provided in #22 but i would need the model files you used
 
The 27pF on the power rails wont be doing anything.. C3, C4 and maybe C5 will be the only ones having any effect.

If you want to do loop stability, add an AC voltage source with an amplitude of 1 in the feedback loop, between R108/C104 (call that point A) and the connection to the output stage drain resistors (call that point B). Do an AC sweep from 1 to 100MHz, and then plot V(B)/V(A). You are looking for the point where gain becomes zero, to see the phase - it should be well above 0 degrees (ideally higher than 45). You also want to look at the gain where the phase is zero, and margin between the two values.

I would look at this on the circuit you provided in #22 but i would need the model files you used

I appreciate the help - I've made an "all in one" version of the ascthat includes the models. I warn you the bias on the driver section seems banannas - coming from a valve world having uA modelled seems wrong - I'd be expecting 6-10mA through TR101 & TR102. I'm using the modified trap solver by default in LTSpice too. The voltage source series resistance is set to that measured DCR from the secondaries of the transformer.

I've also spent a relaxing afternoon desoldering and measuring/IDing the components including the C12PH and C16PH zener diodes on the microscope that were a bit of a guess before, also too R110 out and measured it as 6.8K.

The transistors, caps and resistors in the mute circuit test ok out of circuit too, the others in the driver section test ok in circuit.
 

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I did my own simulation with models I had here. MMBTA42/92 are the same as MPSA42/92 - just different package. I also used the models from Exicon I found in this forum. I also left out the VI protection part of the circuit as that's not relevant here.

Incidentally the topology of this circuit is pretty much based on the Hitachi reference note for their lateral MOSFETs. It was also quite well known as the Maplin 150W MOSFET amplifier kit.

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Ok, so lets take a look at the loop gain as shown here...

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Ow. No wonder that's unstable!
 
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There’s a couple of odd things about this amp - electrolytic 0.22uF (C101) in the signal path and use if polystyrene caps sat in the oven thatis the A220 in operation.
The pre in the amp is a MC33079 which with an appropriate DAC like level or CDP line level it’s not really needed leading to people bypassing it. Half tempted to shove a 12BH7A in there instead.
 
There’s a couple of odd things about this amp - electrolytic 0.22uF (C101) in the signal path and use if polystyrene caps sat in the oven thatis the A220 in operation.
The pre in the amp is a MC33079 which with an appropriate DAC like level or CDP line level it’s not really needed leading to people bypassing it. Half tempted to shove a 12BH7A in there instead.
Yep that's about normal for MF. 220nF for C101 is too small in my opinion.. I would use 1uF there at least (preferably a nice polyester like WIMA MKS2).

So from tweaking in LTSPICE, I've come up with this:
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(C101 and C103 were bypassed due to the square wave test)

The loop stability now looks like this:

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Which is ~2.9MHz at 58.8 degrees, with a phase margin of a little over 11dB. Quite stable. The wonkiness below 100Hz is caused by that 220nF input cap.. 1uF is definitely better there!

Slew rate at 10KHz (with the input and -ve feedback DC blocking capacitors bypassed) looks good, 2.15us with no signs of instability or ringing

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Oh and the important number - with 1V p-p in at 10KHz we get a THD of 0.004% (in simulation)
 
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I warn you the bias on the driver section seems banannas - coming from a valve world having uA modelled seems wrong - I'd be expecting 6-10mA through TR101 & TR102.
No, 1-3mA is more typical for a solid state LTP

As for the output stage bias current - it may well be quite high.... MF liked to claim "Class A" on a lot of their stuff simply by having a high idle bias. Lateral MOSFET's typically run best with about 100mA idle through them.
 
Here's the LTSPICE file and models for my simulation, if you want to play.

You'll probably notice I didnt bother with the DC filter capacitors in the power supply either - when you're using voltage sources, there's really no point. C110 is important because it's after R143, but C111 is not (but I added it for good measure)
 

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I have selection of caps to experiment replacing C101 including WIMA FKP1 0.22uF and MKP04 1uF with some panasonic 0.22 MPP drops. A MKP04+FKP1 gives a very clear sound and can drive the parallel grids of the output tubes so i’m tempted todo the same with the A220 once the basics are back working.
 
I'm still worried by those low value gate-stopper resistors, 220 to 470 ohms is much more normal for lateral FETs. And I'd suggest adding zener-zener or TVS protection across gate/source if the devices don't have internal protection (I think many do these days)
I did think about increasing the gate stoppers, but would have had to put the VI limiting back to check it didnt affect the operation of that. Likewise on the gate protection
 
Good news and bad news as I've been taking the ideas and applying them with the BUZ and VAS stages included version of the original A220, this is 2 seconds sim time and KS-20 filter on the 33Mpt FFT - this is with the pF caps in and 1uF for C101:

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The MC33079 output about 10-13V. So I'd assumed MF had scaled this to be 1-1.3V input max.. hence putting the sine as 1V. After modelling the MPSA LTP separately and playing with the biasing etc it dawned on me that it felt like the stage was being overloaded. True enough switching the signal to 0.5V in results in a sine wave as above. I traced the opamp signal circuit and that simply goes through the ALPS 50K pot into the opt amp and then drives through a 10K resistor.

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It seems the VAS stage is the bane of the design. Removing it results in a lovely phase graph but leaving it in results in a phase shift from hell and the noise you see in the FFT above. I'm wondering if the A220 is actually stable in real life so I'd be interested in seeing if the scope will pick up traces that the sim has shown but at -180dB down or 1e-9V (1nV) if I have my sums right. However I still don't like the fact that it's unstable but only 'stable' by the fact it's not being pushed over the edge by the input voltage..

Just doing a 10KHz run to see the results. Edit - not good news:

10KHz:
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Hmm..