One BJT line amp/buffer

@Elvee , @MarcelvdG
So far I see this:
for one, Q4 Ic must not be negative. It is a class A thing. If AC power too high, it will clip on the high side. R4 will NOT help significantly. R5 will help - lower = higher Q4 current = better (more AC power admitted, less upper clip).
second, the R5 must not be too low: else somehow it is clipping the signal on the low side. Cannot find so far the argument but I am still staring at it.

It seems logical the best place for current source is R5 - for setting the DC quiescent current (which sets the max AC current possible). But it needs a way to admit in its node a separate derivation for sink&source the AC current. The simple way I see: leave R5 do its dual job. Do you see more options?

Then, remains the challenge to write correctly the AC equations for the entire thing. This would be trivial if the biasing won't be floating : either by input or by feedback from output. How to do correctly for both cases, i.e. time domain correct? If AC currents of R3 and R5 are part of the same Q4 circuit, then how they can be different? Noise is one mechanism (will be amplified???). I see no other mechanism, but I am no expert.

Another bugging behavior: touching Q2 base will output low frequency noise, while touching Q4 base will output high frequency noise. Puzzling. Any reason why is so?
 
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I don't know exactly which schematic you use as a reference for the designators; anyway, the circuit is not special or difficult regarding its analysis and dimensioning. Just apply the design principles for class A amplifiers. I am not going to go through the whole procedure, the net is full of courses, 101-electronics explaining that in details.
There is no specific noise model for the topology, but it can be easily computed from the fundamentals: the emitter current determines the noise voltage and current for the transistors and you have to add the noise created by the resistors, some more or less explicit like the source resistance, others implicit like the Rbb of the transistors.
To minimize the THD, the collector current of the first transistor needs to be significantly larger than the bias current of the second. It cannot be too large though, because its own bias current will become excessive, as will the burden on the feedback divider
 
My comment in post #309 on the circuit of post #307 was meant to reduce distortion in two ways, by largely eliminating a nonlinear current division and by increasing loop gain. Elvee's commented in post #311 that going for a BC557C may reduce open-loop linearity by worsening Early effect, so whether the overall distortion is indeed lower with a BC557C remains to be determined.