Here is some pcb eye candy, three generations of a Fibre Channel test card for product development, first one was at HP (We were told to not use the HP logo since it was not a design/product for sale, only use the assigned 5x5 product number) and then next two generations at McDATA( Our HP lab was sold), who did their own thing. After the lab was shut down, I heard the design was eventually sold off to another test equipment company, not sure which one. Lots (years) of verilog, simulations, code = IP
The 2003 monster ran at one of 1, 2, 10 Gb/s rates, using two types of plugin SFP optical models. The big BGA is a 1152 Xilinx(Intel) Virtex2, a bunch of IDT dual ports SRAM, IBM PowerPC, Micron SDRAM, Marvell XAUI, Intel 10G SerDes (0.8mm BGA). 16 layers, hard gold on the PCI connector, the cats a$$, Iirc we had the pcb done at ACI, stuffed at SCI? I received my presents for inspection and got to keep them. Thousand dollar pcbs? 🙂 They never told me what they cost, did not care, their $
At that time, the Mentor BoardStation s/w had features like auto loading of breakout patterns, imagine having to manually breakout a 1152 BGA 🙂
Enjoy
The 2003 monster ran at one of 1, 2, 10 Gb/s rates, using two types of plugin SFP optical models. The big BGA is a 1152 Xilinx(Intel) Virtex2, a bunch of IDT dual ports SRAM, IBM PowerPC, Micron SDRAM, Marvell XAUI, Intel 10G SerDes (0.8mm BGA). 16 layers, hard gold on the PCI connector, the cats a$$, Iirc we had the pcb done at ACI, stuffed at SCI? I received my presents for inspection and got to keep them. Thousand dollar pcbs? 🙂 They never told me what they cost, did not care, their $
At that time, the Mentor BoardStation s/w had features like auto loading of breakout patterns, imagine having to manually breakout a 1152 BGA 🙂
Enjoy
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Upon further review, pictured are generations 2-4 done at McD, the 1st gen, done at HP (ISA bus before PCI), I do not have, its been 20 years since I worked on these designs, time flies, when your having fun 🙂
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Having DRC on all the time sucks a lot of pc power and slows things down.
I just do DRC when the pcb is done.
I don't notice any slowdown.
There's ages of time between operator inputs that's available for real-time DRC, assuming the app is competently designed.
Anyway, finishing a board and then doing a DRC and find that you have to ripup some parts and redo due to DRC violation seems a bad career move.
Let's face it, nobody would buy a layout app these days without real-time DRC, real-time ratsnesting, force vectors and DFM checking. If the board is finished, it should be ready to be manufactured.
Jan
I suspect it depends on the size of the pcb.
I find DRC takes about a second for a 200mm by 200mm pcb on a fast desktop.
For someone with a slow laptop it would take much longer.
I can see where your coming from but I rarely have any DRC errors due to knowing the track widths and clearance before I start laying a track.
The gridless autorouter DRC's anyway before it lays a track.
I dont need live ratsnesting as I have a "swap autoplacer" that shifts things around until optimum layout is found.
I find DRC takes about a second for a 200mm by 200mm pcb on a fast desktop.
For someone with a slow laptop it would take much longer.
I can see where your coming from but I rarely have any DRC errors due to knowing the track widths and clearance before I start laying a track.
The gridless autorouter DRC's anyway before it lays a track.
I dont need live ratsnesting as I have a "swap autoplacer" that shifts things around until optimum layout is found.
If you do DRC on the fly it takes no time as it is done between your actions. It doesn't have to do the whole board, only what your are adding/changing.
For audio work, I have yet to meet an autoplacer that places parts the way I want them.
But I guess we all have our preferred work flow.
Jan
For audio work, I have yet to meet an autoplacer that places parts the way I want them.
But I guess we all have our preferred work flow.
Jan
KiCAD checks rules real-time, so you cannot place a trace violating distances. Invoking DRC re-floods copper pouring and produces error notifications like silk-screen overlaps etc. I call it after each operation. Workflow depends a bit on personal requirements and style. I do 2- and 4-layer pcbs and I like a perfect silk screen for easy populating the boards.
That definitely not only true for just audio.
Even best ones are only so good as all the rules you have to put in.
At that point you might as well do it yourself.
The same goes for autorouters.
The best use case I have seen, is just part of a design. Especially tricky big BGA parts.
Me too, well Libre Office, which is basically the same. In combination with Google Docs.
However, my point is, I have never seen any bigger professional business without MS Office.
Hey @jan.didden , inspired by this thread, I decided to take another look at Kicad. The last time I looked at it was version 5. I found that the current version 7 is way better, I was able to input a schematic, layout and route it and do copper pours in maybe 5 hours.
My circuit was based on Rod Elliot’s buffered baffle step filter, so it is quite simple.
I think my next one will be MUCH faster.
All that said, I think my layout is pretty poor and needs a bit more thought, but I was happy enough to have workflow worked out.
I think good layouts need a bit of knowledge and practice, so I’ll need to work on that a bit.
Thanks for the inspiration!
Jeff
My circuit was based on Rod Elliot’s buffered baffle step filter, so it is quite simple.
I think my next one will be MUCH faster.
All that said, I think my layout is pretty poor and needs a bit more thought, but I was happy enough to have workflow worked out.
I think good layouts need a bit of knowledge and practice, so I’ll need to work on that a bit.
Thanks for the inspiration!
Jeff
Didn't read the whole thread, but I hope it will be more about pcb design then about using a particular pcb application. Good pcb design is independent of the application used. I have used several pcb applications and they all can do more or less the same thing. Where the buttons are is different. But it's the pcb designer that will make or break the pcb.
Agreed, this is common sense imho. On the other hand, as a designer I want to use my tools intuitively, focusing on the design. Which certainly is common sense, too.
I was afraid that might be the case! 😀
I’ll do a few simple boards to start with and see what I can learn about good layout.
There are good reasons, none of which have anything to do with the quality of the software.