I'd be interested in results with a Cinemag. I inquired about several, and while they're not super expensive, I couldn't spec one that I was comfortable buying just to try. My Edcors show terrible distortion, which others have seen also. Not sure what's going on except their economy may have a lot to do with it.
I moved to a transformerless FE of my own, but it wasn't a real easy path. I can post schematics if there's interest, though I don't want to derail from the sanctioned, official units discussed in this thread.
I moved to a transformerless FE of my own, but it wasn't a real easy path. I can post schematics if there's interest, though I don't want to derail from the sanctioned, official units discussed in this thread.
Your math looks okay to me.
The Kitty Hawk PCB whose Gerbers are attached to post #1 in this thread, includes a footprint for C6 as shown below. Max C6 body diameter is 16mm and lead spacing can be either 5.0mm or 7.5mm. Which means the PCB will fit a MUCH larger C6 value than 10 microfarads if you decide that's what you want. Bigger C6 means smaller R9, which means: less Johnson-Nyquist thermal noise (among other things). But maybe that's a dont-care. A power amp front end is not a phonostage.
(Ground plane "fill" display is turned off, for a less-cluttered illustration)
_
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You are officially invited to display and discuss your Theseus Front End if you see fit.
Thanks, Mark. I based my FE on the new TI dual JFET, JFE2140, and its application shown in Fig. 9-6 of that part's DS. I remember you expressed skepticism about that circuit, but my only issue encountered was adding compensation. I added feedback capacitance and also around the op amp, and when I had a mis-wire of the JFET's protection diodes that I couldn't identify (my bad), I posted the circuit on the TI forum and got an excellent suggestion to also add lag compensation across the input terminals of the op amp.
I used an Aimtec am6gh-nz isolated DC-DC converter to get -24V followed by an LT3080 regulator. I had also decided to come up with my own delay circuit for both turn-on and turn-off thumps. The turn-on never bothered me, but the turn-off did. I'm not sure this circuit is necessary; it's overkill. But it was fun to design. This circuit and the -24V supplies were built on proto boards and mounted to a copper clad board that fit as a "wall" between the OS and the rest of the amp (VFET #179).
The FE was committed to PCB layout and I used surface mount parts where I considered appropriate. The lag compensation R and C was added as rework.
Charles M.
EDIT (6L6) Made schematic visible in thread. (Thanks, 6L6!)
P.S. On this schematic, I forgot to fix my wiring error! Pin 7 of the JFET can't connect to ground!! I lazily did that and realized later, the hard way, that it clamps the input. I initially didn't connect it to a negative rail, because abs. max. is 40V. I just cut the trace to fix it, but the diode could also be employed across ±15V supplies. Please ignore that error.
I used an Aimtec am6gh-nz isolated DC-DC converter to get -24V followed by an LT3080 regulator. I had also decided to come up with my own delay circuit for both turn-on and turn-off thumps. The turn-on never bothered me, but the turn-off did. I'm not sure this circuit is necessary; it's overkill. But it was fun to design. This circuit and the -24V supplies were built on proto boards and mounted to a copper clad board that fit as a "wall" between the OS and the rest of the amp (VFET #179).
The FE was committed to PCB layout and I used surface mount parts where I considered appropriate. The lag compensation R and C was added as rework.
Charles M.
EDIT (6L6) Made schematic visible in thread. (Thanks, 6L6!)
P.S. On this schematic, I forgot to fix my wiring error! Pin 7 of the JFET can't connect to ground!! I lazily did that and realized later, the hard way, that it clamps the input. I initially didn't connect it to a negative rail, because abs. max. is 40V. I just cut the trace to fix it, but the diode could also be employed across ±15V supplies. Please ignore that error.
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Congratulations, @Aleph5 !! That's a beautiful looking, transformerless (!), front end.
In addition, it also sets a new record for largest number of IC voltage regulators on a front end card: four (!!). Easily besting Kitty Hawk and its meager two regulators.
When the output is a square wave swinging from -20V to +20V, the feedback resistor "R11" will dissipate 0.68 watts (did I calculate that correctly?), so I hope your PCB footprint for R11 can accommodate a 1.5W or 2W rated resistor.
In addition, it also sets a new record for largest number of IC voltage regulators on a front end card: four (!!). Easily besting Kitty Hawk and its meager two regulators.
When the output is a square wave swinging from -20V to +20V, the feedback resistor "R11" will dissipate 0.68 watts (did I calculate that correctly?), so I hope your PCB footprint for R11 can accommodate a 1.5W or 2W rated resistor.
Good point, Mark; I neglected worst, worst case there. Those parts could and probably should be a little larger. However, while your calculation looks correct for a square wave at full power, I get the average power there with a sine wave as very close to 1/4W, which is the R's power rating. And it's unlikely that the loudest I could ever stand listening to the amp with music would be with an average power of more than a couple of watts. (I have Klipsch La Scalas. 
) So even at 4W average output, to be more conservative, that dissipation should be close to 0.1W.
Or did I miscalculate? (I'll do a simulation a little bit later.)
) So even at 4W average output, to be more conservative, that dissipation should be close to 0.1W.Or did I miscalculate? (I'll do a simulation a little bit later.)
You know that YOU are going to run it with a 100 kHz, maximum amplitude square wave, for at least 30 seconds, during qualification testing. So you can take a scope photo of its lovely HF response at large amplitudes. And also to visually demonstrate the full 20 volts/microsecond slew rate capability of the OPA604 opamp chip.
🤯 Wow, that sounds dangerous, but enticing! Maybe I can get one of my prototype boards together to do this. I don't want to pull the amp apart again anytime soon.
On second look at the power dissipation of R11, wouldn't that calculate to be 0.531W? A 3V peak input should produce 20.7V at the op amp output. Voltage division between R11 and R100 would leave 17.7V across R11 (or the output less the input signal at the JFET gates). Still too high, of course, if it ever saw a signal approaching that level.
Regarding op amps, I first bought a few OPA604 for this near the end of 2021, before it joined the supply abyss. (It's still "active," though the dual OPA2604 has long been obsolete.) The comparable dual LME49860 is still well stocked, but there are ominous signs for that whole LME series of parts.
On second look at the power dissipation of R11, wouldn't that calculate to be 0.531W? A 3V peak input should produce 20.7V at the op amp output. Voltage division between R11 and R100 would leave 17.7V across R11 (or the output less the input signal at the JFET gates). Still too high, of course, if it ever saw a signal approaching that level.
Regarding op amps, I first bought a few OPA604 for this near the end of 2021, before it joined the supply abyss. (It's still "active," though the dual OPA2604 has long been obsolete.) The comparable dual LME49860 is still well stocked, but there are ominous signs for that whole LME series of parts.
Troubleshooting OS bias
Hi Mark and folks, I could use some guidance.
Was powering up my Ship of Theseus and setting bias on the output stages. The V+ for Channel B was 34.02V, I was able to dial in a Q6 source voltage of 17.01V without any problem. Was doing the same for Channel A, and was close to 17V, when I saw a little puff of smoke and now the Q6 source voltage of Channel A can't get below 32.6V with pot adjustment, though it can be adjusted to higher voltages. Poking around, Q4 is getting very hot to the touch. I can still measure a high resistance, like 166K between the wiper of RV1 and ground, so I don't immediately suspect the pot, but I'm wondering if Q2 or Q3 gave up the ghost. Any suggestions?
Hi Mark and folks, I could use some guidance.
Was powering up my Ship of Theseus and setting bias on the output stages. The V+ for Channel B was 34.02V, I was able to dial in a Q6 source voltage of 17.01V without any problem. Was doing the same for Channel A, and was close to 17V, when I saw a little puff of smoke and now the Q6 source voltage of Channel A can't get below 32.6V with pot adjustment, though it can be adjusted to higher voltages. Poking around, Q4 is getting very hot to the touch. I can still measure a high resistance, like 166K between the wiper of RV1 and ground, so I don't immediately suspect the pot, but I'm wondering if Q2 or Q3 gave up the ghost. Any suggestions?
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You probably blew up the RECOM DC-to-DC converter module ("U1" on the schematic). A quick measurement of the voltage at node "VNEG" will tell you; it should be about -4.8 volts or so, if the -5V output from the converter is working well. If it's close to 0V, and especially if it's a positive voltage: he's dead Jim.
If indeed your RECOM is kaput, I recommend a super overkill repair with excess robustness. So you never have to worry about blowing one up again. You need to order parts anyway, may as well get the heavy duty, full and complete kit. Maybe even two sets in case some day you blow up the other channel's RECOM (??).
If indeed your RECOM is kaput, I recommend a super overkill repair with excess robustness. So you never have to worry about blowing one up again. You need to order parts anyway, may as well get the heavy duty, full and complete kit. Maybe even two sets in case some day you blow up the other channel's RECOM (??).
- Replace the RECOM with a fresh new one
- Replace Q4 with a fresh new one
- Replace D1 with a new 5 watt (not 1.3 watt) Zener, such as 1N5358B
- Replace R3 with a new 2 watt resistor, 1.8 Kohms, such as one of these (link) at Mouser
Thank you Mark for the hint, I appreciate it. I checked VNEG on Channel A, it's -5.1V. (Edit, for clarity: Since VNEG is in the correct range, I've assumed for now that the voltage regulator portion of the circuit is working, and have not replaced any components there. If this assumption is flawed, and I should proceed with replacements per the post above, please let me know).
I started comparing voltages between the working and non-working channels. In working channel B, the gate of Q2 is 6.6V. In non-working channel A, it's 0V. At the collector (pin 2) of Q3 and pin 1 of J111 Q2, the bad channel is at 35.8V, while the good channel is at 13.5V. My guess was that the circuit that sets the gate bias of Q2 isn't working, so I replaced R7, R4, and RV1 (500k instead of 200k, because that's what I had on hand). That did nothing, so I replaced Q2 itself, and that also did nothing. I'm at a loss and could use some suggestions.
For the gate bias network to set the bias, it needs a DC path to ground, but I don't see where that is normally except through the Q2 JFET. Anyway.
I started comparing voltages between the working and non-working channels. In working channel B, the gate of Q2 is 6.6V. In non-working channel A, it's 0V. At the collector (pin 2) of Q3 and pin 1 of J111 Q2, the bad channel is at 35.8V, while the good channel is at 13.5V. My guess was that the circuit that sets the gate bias of Q2 isn't working, so I replaced R7, R4, and RV1 (500k instead of 200k, because that's what I had on hand). That did nothing, so I replaced Q2 itself, and that also did nothing. I'm at a loss and could use some suggestions.
For the gate bias network to set the bias, it needs a DC path to ground, but I don't see where that is normally except through the Q2 JFET. Anyway.
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Don't these voltages strongly suggest Q3 has failed with base shorted to collector? Perhaps the JFET Q2 has become a dead short from drain to source? I'd replace both Q2 and Q3. And I'd test the bias resistor network and potentiometer (R4 , R7 , RV1) to see if they have become un-soldered or if their resistances have changed.
Oh by the way, the green text overlay seems to suggest that the power supply voltage at the drain of Q2 (node "VCC") is 13.5V on the working channel. But that's incompatible with "working" so I think it's probably a typo.
Oh by the way, the green text overlay seems to suggest that the power supply voltage at the drain of Q2 (node "VCC") is 13.5V on the working channel. But that's incompatible with "working" so I think it's probably a typo.
Going slightly off track compared to the current discussion, but would like a confirmation to see if my understanding is correct.
In the pdf manual, it is said "Variable resistor RV1 adjusts the quiescent voltage on the
source pin of Q6. It should be set to half of the supply voltage.", so the voltage between Ground and Pin 3 of Q6 MOSFET should be 18V (36/2) ? Picture attached
Other amps have the tuning procedure well described (like measure the voltage on resistor X...adjust RV1 until you get Y volts...), i couldn't find it as clearly explained in the pdf or the thread (searching for "RV1", "bias"...)
In the pdf manual, it is said "Variable resistor RV1 adjusts the quiescent voltage on the
source pin of Q6. It should be set to half of the supply voltage.", so the voltage between Ground and Pin 3 of Q6 MOSFET should be 18V (36/2) ? Picture attached
Other amps have the tuning procedure well described (like measure the voltage on resistor X...adjust RV1 until you get Y volts...), i couldn't find it as clearly explained in the pdf or the thread (searching for "RV1", "bias"...)
