Yeah, I know, the market is full of less than $50 chinese ES9038Q2M boards with performance 10-100 times worse than that DAC promises, and I don't want to think about one more stupid board. I think about the best of possible implementation to get all that promised by ESS. How to reach that aim? Let's discuss.
1) The power management. I believe, to power DAC (SNR -129dbA) with hard-switching SMPS is an inherently wrong idea. USB power itself is convenient and compact but required a silent resonant LLC converter 5V to +/-10-15V with tens pF of Y-capacitance range.
2) DAC side has to be isolated(ISO7240M) from USB/I2S-DSD "bridge". I prefer XMOS bridge, XU208 is fine.
3) Analog 3.3V DAC rail. Ideally, there needs the best low noise opamp(OPA1612 etc) tied directly(of course with some facilities to avoid self-oscillation) to AVCC. Alternatively, good low-noise LDO with extensive capacitors tank will do a great job too.
4) The clock. As I noticed, ES9038Q2M THD and SNR performances only slightly depend on the clock quality. Rather clock's power rail ripples affect THD+N if oscillator IC has low PSRR. So I believe separated good quality LDO with extensive capacitors tank will provide 99% of possible quality with inexpensive MEMS clock(SiT8209).
5) I/U OPA1612 or similar with 600ohm feedback resistor and some preliminary passive LPF before I/U stage(ES9038Q2M has quite big out-band noise). Gain stage combined with LPF 50-80kHz, OPA1612 probably composite but not necessary yet.
6) Output XLR balanced, ideally if with a big-good permalloy trafo. Unbalanced RCA only optional, personally, I see no reason on it.
7) Geek's features.
a) It's quite easy to add BLE iOS/Android interface to control
ES9038Q2M's registers form the app. All registers are available to
control on the fly, and some of them are really interesting(THD
compensation, PLL speed, MCLK divider).
b) THD calibration. ES9038Q2M has 2 registers for 2nd and 3rd harmonics compensation.
I see two way for individually THD calibration. The first one could be performed only
once during the production stage, special AP analyzer script + host MCU firmware.
Very simple and inexpensive but only once. The second way allows you to calibrate
your DAC any time you wish but requires to build precise enough THD analyzer onboard.
I believe this one would be quite WOW. To implement that feature need 1pcs extra
opamp IC and inexpensive DSP(I guess ADAU1761 is fine) + CC2540 as BLE iOS/Android
interface and host MCU to read the calibration result on your phone.
8) Something else?(only don't talk about BT stream, please).
1) The power management. I believe, to power DAC (SNR -129dbA) with hard-switching SMPS is an inherently wrong idea. USB power itself is convenient and compact but required a silent resonant LLC converter 5V to +/-10-15V with tens pF of Y-capacitance range.
2) DAC side has to be isolated(ISO7240M) from USB/I2S-DSD "bridge". I prefer XMOS bridge, XU208 is fine.
3) Analog 3.3V DAC rail. Ideally, there needs the best low noise opamp(OPA1612 etc) tied directly(of course with some facilities to avoid self-oscillation) to AVCC. Alternatively, good low-noise LDO with extensive capacitors tank will do a great job too.
4) The clock. As I noticed, ES9038Q2M THD and SNR performances only slightly depend on the clock quality. Rather clock's power rail ripples affect THD+N if oscillator IC has low PSRR. So I believe separated good quality LDO with extensive capacitors tank will provide 99% of possible quality with inexpensive MEMS clock(SiT8209).
5) I/U OPA1612 or similar with 600ohm feedback resistor and some preliminary passive LPF before I/U stage(ES9038Q2M has quite big out-band noise). Gain stage combined with LPF 50-80kHz, OPA1612 probably composite but not necessary yet.
6) Output XLR balanced, ideally if with a big-good permalloy trafo. Unbalanced RCA only optional, personally, I see no reason on it.
7) Geek's features.
a) It's quite easy to add BLE iOS/Android interface to control
ES9038Q2M's registers form the app. All registers are available to
control on the fly, and some of them are really interesting(THD
compensation, PLL speed, MCLK divider).
b) THD calibration. ES9038Q2M has 2 registers for 2nd and 3rd harmonics compensation.
I see two way for individually THD calibration. The first one could be performed only
once during the production stage, special AP analyzer script + host MCU firmware.
Very simple and inexpensive but only once. The second way allows you to calibrate
your DAC any time you wish but requires to build precise enough THD analyzer onboard.
I believe this one would be quite WOW. To implement that feature need 1pcs extra
opamp IC and inexpensive DSP(I guess ADAU1761 is fine) + CC2540 as BLE iOS/Android
interface and host MCU to read the calibration result on your phone.
8) Something else?(only don't talk about BT stream, please).
Have you read on the ES9038Q2M 'hump' discussed here? ttps://www.audiosciencereview.com/forum/index.php?threads/ess-thd-%E2%80%98hump%E2%80%99-investigation.5752/
Most of the DACs using this chip experienced this issue.
Most of the DACs using this chip experienced this issue.
Yes, I did, and my nickname there is the same "IVX". But what can I do if ES9038Q2M so popular? Folks likes that, and I feel that DAC has a very creative registers set, like no others.
Don't know if you noticed, but Allo has announced an ES9038Q2M USB dac coming out soon at less than $200. From what I gather so far it may be the best SQ and best measuring Q2M dac yet. It will not use ASRC, since sound quality is *much* better without it (in almost all cases, and for USB input in particular).
On other topics you mention, passive Sabre output filtering before I/V can only consist of a cap across the +-outputs for each channel. Any resistance will increase distortion. That being said, a single cap there can improve SQ by reducing some HF/RF noise before the opamps.
Transformer out, permalloy or not, will increase distortion, but reduce grounding-related SQ problems between dac and power amplifier. One reason for using differential summing stage is to complete the filtering process, and for low distortion compatibility with SE input power amps. Using the whole I/V and differential summing topology can eliminate the ESS hump, if resistor tolerances for those stages are matched/tight enough to adequately attenuate common mode distortion coming out of the dac chip.
The best AVCC supply I have heard uses AD797 buffers following a 3.3v reference. Allo came up with a much cheaper and simpler system that is pretty good for Katana dac. LDOs can also work, but my best results with them so far requires running them at elevated input voltages and wasting some power in a resistive load from the outputs to ground.
On other topics you mention, passive Sabre output filtering before I/V can only consist of a cap across the +-outputs for each channel. Any resistance will increase distortion. That being said, a single cap there can improve SQ by reducing some HF/RF noise before the opamps.
Transformer out, permalloy or not, will increase distortion, but reduce grounding-related SQ problems between dac and power amplifier. One reason for using differential summing stage is to complete the filtering process, and for low distortion compatibility with SE input power amps. Using the whole I/V and differential summing topology can eliminate the ESS hump, if resistor tolerances for those stages are matched/tight enough to adequately attenuate common mode distortion coming out of the dac chip.
The best AVCC supply I have heard uses AD797 buffers following a 3.3v reference. Allo came up with a much cheaper and simpler system that is pretty good for Katana dac. LDOs can also work, but my best results with them so far requires running them at elevated input voltages and wasting some power in a resistive load from the outputs to ground.
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Markw4, I talking about formal specs as THD+N, dynamic range, SNR. As I see, Allo got THD+N .0003% with ES9038Q2M, i.e. the same as my tiny #9038S(46x20mm PCB). To get 3-10 times worse result is a trivial task which requires no engineering, I looking for promised .0001% and SNR 129dbA.
THD+N is a pretty useless number, especially for dacs. Sigma-delta dacs in particular can reproduce a single steady state sine wave tone with much better THD numbers than they can reproduce signals with significant dynamics and many frequencies at the same time.
In any case, I have an Allo Katana here they sent me for review. Most likely they will send a USB dac when they have one. If you want to send me one of yours, I will give you a fair review. If you have done well, I would be very happy to say so. It would be to the benefit of people who like music if clever engineers could bring down the cost of really good dacs. I support anyone who can do that, including you.
However, also have to say IME its harder than it may seem to make a really good dac. I'm slowly getting better at it, but maybe you leaped ahead. If so, good for you. Progress is what counts.
Hi IVX
our new DAC is measured at -113.5 THD+N thats equivalent to 0.0002
Please note that we are measuring at the floor noise of our AP machine.
THD only is at -123. Thats close to the best measured DAC (the Matrix using PRO version is closer to -124)
Still I think thats pretty meaningless . We are concentrating efforts on sound quality.
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Unfortunately, THD does not exactly reflect the real sound quality.
This are my old DAC and the newer one.
P.S. But, not ESS, of course.
Attachments
+1Yes. This is been pretty well known for a long time. Unfortunately, measuring software often has a THD readout that gives a single number more for historical reasons and because customers expect it rather than because it is of much practical value.
Sure. And that's why I'm personally prefer tda1541 vs pcm63, and AKM449x vs ESS90xx.
Yes, this is reality 🙁
cdsgames, I'm not sure what DAC you talking. I talking about engineering challenge itself which is not detected if you got specs worse than DAC promised. I've got similar THD+N but with tiny and minimalistic 46x20mm board @32ohm load 200mW(340mW@THD+N=1%). However, technically that project is trivial as well and was done during few weeks. I love a serious engineering challenge, for instance, the built-in 555-like analyzer would be cool, regardless, interesting that to somebody else or not. I have feeling that the audio industry is seriously sick because lost a passion, ideas, novelty.
The built-in analyser is cool I agree but why waste it on just a DAC? A full analyser is useful in itself and perhaps a better engineering challenge for your skills - for a piece of measurement equipment the lowest possible THD+N does matter. For a DAC its debatable whether such low numbers bring any subjective benefits.
Such an analyzer is mostly SW task and someone already starts to solve that FFT и прочее - как правильно?
Guys, have you been a curious boy ever? I was, my older brother even did beat me because I asked too many questions )) He was sure that it is a sign of silly if younger bro asking about why the grass is green or why a rainbow is an arc? Abraxalito, let me ask you, why you talking about "such low numbers" when you obviously can use the analyzer+solver system much more creative way? You can set the input signal composition of fundamental + 2nd + 3rd pretty much up to you and solver will fit the DAC THD performance accordingly. Up to .5% of the THD, I hope it is high enough to notice a difference? ))
Guys, have you been a curious boy ever? I was, my older brother even did beat me because I asked too many questions )) He was sure that it is a sign of silly if younger bro asking about why the grass is green or why a rainbow is an arc? Abraxalito, let me ask you, why you talking about "such low numbers" when you obviously can use the analyzer+solver system much more creative way? You can set the input signal composition of fundamental + 2nd + 3rd pretty much up to you and solver will fit the DAC THD performance accordingly. Up to .5% of the THD, I hope it is high enough to notice a difference? ))
Hi IVX - yes I am a curious type but I can't get the context of your question to me. 'Analyzer and solver system' means what?
ES9038Q2M is the plant or actuator, the goal of regulation functions is minimizing of 2nd and 3rd harmonics difference vs reference. If the input reference signal is the clear sine(1kHz), the system will adjust the DAC to reduce 2nd and 3rd harmonics, however, if your input reference is the combination of 1kHz 99.75% + .2% of 2kHz + .1% of 3kHz(kinda SE harmonics emulation), then DAC's THD will be the same as your reference. In other words, you can modify the THD profile of your DAC randomly.
PS: BTW, when I adjusted DAC up to <-120db for 2nd and 3rd harmonics level, I noticed the difference Foobar2000 vs MPC-HC x64 players, and the last one was better. So the analyzer+solver probably able to compensate that difference too 😉
PS: BTW, when I adjusted DAC up to <-120db for 2nd and 3rd harmonics level, I noticed the difference Foobar2000 vs MPC-HC x64 players, and the last one was better. So the analyzer+solver probably able to compensate that difference too 😉
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