UCD Based Fully Differential Full Bridge 450W RMS Amp

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
Hi Chris,

After much frustration with trying to learn “Spice”, I just gave up – the only thing I uses Simulators for is filter design / integrator coefficients. Simulator THD results can go in either direction (and by large degree's).

Spice really falls down when it simulates Fast switching electronics – I guess due to inaccurate component “models” – these never seem to converge, and when they do – only once!

I know what you mean about “re-pasting” circuits or closing and restarting the simulator software to get it running again… At least with real hardware I can normally debug and later understand the issue – not some random “Microsoft” event!

I seem to spend my life designing / constructing boards – teaches you very quickly (and can be sometimes frustratingly expensive) – but I’m sure it’s now time to listen!

John
 
Hi,

"Save early, save often" does not prevent you from having corrupt databases, which cannot be openend again.

Got that right. I got around that one by backing up my circuits folder to another drive. That only got me off guard once. Instead of losing full circuits I just lose a few changes. For a program that costs this much they really should address that.

Main reason I used op amp models was to give me an idea how one worked compared to the other, also, now the whole thing can be dragged into Layout .. I wonder how bad that works :)

teaches you very quickly (and can be sometimes frustratingly expensive)

Once had a protoboard of a circuit I was working on sitting on top of my computer, non of it had any power but I let the ground wire for the board fall down and touch the PC tower, smoked two chips instantly -$200.

So what do you guys think of my modified comparator, did I get it right this time?
 
BTW: Have you tried HIP 4080 ? it is a bridge mos driver that can handle 80V or hi/low driver like hip 2500 ?

Tried it? Never. Would I? You bet! Or HIP4081. I've wondered how it would work with the comparator outputs of this circuit being open collector current sinks. Might require some interfacing but that wouldn't be hard.

It was fun to learn about doing it discretely though, no longer being limited to IC selection, and you can't simulate a HIP408X.

I see no reason at all why it couldn't be used :)

Another possibility might to use a pair of IR2011's. I see they have a model for that IC now, wonder if it works?

As far as the discrete driver goes it'd be a great idea to use a higher current BJT at the gate of the mosfets too. I've had that simulating well but not as good as the matched pairs. In reality I think the higher current PNP turn off would work best though.

Something to try anyway. I might be getting a scope too :bigeyes:
 
Hi,

Just simulated one of those floating supplies real quick, on the high side, since that's the real test. It works great, and so simple! Now each driver can have its own floating regulated supply, no need to fear the supply aspect of the half bridge anymore.

I think I'd want to use the best Zeners I can, 1% tolerance or better in order to ensure all drivers are matched, a 5% tolerance would be enough of a difference between drivers to send things up in smoke.

Cheers
 
Hi Chris,

I meant to post earlier, but I’ve a had very busy week.

Why don’t you just use a diode from the bottom FET driver supply to form a charge pump to the top supply? Then you only need one transistor. If you are worried about the diode voltage drop, then supply each driver from a diode.

Also, you’re going to need something much bigger for the regulator transistor – something in a TO220 case.

John
 
Hi Chris,

Is anyone familiar with BSspice from Cadence? You know the one where you don't get the same sim results for the same circuit twice?
.

Today I started toying with Smetrix/Simplis demo from Catena. So far looks quite good. I otherwise use old version of ISpice, which is also quite good. But my version stopped woking with 1GB of RAM with "not enough memory message".

Best regards,

Jaka Racman
 
Hello everyone,

John I contemplated that diode, bootstrap, that's what I'm really trying to avoid though because I don't want to have to worry about start up circuitry to pre charge the bootstrap capacitor, for an H bridge especially.

I think diodes are key though:)

The problem I found with the high side driver is that when it pumps the high side's supply cap by switching low, then goes high, high voltage appears across Vbe of the pass transistor on the high side and it smokes the junction.

I found the simplest way of preventing this was to put a diode to block the positive rail voltage from it when it switches high, it then seems to maintain a correct Vbe drop identical to the low side driver.

I'm also putting a series resistor before the cap of about 100 ohm to help stabalize it, and keep dissipation in the transistor down since I'm only working with 3904's in my proto amp.

I have darlingtons but the dual diode drop won't suit me with only 10volt zeners to start with, I only get 7.5V at the gate which is probably enough but it's in the grey zone I think.

Works Ok in sim land, I have yet to try out yet though.

________

Hi Jaka Racman,

I tried Ispice, a very old version of it, sure looks great!

That's the same error I get with Pspice btw, right before it locks the file for keeps. Perhaps it's a bug within the engine itself? Do you experience slow down before that happens?

Thanks for the report on simetrix now I'll be sure to try it.

Cheers
 
Hi Chris,

I would just use a Diode pump from the lower Gate drive supply & resistors say 22K to 47K from VDD to the upper driver supply, and a similar resistor from upper driver “floating Gnd” to VSS, with a Zener diode to limit the resultant voltage across the upper driver supply to say 12V.

This will charge up the upper driver supply regardless if the OPS is switching or not. You would have to add a short Ton Delay before the OPS started switching (say 5 Sec) on power up to allow the upper rail supply to “charge up” though the resistor paths. Not a bad thing anyway, allows the input circuits (buffers) to settle on power up.

If you use your method, I would add a resistor from upper drivers “floating Gnd” to VSS, this guarantees that the upper driver supply charges up without a Load connected.

John
 
JohnW said:
Hi Chris,

I would just use a Diode pump from the lower Gate drive supply & resistors say 22K to 47K from VDD to the upper driver supply, and a similar resistor from upper driver “floating Gnd” to VSS, with a Zener diode to limit the resultant voltage across the upper driver supply to say 12V.

This will charge up the upper driver supply regardless if the OPS is switching or not. You would have to add a short Ton Delay before the OPS started switching (say 5 Sec) on power up to allow the upper rail supply to “charge up” though the resistor paths. Not a bad thing anyway, allows the input circuits (buffers) to settle on power up.

If you use your method, I would add a resistor from upper drivers “floating Gnd” to VSS, this guarantees that the upper driver supply charges up without a Load connected.

John

Hi,

Thanks for the tips, as always, more than helpful and it's very appreciated.

Your method of precharge is great, beats the hell out of what I found in the IR app note which didn't seem to work well at all.

I've done the bootstrap thing with my proto-amp already so I'm just trying something new, someone out there might appreciate seeing an H bridge with full floating supplies realized in such a simple manner as well.

Really, if you search online for bridge info the most you find is app note related = this is how it's done with our chip. I find that so limitting, it's nice to see how to do it discretly and open up a few options. All the app notes make it sound like the only way to do it is with a charge pump+bootstrap.. bah.. as though the extra high side supply is impossible to achieve otherwise. Seems kind of simple to me now, don't even need extra windings around the secondaries.

Regarding the delay, I'm tempted to leave the input/comparator portion powered all the time and use the "enable" as an on switch, with added delay as well, just in case it were ever plugged in turned on, which I've tried a few times with the bootstrap circuit btw, it worked, but yeh it's not very bright.

Hmmm, what if, for the dual regulator version, instead of tying a pull down to VSS I tied it to earth ground? Should have the same effect and it wouldn't introduce any type of balance/offset problem , might also allow the use of a smaller resistor as it would have alot less voltage across it. Would that work ok?

Hi Jaka Racman,

I've found with cadence that error can show up at any time, just a small edit to the schematic, change of a value, wire, even something so simple as scrolling can bring it on. I've had it happen while trying to save, while closing it, while clicking on simulate, it is a very inconsistent error.

Once it locks the file I can open the program up, start a new project, or open other old projects, but trying to open up the one that it crashed with brings up that same error as before and closes the entire program, so there's no schematic editor for it.

While working in schematic editor typically before it crashes like that it starts responding very poorly, almost not at all, so I can usually see the crash comming.

It was interesting to know you get the very same error with a different simulator, perhaps it's not a cadence issue.

All in all I'm still happy with pspice but I won't ever be so ignorant as to not try new things.

I need to spend more time with LTspice eventually, perhaps the next project.

I know Ispice is known to be one of the more accurate simulators out there, and since simetrix uses a different method of simulating, have you compared the two for accuracy at all?

Regards
Chris
 
Hi Chris,
since Ispice is based on Berkley 3F3 (3F4?) engine and Pspice on 2G6 one, I hardly think that problems we are experiencing are due to the simulating engine. Ispice actually consists of different programs for schematic entry and simulating engine and it is best to close one while other is running. ICAPS launcher makes that easy. I can really not compare Simetrix and Ispice at this time, beeing this a one day experience compared to a 10 years one (I started with a DOS version). But I was pleasantly surprised at well thought of user interface and speed of simulation.

Regarding driver, I fully agree with John. I thought that this solution was already implemented, since it is the only logical one. But maybe small diode in series with upper resistor might be in place. Otherwise bootstrap capacitor could discharge through upper resistor when amplifier is driven into clipping. But because of the long time constant that is not strictly necessary.

Best regards,

Jaka Racman
 
Hi,

Why is the bootstrap the only logical one? I think such a simple auxiliary supply is a most viable option.

I'd originally done the H bridge with bootstrap supplies and it simulated really ugly at start up for the first few switches = smoked bridge in reality.

Of course I made no attempt to simulate a delay at turn on, as I knew was required.

Basically, I'm of the train of thought that auxiliary supplies are more robust, and that's what wins it for me.

Aside from having a component or two less, which I don't view as a very big deal, does it have any other advantages?

Thanks
 
Hi Chris,

Best way to “Mute” the modulator is to switch the current source.

From my neck of the woods – cost is KING! Although nobody has ever called me Cheap when it comes to decoupling caps! – In fact there seems to be some suspicion in the industry that I own stocks in Cap. Companies :)

John
 
Hi,

Sad news is I won't be able to test the auxiliary supplies as I found another burnt transistor from the first test and it leaves me short.

So I'm taking the transistors from the supplies to patch the rest of the circuit up, and going back to the bootstrap method. I guess at times one extra transistor means alot to me too :)

I now see the light about tying down to VSS to create a virtual ground, it can only help balance things out. It doesn't simulate worth a darn though but there is no delay in the simulation , I've no problem dismissing spice in this case.

I'll use 10K's though, I'm only working with 15V rails. So I guess I'll have a better bootstrap than I did before.

Anyway I appreciate the help, it's been informative, and I like having options :)

Cheers
 
JohnW said:
Hi Chris,

I meant to post earlier, but I’ve a had very busy week.

Why don’t you just use a diode from the bottom FET driver supply to form a charge pump to the top supply? Then you only need one transistor. If you are worried about the diode voltage drop, then supply each driver from a diode.

Also, you’re going to need something much bigger for the regulator transistor – something in a TO220 case.

John


Hello,

Just bringing this up now as I was thinking it over, tried a few simulations with it.

Ideally both upper and lower driver voltages would be identical, but you're right with the bootstrap technique there is that extra diode drop. I can't see how adding a diode to the supply of the lower driver helps, it just brings the whole network down by another diode drop. Have I missed something, or is that perhaps a good reason for dual floating supplies?

Thanks
Chris
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.