If I put my notes here, I might be able to find them again later!
Understanding the J113 JFET
"To fight the bug, we must understand the bug."
--SKY MARSHALL TEHAT MERU
The J113 datasheet (Fairchild) tells you the following important information,
1. The (absolute) maximum gate-source / gate-drain voltage is 35 V.
2. The gate-source cut-off voltage (V_gs0) varies between -0.5 and -3 V.
3. The minimum zero-gate voltage drain current (I_dss) is 2 mA.
4. (from Fig. 11) the transconductance for I_ds 1-10 mA is about 10 mS largely independent of V_gs0.
5. (from Fig. 14) the voltage noise rises at low frequency and decreases with drain current, but is about 2-4 nV/sqrtHz over most of the audio bandwidth.
*****
I bought 200 J113 off eBay, but my measurements were set back after I realized my test rig was oscillating. Fixed that, and can now say a few things in addition to the datasheet.
The first is that the transfer curve (measured at RT, V_ds 10 V) does not perfectly follow the ideal square law. Although the full curve cannot be perfectly described by a single pair of V_gs0 and I_dss values, any small section of it can be closely approximated. In the first plot below you can see that one part of the curve fits to V_gs0 1.7 V I_dss 19 mA, while another is described by V_gs0 1.6 V I_dss 24 mA. This is important to keep in mind when simulating or calculating circuit gain or DC operating points. I'm going to quote parameters which fit to the curve at around 1-2 mA, since that is where I propose to use the devices...
Most of the J113 have V_gs0 around 1.3~1.8 V, with 1.5 V being typical. The beta (I_dss/V_gs0^2) is indeed fairly constant at about 9~10m, which implies that as the pinch off voltage increases, the saturation voltage increases to match. In fact I_dss values nearly all fall on a straight line plotted against V_gs0. If you know V_gs0, therefore, you can reliably infer I_dss.
The points plotted in the last two graphs below are not random samples of J113, but rather 4 devices pre-selected to show a wide range of V_gs0 varying from 1.3 to 1.7 V and another 12 which were all binned to have V_gs0 between 1.5 and 1.6 V. This gives you an idea of both the range and the scatter without going and plotting all 200 devices. The datasheet V_gs0 range is conservative. V_gs0 below 1 V or above 2 V are extremely rare, and most are between 1.3 and 1.8 V.
*****
What we learned:
1. V_gs0 cluster around the center of the range given in the datasheet.
2. The datasheet minimum I_dss isn't a very useful metric. On the other hand, the relatively constant beta value gives a very good handle on the device.
The J113 has,
V_gs0 1.5 V +/-20%
I_dss 22 mA +/-40%
beta constant around 10m
--SKY MARSHALL TEHAT MERU
The J113 datasheet (Fairchild) tells you the following important information,
1. The (absolute) maximum gate-source / gate-drain voltage is 35 V.
2. The gate-source cut-off voltage (V_gs0) varies between -0.5 and -3 V.
3. The minimum zero-gate voltage drain current (I_dss) is 2 mA.
4. (from Fig. 11) the transconductance for I_ds 1-10 mA is about 10 mS largely independent of V_gs0.
5. (from Fig. 14) the voltage noise rises at low frequency and decreases with drain current, but is about 2-4 nV/sqrtHz over most of the audio bandwidth.
*****
I bought 200 J113 off eBay, but my measurements were set back after I realized my test rig was oscillating. Fixed that, and can now say a few things in addition to the datasheet.
The first is that the transfer curve (measured at RT, V_ds 10 V) does not perfectly follow the ideal square law. Although the full curve cannot be perfectly described by a single pair of V_gs0 and I_dss values, any small section of it can be closely approximated. In the first plot below you can see that one part of the curve fits to V_gs0 1.7 V I_dss 19 mA, while another is described by V_gs0 1.6 V I_dss 24 mA. This is important to keep in mind when simulating or calculating circuit gain or DC operating points. I'm going to quote parameters which fit to the curve at around 1-2 mA, since that is where I propose to use the devices...
Most of the J113 have V_gs0 around 1.3~1.8 V, with 1.5 V being typical. The beta (I_dss/V_gs0^2) is indeed fairly constant at about 9~10m, which implies that as the pinch off voltage increases, the saturation voltage increases to match. In fact I_dss values nearly all fall on a straight line plotted against V_gs0. If you know V_gs0, therefore, you can reliably infer I_dss.
The points plotted in the last two graphs below are not random samples of J113, but rather 4 devices pre-selected to show a wide range of V_gs0 varying from 1.3 to 1.7 V and another 12 which were all binned to have V_gs0 between 1.5 and 1.6 V. This gives you an idea of both the range and the scatter without going and plotting all 200 devices. The datasheet V_gs0 range is conservative. V_gs0 below 1 V or above 2 V are extremely rare, and most are between 1.3 and 1.8 V.
*****
What we learned:
1. V_gs0 cluster around the center of the range given in the datasheet.
2. The datasheet minimum I_dss isn't a very useful metric. On the other hand, the relatively constant beta value gives a very good handle on the device.
The J113 has,
V_gs0 1.5 V +/-20%
I_dss 22 mA +/-40%
beta constant around 10m
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