200W MOSFET CFA amp

Thank you very much for the balun, now I can see better inside the compensation loop, but as you've noticed too, sometime it confuse me, not the balun but the LTspice. I don't know haw to interpret that phase behavior as it's not intuitive or obvious.

A pleasure to help, sorry I can't do more about the confusion but it's not quite intuitive or obvious to me either at the moment.

I think that my theoretical knowledge about Bode is very rusty, I studied it many years ago and now the inspiration is no more.

I'm not sure this needs Bode, even if I do recommend him for almost any problem.;)
I have tried different placements of an ideal buffer (VCVSource) to explore the cause.
This makes a loop work only one way and helped me understand a bit more.
I haven't tried too hard to work out exact loop paths, I just don't want it to happen at all.

To do that as a hobby is OK and to build some nice amps too. Sorry, no improvements from my side.

I hope you have fun.
No problem if you have no improvements, I meant mainly if there were any enhancements you would like.
But it's only a balun so it's hard to add "features";)

Best wishes
David

Minor point, could you combine resistors R22 and R30 into one resistor in the horizontal link between the TMC capacitors?
Save a resistor and prevent mismatch.
 
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I hope you have fun.
No problem if you have no improvements, I meant mainly if there were any enhancements you would like.
But it's only a balun so it's hard to add "features";)

Best wishes
David

Minor point, could you combine resistors R22 and R30 into one resistor in the horizontal link between the TMC capacitors?
Save a resistor and prevent mismatch.

Yes of course, I just keep it that way as I made the layout already. I can spare one capacitor too. Do you think that the mismatch can provoke real problem here, caps mismatch are bigger?
I have to simulate that!
Best regards
Damir
 

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The mythical NMP unicorn! And at 250kHz only
Now you see it! Any ideas?
Well a necessary but not sufficient requirement for NMP behaviour is 2 separate paths that the 'signal' can take.

These 'symmetrical' amps DO have parallel paths and its suspicious that adding bits to the VAS emitters turns it from MP to NMP.

The other point is what is the Balun actually measuring? Loop Gain? But you are breaking 2 'separate' loops.

There are other 'requirements' for NMP to do with 'delay' and 'relative amplitudes of delayed signals' which I can pontificate at length about for speakers & room acoustics but I don't think are useful here.

I know Guru Zan has mentioned some other Guru's stability probe of which his Balun is, no doubt, a good implementation ... but my small brain has yet to come to grips with such sophistication. :confused:

So if I was investigating this, I'd try the smallest bits across the VAS resistors which cause the NMP behaviour and then perhaps different bits on each side to see if it will flip back.

But as the 'main loop' appears well behaved, I probably wouldn't bother :D
________________

I'm also wary of too much pontificating about MP as Guru Waly may cut me to ribbons.

I remember discussing MP behaviour with GG Baxandall circa 1980 and I seem to remember he thought EFs were always MP (?) while Guru Waly and perhaps other Gurus think not.

CE will always become NMP above some frequency.

It's to do with the separate paths doing very different things ... Ccb for CE or the 'same' thing .. Cbe for EF ... another of the necessary requirements for NMP.

He hints at some of this in the Baxandall Letters on Self's site.

Alas, my single brain cell is no longer capable of holding its own in such erudite company. :eek:
 
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There is one question that bother me with LTspice simulation. I tried my 200W VMOSFET amp to simulate with TMC, and I did two simulation, one to check global LG, and second one to check only local compensation LG.
The global LG looks good with good PM and GM and it looks very stable on different capacitive loads, but local TMC LG shows strange phase behavior and I am bot sure how to interpret this.
This happens only if the RC was connected parallel to the VAS emitter resistor. That RC decreases THD20k from 0.000804% to 0.000365% at 50W/8ohm.
Please comment.
BR Damir

Hi Damir , hope you are well

I dont know what to make of the rather strange phase behavior but I posted months ago about the fndings by the designers at TI. They have obviously studied such behavior with their opamps and their conclusion was that stable inner or local loop phase behavior is not a requirement for overall stability. What is important is the outer feedback loop. See their datasheets on various opamps, its clearly stated in nearly all of the newer designs. Ive come to the same conclusion with my amps. Many of the so called gurus here will tell you otherwise but the truth is they should rather argue their case with the actual designers like those from TI which place actual working products on the market.
 
Hi Damir , hope you are well

I dont know what to make of the rather strange phase behavior but I posted months ago about the fndings by the designers at TI. They have obviously studied such behavior with their opamps and their conclusion was that stable inner or local loop phase behavior is not a requirement for overall stability. What is important is the outer feedback loop. See their datasheets on various opamps, its clearly stated in nearly all of the newer designs. Ive come to the same conclusion with my amps. Many of the so called gurus here will tell you otherwise but the truth is they should rather argue their case with the actual designers like those from TI which place actual working products on the market.

Hi Miguel,
Thank you, I am well, strangling with my 200W VMOSFET. It is very easy to get unequal currents, just small matching difference in Vbe and the currents vent astray.
Thank you to comforting me about inner loops, outer loop looks very stable.
Haw are you, well too I hope?
BR Damir
 
Do you think that the mismatch can provoke real problem here...?

I do not think it is likely to be a problem.
But I always try to eliminate this sort of mismatch possibility, just less possible problems to think about.
Main benefit is that it is easier to understand, it simplifies the board layout just a little, and of course you save the cost of one resistor;)
An easy choice when there is no down side but only benefits, even if small.
The elimination of one capacitor is not so clear.
I think that the symmetry of 2 capacitors is a clearer reflection of the essential symmetry of the circuit, it makes it easier to understand.
I like this and also it makes it easier to balance trace inductance and stray capacitance.
But I can understand the reasons to eliminate one capacitor.
A matter of personal preference on that one.

Best wishes
David
 
Well a necessary but not sufficient requirement for NMP behaviour is 2 separate paths that the 'signal' can take.

Strictly, this is not correct. As you comment below, a time delay can cause NMP behaviour with two separate paths.
But a time delay clearly is not plausible here so it seems beyond reasonable doubt that the cause is the multiple paths.

These 'symmetrical' amps DO have parallel paths and its suspicious that adding bits to the VAS emitters turns it from MP to NMP.

Not just symmetrical amps, there are similar effects even one sided amps.
The "duplicate" paths of a symmetric amp are practically an independent issue.
The culprit is multiple path cancellation and this can come from any circuit that has multiple paths.
But I suspect most evident when multiple paths are involved in compensation.
I first noticed this "suspicious" NMP behaviour when I simulated Toni's amp with VAS emitter resistor bypass capacitors, the same as Damir has done.
This was the example that kicked off the discussion with Waly where he disputed every aspect of it's reality, relevance etc but never actually offered any explanation at all.

The other point is what is the Balun actually measuring? Loop Gain?... 2 'separate' loops.

The probe placement measures Return Ratio for the VAS source, this is not a loop gain because there are lots of interconnected loops.
It's actually a dramatic example of the difference between the 2 concepts.
The balun just makes it possible to look at the signal RR in a symmetric amp.
It deals with the issue of the "duplicate" paths mentioned above but lets the probe show the effect of the total, separate paths.

There are other 'requirements' for NMP to do with 'delay' and 'relative amplitudes of delayed signals' which I can pontificate...about for speakers & room acoustics but I don't think are useful here.

Yes, completely in accord as remarked above.

I know Guru Zan has mentioned some other Guru's stability probe of which his Balun is, no doubt, a good implementation

The real Guru was Middlebrook. He qualified as a real Guru because he had an entire distinctive, systematic world-view and followers and all.
I have studied his GFT but the balun is not an implementation of that.
It's a separate tool to remove common mode "noise" in a symmetric amp circuit.
The probe connected to the balun is currently a Tian.
I only have an approximation to the GFT so far.

MP behaviour with GG Baxandall circa 1980 and I seem to remember he thought EFs were always MP (?) while Guru Waly and perhaps other Gurus think not.

This is still a topic I don't fully understand but can find little information about so I am very interested.
Prima Facie, it seems they should be MP, but I notice there is a Spice model parameter to add "extra" NMP phase.
Presumably that parameter exists to model a real effect. What?:confused: Only time delay?

Best wishes
David
 
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Well a necessary but not sufficient requirement for NMP behaviour is 2 separate paths that the 'signal' can take.
Strictly, this is not correct. As you comment below, a time delay can cause NMP behaviour with two separate paths.
But a time delay clearly is not plausible here so it seems beyond reasonable doubt that the cause is the multiple paths.
I wrote the stuff below in 1979. There's more in the paper Is Linear Phase Worthwhile? and even more in the Engineering Memo from which the AES paper is derived including a derivation of the Hilbert Transform relationships (which at that time) were unique to me. I did that cos I couldn't understand Bode's maths.

My ref (4) is p312 of Bode.

I don't regard a Frequency Independent Delay as NMP behaviour. It's really the trivial case.

However, such a delay may lead to NMP behaviour if the delays are different for the different paths.

MP behaviour with GG Baxandall circa 1980 and I seem to remember he thought EFs were always MP (?) while Guru Waly and perhaps other Gurus think not.
This is still a topic I don't fully understand but can find little information about so I am very interested.
Prima Facie, it seems they should be MP, but I notice there is a Spice model parameter to add "extra" NMP phase.
Presumably that parameter exists to model a real effect. What?:confused: Only time delay?
What's the parameter?

It's quite easy to show the effects that GGB describes in Self's "Baxandall Letters" for CE.
 

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What's the parameter?

PTF in the bipolar transistor model.
It's a function of TF, that is, Ft.
I have experimented with it but not seen it used, IIRC.

Why do you say Waly's view is that EFs are NMP?
I expect he would vehemently deny this.

Best wishes
David

You have made me think more clearly about the problem, thanks for that.
Do you have a copy of the memo? I'd like to read more.
 
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