A NOS 192/24 DAC with the PCM1794 (and WaveIO USB input)

Flikoman, in many DACs output transformers are used as current converters, but not with the DDDAC. Please read and understand the design notes on dddac.com to learn how the DDDAC works. In particular, the output stage uses resistors as passive current-to-voltage converters, and the transformers are used to couple the AC output voltage, not the current.
 
I hear a very quiet hum at full wolume (headphone destroying volume). I need to isolate them with copper foil and i need to put an L metal profile between power and signal transformers. With metal piece between them noise is non existant. It came out very well considering the size of dac.

Does it just seem that way to me, or have you connected only half a second and a primary?
 
Well it really is a little weird. :unsure:

I tried one declared 10k:10k (from some old CD player, permalloy core) and I had a super frequency range, until I connected the load, 20k + 360pF. Then I got a big drop in the high frequency and gave it up, and got 600:600 ohms.
 
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I have sennheiser hd560s. A very neutral and one of the most linear headphone in that price range. Highs can be bit bright if fed from low quality source. I also have dynalo amp which is according to reviews very transparent and uncolored. With these transformers highs are excelent, just on the edge of being bright, but never fatiguing. In other words, a pleasant and detailed highs. I recommend those transformers. But beware, there are many other similar on the ebay and aliexpress. Those are not the same!
 
There is no large DC current through the output transformers if the DC offset at the DDDAC output is small. So that transformer can be applied. I tried one similar, on 4 boards, on the same core, just wound as 600: 600 ohms. The sound is not something special, but again, maybe that 10k: 10k sounds better. I will rewind it bifilar, with thinner wire and more threads, it’s sure to sound better that way.
Ok, so you think it would work?

Regards
 
It will work for sure. I tried a lot of different transformers and they all worked. Sound quality is a different story, some sound good, some don’t. It is important to have a small DC offset at the output, so first you measure the DC voltage between the plus and minus outputs on the same channel without a signal and it should be in the range of 0-20mV, less is better. Such low DC voltages cannot lead to core saturation.
 
Disclaimer: This is not a commercial endeavor, this is DIY, having fun and optimization.​
Alright, Christmas is around the corner and I just returned to the project. I started working on this back in the spring then took a break while looking at
other stuff and are now returning to finalize it. So let me explain what is going on. The ground work performed by Doede has somewhat changed the
DAC world, for the better. There are few commercial products available that allow for pushing the chip DAC to the levels possible here, so no wonder
people are working on it and adding to it, but see, that is the part I wasn't completely happy with...

By adding to it, usually, we talk about using either transformers or capacitors and thereby altering the performance, other than that, its bone stock, and
while the I/V stage is important, I saw more potential, so I sat down and started looking at the general consensus of how to design good circuits and
PCB in 2021, and that generated what you can see in the attached picture.
  • First thing I wanted to change was how the cards was connected in parallel. Wires and stacked is not the most optimized method if you need to
    repair something, so got rid of the wire connection and lifted the design to become card edge insert. Very easy to insert / unsert and perform
    maintenance.
  • Next thing was proper ground planes and connection. Going back in time, some proclaimed that separate digital and analog ground should be
    used, known as mixed signal, but this have in general created other issues not foreseen in ideal models, so this not ideal. Therefore, same gro-
    und is used for and for digital and analog. If you look at the picture you can see that left & right side or channel are mirrored and have separate
    chn ground, this allows for proper mono operation which will be found throughout. This card is inspired by another diya member, Enrico, but
    he used mixed signal ground. Here I use another logic and the analog signal was centralized to the middle of the board and the digital side is
    kept to the edge, "a degree of separation".
  • As you might see, both sides have been flooded, even between the tracks. This is on purpose to keep "aggressor" and "victim" communication
    to a minimum: See https://www.edn.com/ground-fill/
  • Next was to use among the best voltage regulator available, the AD LT3045 which keep the noise to bellow 1nV, digital and analog have separate
    LDO. Once this was selected, next part became perhaps the post important one. Keep the trace ESC and ESL as low as possible as well as selecting
    passive components that themselves have low ESR, ESC and ESL (when either is applicable). Spending more time reading and researching led me
    to some devices that are class leading. Decoupling capacitors on the digital side consist of Panasonic SP-cap 3 terminal device which reduces the
    ESL of the component by 50% compared to the 2 terminal device - think in terms of Pentode vs Tetrode - there are embedded ground screens
    which reduces the inductance. The bulk knowledge for this type of device comes through the X2Y class MLCC - google this.
  • Together with the SP-Cap 3 terminal, some Johanson Dielectrics X2Y's of small values are used. As part of the keeping the ESL to a minimum,
    there rule dictates that the caps should be placed as close as physically possible to the operational pin of the dedicated IC, this then resulted in
    the utilization of both sides, but this is not a problem since the card will be placed in a vertical position - but this will be used on the motherboard
    as well. The electrolytic if Panasonic OS-Con - the notion here is that since no capacitor passes audio, I look at ESR and ESL only.
  • Test points of copper loops will be accessible at top edge such that the when you adjust the VR for Pin20, you can monitor the changes and the
    two other TP's are available for the analog 8V and digital 3.3V.
  • Resistors are 1206 thin film low ppm such as Susumu RG or Panasonic ERA, but can be any 1206 if one wants to cheap out. Variable resistor is:
    Vishay Accutrim 1240 - Bulk Foil Precision Trimmer. When it comes to the I/V stage, here I will make room for both 1206 and TH Naked Foil.
Custom DDDAC 1794 NOS 2021.png


That is it for the DAC card, for now. There is still a lot of work to be done, the motherboard needs to be designed and I have not started the work on
"The Well Tempered Master Clock" which I want to use, and there is also power supply for the DAC and clock. I am also considering if I should use one
chassis with dedicated "floors" for PSU and the rest with separation/shielding or if I should use separate chassis... time will tell. Another thing that is
clear to me is that I am for the time being not going down the rout of using the RPi platform, instead, I will use the eRED-DOCK bridge which I also need
to design a linear supply for and pair it to a "normal" PC.

A shout out to Doede. If you are curious about my work, want information, to borrow or otherwise use anything, please do, I will assist you. To anyone
else, as I mentioned, this is not a commercial endeavor but you may use my work as inspiration if you so like. Just put in the time and effort ;) I will
keep updating from time to time on the progress, but it will take some time between since there is a lot of work left and in the ens, I rather spend a few
months planning than jumping straight into the deep end of the pool because I like my money.

I want to end on a shout out to Robin De Wolf for his support, encouragement and engagement :)
 
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Nice work and thinking Oneminde. I see you are putting serious thinking in it and make choices accordingly. On the parts you select (Caps and power supply chips) I will not discuss, as sometimes this might be dependent on personal preference. Like the tests I did on the Mainboard 5 Volt supply. I ended up with the Tent Shunt, some others prefer the regulators with the LT3045. But anyway the result was very close. I agree on your design ideas and see that you also avoid crossing the return path of the signal of the underlaying ground plane. Also digital and analog currents are finding their own way on the board and are not interfering with each other.
Just my 2 cents: I would not put C32 and C33 at the other side and connecting through a via to the DAC chip. If you do it so thoroughly, just go to the full 100%, there is space on your board. The R1 can go at the back if needed. Also if you want to be consequent with the ground between traces, why not have one between the two traces at the middle of the board? (see my screenshot). same goes for all SMD decoupling Cs - now you take the effort keep them close as possible to the chip without vias.

of course when you are 100% ready I would be more than happy to have a mainboard and DAC module to do a comparing test technically (with the AP system) and compared by listening.

thanks for sharing and noting this is something for your own use only. Which I appreciate and of course always motivated everyone to do


Unbenannt.JPG
 
Hi, and thanks for your kind words and input :) - C32 is a 0.1uF X2Y complimentary cap to C25 on Pin15 and C33 is 0.1uF complimentary cap to C23 for Pin28. The X2Y class with its 4 terminals demand quite a large are since there are 3 gnd terminals, that is why most of them are on the back. If it were possible, I would have stacked the capacitors for each pin, but that is on the extreme side of things... LOL.

There are a few other regulators available (Sjöström) which could be used, but in the grand scheme of things, the LT3045 is a solid selection. The other and very important part are the capacitor and local power supply behavior. This is of larger meaning than I anticipated when I started looking into the subject. Decoupling capacitors are no joke and can enhance the performance (slew rate) of the signal, so by only selecting low ESL parts and putting them close to the operational pin, the output signal will contain less noise.. and that is kinda neat if you ask me.

And you are 100% correct regarding the gnd outside of the BCK/LR tracks (middle), this will extend the shield - *cough.. I did that yesterday ;). I also removed finger #13 and will also remove electrode 13 on the on the EDAC connectors themselves.

I am still fiddling from time to time which I'll probably do until I actually click the left mouse button and order. Next up is the motherboard sch. and brd. That will be fun, it is simpler by a long shot, the challenge for that one was in the engineering stage. Not saying designing a PCB is not a challenge.. for IT IS. The DAC pcb have been "ready" for a few months and I am still tinkering, but that is the thing. You think you are done and you walk away, you come back at a later stage to admire the work and find something you want to work on.. and the whole cycle repeats.. :LOL: I want to try and be done in 2022, which mean I need to spend time on the clocks - the DAC itself should be finalized a few months from now since and then move on to the clocks.

Doede, no worries, I'll send you some brds when I have them in my hands.
 

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Better. Now the 1.0uF and 0.1uF bypass X2Y class are located directly bellow (backside) the operational pin while the larger bulk caps are on the front. All resistors are on the front now as well, and the placement was ever so slightly improved which resulted in better trace placement and eliminations of several. Communication is generally considered to be on the top plane with the exception of one Jfet which is routed on the bottom plane due to design restraints, but other than that - I'm happy.

The blue solder mask is just for show, the real card will be flat black. And on that note, I think the DAC card is done and onward to the motherboard. Have a nice evening.
 

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Hello Oneminde
OS-CON is a great choice, I did some tests five years ago in my DAC which capacitor behaves best in a digital environment. OS-CON was the best which only confirmed my opinion about it because I have used them before. Along with OS-CON I definitely use COG SMD as close as possible to the pins. For my unfinished project with PCM1794 I chose the AD ADM7150 which is slightly better than the LT3045, although both reg are RF and low noise. I changed the OS-CON to a smaller smd 1206 polymer so that they are as close to the pins as possible with COG and I left the classic OS-CON only around ADM7150. However in the meantime I turned to an even better solution and that is the shunt regulator. I currently have in my DAC with PCM1702 a modified Walt Jung shunt reg which is incomparably better than the ADM7150. For my new DAC with TDA1547 I plan eight WJ shunt regulators, four for the TDA1547 itself, two for the I / V stage and the rest for the SAA7350 and digital filter.
 

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Hi grunf and thanks for shimming in and glad to hear you like OS-Con. C0G would naturally be my go to for MLCC, but along the way as you can tell, I ran into something else, something that in my mind mattered - ESL.
Normally, ESL is highly dependable on the current loop; increase in current loop also increases the ESL in capacitors. The distance between the lead termination and circuit connecting point (including pads or tracks) also influences the ESL in capacitors because increased termination distance also increases the current loop resulting in high Equivalent series inductance.

And

How ESL affects the Capacitor Output
The capacitors output degrades by increased ESL, same as like ESR. Increased ESL contributes to the unwanted flow of current and generates EMI, which further creates malfunctions in high-frequency applications. In power supply related system, parasitic inductance contributes to the high ripple voltage. Ripple voltage is proportional to the ESL value of the capacitors. Large ESL value of capacitor can also induce ringing waveforms, making the circuit to behave odd.

Source: https://circuitdigest.com/tutorial/understanding-esr-and-esl-in-capacitors
There are multiple documents and producers that publish material regarding ESL and its affect in capacitors, but point is, the lower it is the better. I think in a way also the slew rate will improve and if it does, then the performance and power output of the voltage regulator should also improve. Luckily there exist capacitors which reduces the ESL by 50% compared to their 2 terminal cousins and hence became my "default" choice here. Further utilization of extremely short track between the caps and operational pin should help things further.

If you look at the attached picture, you can see the outline of the LT3045 and the 1.0uF and 0.1uF bypass cap underneath it - keeping the distance to a minimum, reducing the ESL further. The electrolytic bulk cap is further away and hopefully the X2Y caps will fill in and reduce noise nicely. I am still moving parts and tinkering with this little sucker (card)

Cap to pin distance.png


When it comes to regulators, the notion is that IC's if designed and operate correctly, will inherently outperform discrete solutions and some of the reason is outlined above - as an example, I know the the noise of the LT part is lower than the Tent part, it has been measured ;).

I don't think a discrete voltage regulator will outperform the LT3045 or other LDO chips, but from an audiophile perspective, the reasoning is discrete circuit has to be better... right? The Engineer took his time, selecting parts, decided upon their position on the board and that would imply a great deal of passion and interest, and therefore it has to be better... right? Now think about that for a sec. If trace or track length directly affects the ESL and ESC, isn't it entirely possible that the distance of the components in a discrete circuit is is "stealing" any advantage the individual parts contributed with and the total performance of all the parts combined is no greater than an IC part ... Component distance (and size for that matter) is inherently bad, so the less there is of it the better.

I am not an expert and nor do I desire to be one, but I'd like to know just enough to recognize if how the PCB was designed, show traces of competence by the engineer. The circuit architecture or schematic itself is a separate topic just like placement on a PCB and its implementation is. One is ideal and one is real. One has few consequences and the other may invite complete failure and the designer might not understand why #mixedsignal. My stance at the moment has to be: I need to try this circuit and its parts BEFORE I decide to modify it and use either other components or jump on the discrete bandwagon. I cannot just assume another voltage regulator circuit will be better... assume, that is dangerous territory and why we measure stuff :)
 
@doede... Merry Christmas and happy new year :)
A few month ago I tried to "upgrade" my primary DDDac 12V standard PSU with a choke (15mH )and a larger C3 (22.000uF). Something went wrong and I measured a strange voltage...See post 8898-8901.
Removing the non-standard components in an attempt to start all over resulted in approximately 19.1V and little change when using the 10K trimmer. Also the green LED closest to the BC560C doesn't light up. This is now an all standard DDDac PSU...
I had to put the project aside for a while because of life's other obligations (and installing a new kitchen) ;-)
I would however now like to fix my primary DDDac and I have replaced the 2 BC550C, the BC560C and the 10K trimmer... Still no change. Measuring around 19.1V DC with little trimmer change.
Do you have any idea what could be wrong here?

Greetings and thank you :)