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Amanero Isolator/Reclocker GB

Acko, I don't know if you're open to suggestions/requests for the Supercape board or even if you are too far down the road with fabrication to make suggestions academic, but here goes...

I think the supercape might be more flexible and, perhaps, have wider appeal if it weren't totally oriented towards ufl connectors. Would it be possible to expose the connectors on a set of pcb pads for a header connector as well as the ufl connectors. If you're open to this suggestion can I suggest consolidating the i2C, cksel and 3.3V headers in as well so a 1*16 or 2*8 header would suffice for everything (assuming I can count and there's a ground for each connection. The obvious location (to me any way) would be immediately outboard of the BBB P9 header pads.

Obviously there's an element of selfishness about this request as I have ribbon connections to my SO3 but I'm also thinking about using a BBB as the source for a DAC like Soekris's R2R and it might be useful for people who already have something like Ian's FIFO?

No problem if this isn't a runner for you.

Ray
 
I have no expertise in these matters and I'm not suggesting that 'rubber bands' or the like wont make a difference but, at the frequency that clock crystals operate at won't the suspension essentially act as a solid/rigid connection? Can anyone contribute to my education?

Ray

My understanding is that mechanical vibrations, even at low frequencies, affect the jitter performance of a crystal oscillator. So the dampers are to filter out any conducted acoustic vibration in a typical listening environment with loudspeakers
 
Acko, I don't know if you're open to suggestions/requests for the Supercape board or even if you are too far down the road with fabrication to make suggestions academic, but here goes...

I think the supercape might be more flexible and, perhaps, have wider appeal if it weren't totally oriented towards ufl connectors. Would it be possible to expose the connectors on a set of pcb pads for a header connector as well as the ufl connectors. If you're open to this suggestion can I suggest consolidating the i2C, cksel and 3.3V headers in as well so a 1*16 or 2*8 header would suffice for everything (assuming I can count and there's a ground for each connection. The obvious location (to me any way) would be immediately outboard of the BBB P9 header pads.

Obviously there's an element of selfishness about this request as I have ribbon connections to my SO3 but I'm also thinking about using a BBB as the source for a DAC like Soekris's R2R and it might be useful for people who already have something like Ian's FIFO?

No problem if this isn't a runner for you.

Ray

Thought the P9 connector on BBB can be conveniently used to drop pin headers/pass-thru headers as required. Also, prefer the isolated I2C outputs away from the audio signals.... so, not leaning towards a dedicated box header at this stage
 
Great stuff!
Boards for use with S03 are all on order, expecting in ~2wks:

1. DDDAC-UFL (revised to correct board error)
2. BIII-UFL (2CH)
3. BBB-UFL
3. NDK2520-CCHD950

Will contact those who are on the list as soon as they become available:

Giulio: BBB - UFL (1x) + BIII - UFL (1x) both with UFL mounted
IanS1: DDDAC-UFL (with UFL mounted) X2
Myint67 DDDAC -UFL (with Ufl mounted )x2
Stijn001: DDDAC-UFL (with Uf.L.'s mounted) 2x
Dwjames: DDDAC-UFL (with Uf.L.'s mounted) 1x

Manufacture Instruction : 12/20/2014 6:46:28 PM
Board Cutting: 12/20/2014 9:26:53 PM
Drill: 12/21/2014 2:29:07 AM
Plated Through Hole: 12/21/2014 2:29:23 AM
Circuit: 12/21/2014 3:31:09 AM
Etching: 12/21/2014 9:09:19 AM
AOI: 12/21/2014 9:09:38 AM
Solder Mask: 12/22/2014 3:09:59 AM
Silkscreen: 12/22/2014 4:33:51 AM
Surface Treatment: 12/22/2014 7:01:11 AM
Routing:
Testing:
Package:
Inspection:
Delivery Ready
 
Can anyone please provide a description of the NDK2520-CCHD950 board, is it a clock adapted board?

Yes, it is. Convenient package to make manual soldering easy and also for previous version of S03 that has no land pattern for this tiny NDK crystals.See pic
 

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Thought the P9 connector on BBB can be conveniently used to drop pin headers/pass-thru headers as required. Also, prefer the isolated I2C outputs away from the audio signals.... so, not leaning towards a dedicated box header at this stage

You could, but then you lose the PCM/DSD switching.

If not a single header, maybe header pads to pick up the audio signal, or even just pads for the switchable PCM/DSD elements?

Ray
 
You could, but then you lose the PCM/DSD switching.

If not a single header, maybe header pads to pick up the audio signal, or even just pads for the switchable PCM/DSD elements?

Ray

Of course, yes, missed this point! Thanks for pointing out. Will do then, pads for header options. Nothing finalized yet. Will preview before printing :)
 
Of course, yes, missed this point! Thanks for pointing out. Will do then, pads for header options. Nothing finalized yet. Will preview before printing :)

Thanks Acko, that would be great.

If I can push my luck a little then, accepting your point about separating the i2c, a consolidated header for the audio data, clock in, clock select and 3.3V would be excellent and allow ribbon connectors. Oh, and can each be a data/gnd pair too.

If you think about it, the BBB with meiro's software represents a really effective but cheap digital source and a simple interface, like the Supercape, to present the pcm/dsd data that also addresses the power mgt. shortcomings of the BBB could be used with many dacs effectively even without clock upgrades, isolation, fifo, etc. and leaves the door open to further upgrades.

Ray
 
Chanh, when you connected the BBB ->S03 ->DDDAC, did you get dual clock support on the S03 to work correctly? I.e. which clockspeeds can you play back using the correct S03 clocking.

Can you give us some pointers how you configured the CLK SEL on the BBB?

Stijn,
Yes, S03 works great!
You must set the clocks as external by edit a text file (I think it's called ENV.txt) at root directory. By default is 0, this need be changed to 3. Note you must use text file editor, do not use NotePad in Windows environment. The hardware wiring from Acko is very much self-explanatory.

Chanh
 
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Hi Acko,

Apparently, we can configured Miero's driver to outputting 45.xx/49.xx from BBB. Some reported it is working fine. i have also tested myself and yes it is working fine. The only issue is how do I get it to work with S03? The sound is outputting half the speed per normal, i.e slow motion. I did bypass the divider resistors and away from UFL sockets. Connection is now right at Amanero pins.

Can you please advise if is safe?
please help me:
Can I connect the resonators 45.1584/49.152 MHz without divider?

from Botic description file:
--------------------------------
External masterclock frequencies
--------------------------------
External masterclock frequency for 44k1 is configurable via:
- kernel option snd_soc_botic.clk_44k1
- file /sys/module/snd_soc_botic/parameters/clk_44k1
Default value: 22579200 (45158400)?

External masterclock frequency for 48k is configurable via:
- kernel option snd_soc_botic.clk_48k
- file /sys/module/snd_soc_botic/parameters/clk_48k
Default value: 24576000 (49152000)?



Cheers.
 
What speed are your clocks on the S03? I have 90/98 which I hope to pick up today. If yours has 45/49 you would be able I think to come direct off the clock line to the divider. There is a mclk output there which I think comes direct off the clock, that is what I am looking to feed the ess9018 with for running in synchronous mode.
Need to have a look at the info sheet.

Laters,

Drew.
 
Drew,
My S03 is fitted with dual 45/49.xx clocks. Thought it would be optimal as direct sync. Funny is, at outputting 22/24.xx and bypass the fitted divider resistors proofs was working fine. Actually, it added a level of clarity I could pick up. And no, the mind was not playing trick, can not say the same for the ears though? :D
 
Hi Acko,

Apparently, we can configured Miero's driver to outputting 45.xx/49.xx from BBB. Some reported it is working fine. i have also tested myself and yes it is working fine. The only issue is how do I get it to work with S03? The sound is outputting half the speed per normal, i.e slow motion. I did bypass the divider resistors and away from UFL sockets. Connection is now right at Amanero pins.

Can you please advise if is safe?
Cheers.

Yes, been following this with interest. Thought from original specs, Botic takes 22/24.xx only. But no harm bypassing the divider and pushing direct 45/49.xx if you find this beneficial.
 
What speed are your clocks on the S03? I have 90/98 which I hope to pick up today. If yours has 45/49 you would be able I think to come direct off the clock line to the divider. There is a mclk output there which I think comes direct off the clock, that is what I am looking to feed the ess9018 with for running in synchronous mode.
Need to have a look at the info sheet.

Laters,

Drew.

Turbo MCK output from S03 can go direct to MCK input of ES9018. Your build is fitted with 90/98.xxxMHz oscillators

As for BBB, div/4 is selected in the default build to get slave 22/24.xxxMHz. You can change this to div/2 if Botic is run at 49/45.xxx

You may then wonder if 98/90.xxx works directly by bypassing the dividers?:
from Botic description file:
--------------------------------
External masterclock frequencies
--------------------------------
External masterclock frequency for 44k1 is configurable via:
- kernel option snd_soc_botic.clk_44k1
- file /sys/module/snd_soc_botic/parameters/clk_44k1
Default value: 22579200 (90316800)?

External masterclock frequency for 48k is configurable via:
- kernel option snd_soc_botic.clk_48k
- file /sys/module/snd_soc_botic/parameters/clk_48k
Default value: 24576000 (98304000)?
 
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