janneman said:Brian, Glen,
Please se the attached.
There is a Icprot protection locus (plus the Spice results; not quite the same, but I'm working on it). But that's not my point right now.
You also see that the reactive (8 ohms @ -45 deg) load line is inside the 100mS SOA but outside the DC SOA.
My question is: would you accept this SOA situation, because since the reactive load only comes into play at AC signals, the lowest audio is 20Hz or more, and the reactive line is within the 100mS (10Hz equivalent) SOA?
Jan Didden
Looks good to me!
janneman said:
Hello Jan,
Slightly off topic!!...we can attribute that to the bourbon effect ie. Jack D etc
I prefer Scotch malt anyway....A problem I am having at the moment is sourcing or trying to obtain the PCB's you designed for the super regulators when the AA article was done in '95.
I am not interested in ALW's pcb's or others people's PCBs.
The last time I seen them for sale was from Audio Xpress, they do not appear to sell them anymore, and I can not no longer locate any. If you know of any sources that would be great!
Alternatively, if you have any detailed photo's, gerber files of the PCB that would be great. I would still need to modify them for two or three reasons.
Anyway my e-mail is
kevin.dabson(@)gmail.com - Please remove the brackets.
Thanks Kevin
PS. I am glad I never showed vulnerability (dumbness) in asking about Pdiss into reactive loads!
Kevin,
I'm sorry but I no longer have any files for these boards. They were done long time ago, and they disappeared during one of my frequent moves.
However, they are still for sale at audioXpress:
http://www.audioxpress.com/bksprods/products/pcbd-3ab.htm .
Alternatively, I think ALW's boards are excellent and more flexible than my boards. Don't know about the pricing though.
Jan Didden
I'm sorry but I no longer have any files for these boards. They were done long time ago, and they disappeared during one of my frequent moves.
However, they are still for sale at audioXpress:
http://www.audioxpress.com/bksprods/products/pcbd-3ab.htm .
Alternatively, I think ALW's boards are excellent and more flexible than my boards. Don't know about the pricing though.
Jan Didden
Anderw,
Give me a break, I have a job to take care of!
That single shot thing is not clear to me. I assume that if I do a single shot today I can do another one tomorrow? So, what's the duty cycle of a single shot? One per second, after thermal eqilibrium has been restored?
I have not yet looked at the current derating with temperature, been busy to get Exel do my bidding rather than having all numbers exactly right. But yes, that has to be confronted.
Jan Didden
Give me a break, I have a job to take care of!
That single shot thing is not clear to me. I assume that if I do a single shot today I can do another one tomorrow? So, what's the duty cycle of a single shot? One per second, after thermal eqilibrium has been restored?
I have not yet looked at the current derating with temperature, been busy to get Exel do my bidding rather than having all numbers exactly right. But yes, that has to be confronted.
Jan Didden
Hi Janneman,
I am asking all for their comment, you have already nailed your 100mS to the flagpole. A couple have agreed with you.
Let's look at a senario.
one single shot at the 100uS limit, followed by 100 current excursions that are near the 1mS limit and also many thousand excursions approaching the DC current limit for each of the Vce that are existing at the time of each transient.
When does the junction get a chance to return to quiescent conditions? When one replaces the disc for another?
Will the next 100uS current transient prove too much?
I cannot see a method of calculating this.
I suspect manufacturers test to destruction and assess what they had to do to make it fail, then compare real life conditions to the failure conditions and either release the product to market, or make it more robust, or make it cheaper. The last two of course requiring more testing.
As earlier, limiting the single shot to a lower limit may give enough reserve to pass all the other peaks without the junction suffering damage. But this is just my best guess. Quasi some time ago confirmed he designs for 100mS, I design for DC and hopefully the filtered protection allow much higher but short term transients to pass without triggering the protection. My method may be far too conservative. Maybe push the protection locus much higher to allow all extreme signals to pass through without interfering with sound quality.
I would like to hear other opinions.
I am asking all for their comment, you have already nailed your 100mS to the flagpole. A couple have agreed with you.
Let's look at a senario.
one single shot at the 100uS limit, followed by 100 current excursions that are near the 1mS limit and also many thousand excursions approaching the DC current limit for each of the Vce that are existing at the time of each transient.
When does the junction get a chance to return to quiescent conditions? When one replaces the disc for another?
Will the next 100uS current transient prove too much?
I cannot see a method of calculating this.
I suspect manufacturers test to destruction and assess what they had to do to make it fail, then compare real life conditions to the failure conditions and either release the product to market, or make it more robust, or make it cheaper. The last two of course requiring more testing.
As earlier, limiting the single shot to a lower limit may give enough reserve to pass all the other peaks without the junction suffering damage. But this is just my best guess. Quasi some time ago confirmed he designs for 100mS, I design for DC and hopefully the filtered protection allow much higher but short term transients to pass without triggering the protection. My method may be far too conservative. Maybe push the protection locus much higher to allow all extreme signals to pass through without interfering with sound quality.
I would like to hear other opinions.
Andrew,
Thanks for your comments.
"I note that you have de-rated Vce for operational Tc values. I think you should be de-rating Ic. The effect is not the same. Have a look at your log/log graph and compare it to the data sheet graph. The permissible maximum Vce is not reduced, it is the permissible current that is reduced. Similarly the max current value should be reduced for increased Tc. The graphical effect is to move the whole graph downwards rather than sideways. Mathematically both reductions are easily achieved. Any further thoughts?"
I take your point, and I must admit it was with some uncertainty that I used the Vce to derate, but this appeared to be the way the Bensen data applied it, so I sought more info, and came across the OnSemi application note AN875 (as commented in the table) which discussed derating Vce, since that was the more vulnerable parameter (at least, that’s the way I read it). On that basis I chose to do it that way.
Paragraphs from AN875.(OnSemi)
Perhaps I have totally misread the intentions of this note.
You have an excellent reputation for knowing what you’re talking about, so I’ll try to effect the alterations you suggest. If I have any queries, may I contact you?
Best regards,
Brian.
I've noticed the AN875 quotes I've chosen are missing, so here's the doc. 1st para of "Voltage sensitivity" and start of page three apply.
Thanks for your comments.
"I note that you have de-rated Vce for operational Tc values. I think you should be de-rating Ic. The effect is not the same. Have a look at your log/log graph and compare it to the data sheet graph. The permissible maximum Vce is not reduced, it is the permissible current that is reduced. Similarly the max current value should be reduced for increased Tc. The graphical effect is to move the whole graph downwards rather than sideways. Mathematically both reductions are easily achieved. Any further thoughts?"
I take your point, and I must admit it was with some uncertainty that I used the Vce to derate, but this appeared to be the way the Bensen data applied it, so I sought more info, and came across the OnSemi application note AN875 (as commented in the table) which discussed derating Vce, since that was the more vulnerable parameter (at least, that’s the way I read it). On that basis I chose to do it that way.
Paragraphs from AN875.(OnSemi)
Perhaps I have totally misread the intentions of this note.
You have an excellent reputation for knowing what you’re talking about, so I’ll try to effect the alterations you suggest. If I have any queries, may I contact you?
Best regards,
Brian.
I've noticed the AN875 quotes I've chosen are missing, so here's the doc. 1st para of "Voltage sensitivity" and start of page three apply.
Hi Pingrs,
thanks for the pdf.
First thought, where do the two different de-rating factors fit in, keeping in mind that the power de-rating still applies after the second breakdown? (not both factors applied together but that it's the lower of one or other).
I think there is an anomally.
(thinking on the hoof here)
what if we consider the knee of the SOA?
just above the knee the power de-rating clearly applies and at Tc=60degC factor=(150-60)/(150-25) = 0.72 for a 150degC plastic package.
just below the knee the second breakdown factor applies but this time a higher value of factor is applied (from the graph fig4. for Tc =60degC 2ndBkFactor=0.9)
A 200W device operating at 50Vce with the knee at exactly that same voltage (hypothetical ~=15003,15034,4281 & 2sa1943~45degC) the permissible current @ 49.99Vce is (200*0.72)/50=2.88Apk , above the knee the de-rated current is (200*0.9)/50=3.6Apk but we are told the lower power applies, so the effective peak current at 50Vce either above or below the knee is limited to 2.88Apk.
This lesser of the two rules effectively means that one has to calculate at what voltage the two rules predict the same de-rated power. At this higher voltage one will find that the power has been de-rated much less than second breakdown power*power de-rating factor i.e. a higher permissible power in the second breakdown region.
That is the anomally. Exactly where ONsemi are telling us that voltage sensitivity is critical their method allows a higher factor to be applied and the effect becomes worse as Tc increases. Again this is counter intuitive.
Is my logic out the window? is it a lower voltage where the predictions match?
Going back to de-rating Ic or Vce.
Read page 3 and the steps ONsemi ask you to follow. I'll paraphrase:-
select a voltage.
select the operating Tc.
choose the factor.
reduce the power.
divide by the voltage
the result is the de-rated current. not the de-rated voltage.
thanks for the pdf.
First thought, where do the two different de-rating factors fit in, keeping in mind that the power de-rating still applies after the second breakdown? (not both factors applied together but that it's the lower of one or other).
I think there is an anomally.
(thinking on the hoof here)
what if we consider the knee of the SOA?
just above the knee the power de-rating clearly applies and at Tc=60degC factor=(150-60)/(150-25) = 0.72 for a 150degC plastic package.
just below the knee the second breakdown factor applies but this time a higher value of factor is applied (from the graph fig4. for Tc =60degC 2ndBkFactor=0.9)
A 200W device operating at 50Vce with the knee at exactly that same voltage (hypothetical ~=15003,15034,4281 & 2sa1943~45degC) the permissible current @ 49.99Vce is (200*0.72)/50=2.88Apk , above the knee the de-rated current is (200*0.9)/50=3.6Apk but we are told the lower power applies, so the effective peak current at 50Vce either above or below the knee is limited to 2.88Apk.
This lesser of the two rules effectively means that one has to calculate at what voltage the two rules predict the same de-rated power. At this higher voltage one will find that the power has been de-rated much less than second breakdown power*power de-rating factor i.e. a higher permissible power in the second breakdown region.
That is the anomally. Exactly where ONsemi are telling us that voltage sensitivity is critical their method allows a higher factor to be applied and the effect becomes worse as Tc increases. Again this is counter intuitive.
Is my logic out the window? is it a lower voltage where the predictions match?
Going back to de-rating Ic or Vce.
Read page 3 and the steps ONsemi ask you to follow. I'll paraphrase:-
select a voltage.
select the operating Tc.
choose the factor.
reduce the power.
divide by the voltage
the result is the de-rated current. not the de-rated voltage.
janneman said:
Some further research showed me that the sibnle shot pulse is the maximum pulse power that can be absorbed and still keep the die below the max temp (generally 150deg Celcius), starting at the steady state temp, whatever that happens to be. It has to do with the transient thermal resistance from die to the package. So it's not single shot in the sense that it cannot be repeated. But if it is a repetitive puls that comes back before the die has cooled to the steady state temp, each "single shot" pulse has to be smaller because the temp rise starts above the steady state temp.
Does that make sense?
Jan Didden
Hi Janneman,
I agree.
a single shot starting from Tc=25degC (the graphs are plotted for such) and equal to the max extracted from the SOA will take the device to the manufacturers specified limit. The selected limit depending on whether it is a short pulse or a longer one.
What happens after that pulse becomes the history that affects the next pulse. If the histroy is adverse and the next pulse happens to also be at the limit then one has exceeded the specified limitations.
An adverse history could be any combination of the following.
a string of repeated low level signals, a few high level signals, a very few medium level pulses, a single high level pulse approaching a specified limit, anything that causes the Tc or Tj to be above the 25deg C condition just before the critical pulse arrives, including high ambient temperature.
That, I see as the problem. As the history becomes older it is less relevant, as the time frame shortens it is more relevant. A string of repeated high level pulses that are half of the 10us limit followed by a 100uS pulse at the 100uS limit all delivered in 1mS must be worse than a single shot arriving during a 25degC quiescent condition.
Then we apply the relevant Tc de-rating factor and go through the corrected pulse currents for the last few time increments. Electronically controlled or selected protection locii to achieve this sounds quite complex. There must be an economical method of suiting number of devices to the V-I requirement rather than simply pouring devices into the solution. DC SOAR approaches the pouring method, protection filtering moves towards more economical.
I agree.
a single shot starting from Tc=25degC (the graphs are plotted for such) and equal to the max extracted from the SOA will take the device to the manufacturers specified limit. The selected limit depending on whether it is a short pulse or a longer one.
What happens after that pulse becomes the history that affects the next pulse. If the histroy is adverse and the next pulse happens to also be at the limit then one has exceeded the specified limitations.
An adverse history could be any combination of the following.
a string of repeated low level signals, a few high level signals, a very few medium level pulses, a single high level pulse approaching a specified limit, anything that causes the Tc or Tj to be above the 25deg C condition just before the critical pulse arrives, including high ambient temperature.
That, I see as the problem. As the history becomes older it is less relevant, as the time frame shortens it is more relevant. A string of repeated high level pulses that are half of the 10us limit followed by a 100uS pulse at the 100uS limit all delivered in 1mS must be worse than a single shot arriving during a 25degC quiescent condition.
Then we apply the relevant Tc de-rating factor and go through the corrected pulse currents for the last few time increments. Electronically controlled or selected protection locii to achieve this sounds quite complex. There must be an economical method of suiting number of devices to the V-I requirement rather than simply pouring devices into the solution. DC SOAR approaches the pouring method, protection filtering moves towards more economical.
That's also how I see it, Andrew.
As far as the current derating is concerned, note that the protection transistor has a tempco that tends to automagically decrease the limit current at elevated temperatures (of the transistor).
Maybe we should look at mounting this transistor somewhere on the heatsink or near the output stage to follow the steady-state temp.
Then the transient stuff could be taken care of with lp filtering.
Jan Didden
As far as the current derating is concerned, note that the protection transistor has a tempco that tends to automagically decrease the limit current at elevated temperatures (of the transistor).
Maybe we should look at mounting this transistor somewhere on the heatsink or near the output stage to follow the steady-state temp.
Then the transient stuff could be taken care of with lp filtering.
Jan Didden
OK as a design example, what if I wanted to drive a loudspeaker that went down to 2 ohms. (monkey box)
Quad ELS57, Logans & Magneplaner Ribbons and some others will drop very low at HF, but these are mostly exceptions to the rule. Most moving coil speakers will do this at LF. <500Hz.
If I wanted a amp to drive 2 ohms continoius into a moderately reactively load, what sort of load phase angle should one look for ?
30 degrees, 45 or even 60 degress.
Advice welcome
Kevin
Quad ELS57, Logans & Magneplaner Ribbons and some others will drop very low at HF, but these are mostly exceptions to the rule. Most moving coil speakers will do this at LF. <500Hz.
If I wanted a amp to drive 2 ohms continoius into a moderately reactively load, what sort of load phase angle should one look for ?
30 degrees, 45 or even 60 degress.
Advice welcome
Kevin
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