Delta Sigma Modulator by MarcelvdG

It would make more sense for more people if the FPGA firmware was written to accommodate standard audio clock frequencies. I understand the reason for using 27MHz, but there are no very low phase noise clocks available at that frequency. I would love to try to PWM algorithm but just won't work as is to compete with the high quality reproduction I can get with Iancanada, Andrea Mori, and or Acko Labs ultra low phase noise clocks.

It's open source, so you can modify it as you like, although there is quite a learning curve if you are unfamiliar with Verilog. Verilog is quite quirky.

The sigma-delta modulator itself works fine at somewhat lower clock frequencies, like 22.5792 MHz or 24.576 MHz. The frequency scale of the noise shaping just scales accordingly.

What you would need is an updated interpolation chain. Assuming you start with a clean clock and don't want asynchronous sample rate conversion, you would probably want something with a FIR filter and a CIC filter that changes its interpolation factor depending on the input sample rate, just like @PJotr25 and @olo111 use for their PCM2DSD project.
 
The sigma-delta modulator from version 2.1 (and earlier) has a quantizer sample rate equal to its clock rate, one quarter of its clock rate or one eighth of its clock rate, depending on the mode setting (chaos, PWM4 or PWM8). When you use it with an interpolation filter or chain that interpolates by some integer multiple of eight, you don't get any aliases.
 
...there is quite a learning curve if you are unfamiliar with Verilog.
Somewhat familiar with it, but I wouldn't say fluent. Don't think I have the time to work on it though, too much other stuff to do.

BTW, your RTZ dac is sounding very good in stock form, and in SE mode with the only output stage being DC blocking caps and a transformer. Reclocking the inputs with a reclocker free of ferrites and nonlinear caps made a substantial difference to my ears. Imaging is better and instruments more natural sounding.
 
Why? Because I don't have a good way of measuring non-PSS, close-in time jitter. Oscilloscopes that can measure jitter are very expensive and don't have clocks with low enough close-in phase noise.

Besides, even if I did have such a measurement tool, the next question from you would probably be, "why don't you show its audible with publication quality ABX DBT?"
 
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Why do you think clock buffer PSU using ferrites or ceramic capacitors would add jitter?
I don't claim to predict why they would. I claim that removing ferrites and nonlinear capacitors, and then using linear caps instead leads to more natural sounding music reproduction as demonstrated on my system here. If other people independently find the same, there there starts to be some statistical power in their reports (at least that would be the view in some areas of science).

Then it may make more sense to try to understand the exact causal mechanisms.

Anyway time will tell, I suppose. Some people will build using my open source boards and we'll see what they have to say. Maybe someone else will want to dig into measuring what it is that makes them sound they way they do. Other than that, I don't care if some people will never be convinced. Some people still think all capacitors must sound the same if they don't measure differently in terms HD/IMD.
 
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If other people independently find the same, there there starts to be some statistical power in their reports (at least that would be the view in some areas of science).
How many people do you think would not find the same but are not telling that? I don't care how many people claim that myrtle cable lifters sound better than ones from scandinavian birch.