jimk04,
Don't forget that +-15v pins need bypass caps right at the opamp pins and directly to ground. Layout matters for good circuit performance.
Vref for each channel connects to the corresponding output stage I/V converter opamp non-inverting input pin. That part of the circuitry is shown on the other schematic attached to post #3003.
Don't forget that +-15v pins need bypass caps right at the opamp pins and directly to ground. Layout matters for good circuit performance.
Vref for each channel connects to the corresponding output stage I/V converter opamp non-inverting input pin. That part of the circuitry is shown on the other schematic attached to post #3003.
If no I/V output stage, then Vref is not needed.
The AVCC opamps can be connected to +15v and ground, or +-15v. Any power pin that is connected to a 'rail' needs bypassing to ground at the pin. A rail of course being a term for a power supply bus.
Although AVCC could be thought of as a load connected to a power supply bus, we don't usually refer to it that way. A rail is often a shared power supply, kind of like the water pipes in a house are shared from one supply source.
AVCC is perhaps more like a point to which we apply a dedicated bias voltage. In that case we probably would't call its bias supply output a rail.
Don't know that such terms and ways of thinking are officially described anywhere. Just trying to be helpful and informative, not pedantic.
Do you actually recommend the 10u/100n combo on the opamp rails or is it better to stick with a single electrolytic on the opamp rails, too? All IYHO of course
The opamp circuit if built properly and located very close the the AVCC pins, etc., should work okay with a standard electrolytic.
Thing is, in theory it could be that we should be making the AVCC supply as close as we can into an idea voltage source, zero ohm output impedance at all frequencies and perfectly linear.
Or, maybe it should be very low impedance out up to a point, but we don't want to make it a source of power to strengthen RF coming out of the dac into the I/V stage. Maybe we should somehow limit the AVCC supply from being ideal at HF/RF in order to get the best sound?
We don't really know, ESS doesn't give us the answer to such questions and I doubt they have tried to find out. Up to us then to experiment and see what works best, given that we stick to very careful design and layout.
It may help to understand that most voltage regulator output impedances vary from resistive to inductive as frequency goes up. They may go back to resistive at some frequency. Most have error amps not designed to be SOA linear. There are lots of non-idealities if we are comparing to perfection.
Thing is, in theory it could be that we should be making the AVCC supply as close as we can into an idea voltage source, zero ohm output impedance at all frequencies and perfectly linear.
Or, maybe it should be very low impedance out up to a point, but we don't want to make it a source of power to strengthen RF coming out of the dac into the I/V stage. Maybe we should somehow limit the AVCC supply from being ideal at HF/RF in order to get the best sound?
We don't really know, ESS doesn't give us the answer to such questions and I doubt they have tried to find out. Up to us then to experiment and see what works best, given that we stick to very careful design and layout.
It may help to understand that most voltage regulator output impedances vary from resistive to inductive as frequency goes up. They may go back to resistive at some frequency. Most have error amps not designed to be SOA linear. There are lots of non-idealities if we are comparing to perfection.
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I'll stick with "make it as close to zero ohms as possible" for now, at least that's what my gut feeling is telling me. The next step is to make the I/v stage properly "tick" with the RF coming from the DAC output. There is an explanation on how to do that here: How to Fix ESS Hump on SGD1 and LA-QXD1 | Audio Science Review (ASR) Forum
Removing the RF at the output is the job of the low pass filter and it's the PCB designer's job to make RF current loops minimal to keep EMI low. Just my 2ct.
Removing the RF at the output is the job of the low pass filter and it's the PCB designer's job to make RF current loops minimal to keep EMI low. Just my 2ct.
Besides electronics, it can also be useful to study the research on things like 'gut feelings.' Its just a feeling, much like an intuition or an emotion.
Regarding intuition, it is likely to be right maybe around %70 of the time, enough to help improve chances of survival of the species above random guessing. The only exception is that experts in a certain field are much more likely to be right in their intuitions, but only as it applies to their field of expertise. 10,000 hours of study and practice is usually given as what is needed for humans to acquire expertise in something. That means 10,000 hours of learning new things and improving performance, not just doing the same old things over and over again. In the case of dac and or general analog audio design, the rule still seems to hold true, IMHO.
You're perfectly correct of course. But when coming up with a design one has to start somewhere and then evolve. And of course as there's no real reference design, we all have to make some assumptions (according gut feeling), try them and then maybe modify them.
PS: I have some background in RF, worked at an EMC testhouse and am a radio ham. So I'm trying to bring that knowledge to the table when designing this DAC board. If that at all helps, well, we'll see in the near future
PPS: I have thought about hooking up a spectrum analyzer (maybe 0~500MHz or so) to the AVCC while playing different sound patters and analyzing the noise on the power supply. Do you think this might be a feasible method for getting the psu noise on the AVCC pin down?
Worth a try. Might also be interesting to look at what is coming out of the dac analog output pins at different sample rates including for DSD and PCM. If you can attenuate noise before the I/V stage without adding series resistance you may help sound quality (and the AVCC might be a fruitful place to start).
Adding caps at the dac output will cause gain peaking the I/V opamp circuit, so that may require some remedy/compensation in the feedback loop. You know, look at what comes out of the I/V stage too in terms of noise and distortion as input frequency is swept or wide-spectrum noise is injected...
There are various things one can do with test equipment if there is a will to spend time on R&D.
There are also experiments that can be done with listening tests.
Depends on what one wants to do with one's resources, including available time.
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I think at least the compensation part was done by the ASR post i cited, but without prior filtering of the DAC output. The guy uses an RC combination in parallel to the I/V feedback resistor and cap. The ESS hump is probably due to noise... Just my gut feeling again
Regarding listening test, well, I don't really trust my ears at these levels of detail. Maybe I'm just deaf and I'm not suitable for these tests and don't even need a DAC with these high levels of performance. Will be nice to see though if listening tests can confirm the measurements. I'll report back for peer review once the pcb is layed out. And I'll report back once the thing is running and we have done measurements...
How do you set up this listening test? You've told the members on other thread to try it but didn't disclose on how to set it up so this would be a good time to share it with the forum members including Tfive.
Update on AK4137 for ES9038Q2M Board Project
After working with an AKM dac using DSD input, and now having programmed AK4137 from scratch, looks like there may be a fairly easy way to make AK4137 DSD conversion sound best with ES9038Q2M.
Briefly, it appears that relative to most of the rest of the world, AKM uses an inverted DSD clock signal. Turns out there is a setting in AK4137 registers to invert the clock from AKM default and make it same as ES9038Q2M expects.
For those not wanting to engage in pin lifting of AK4137 MCU in order to take over I2C bus, it should be possible to use a small 3.3v logic inverter chip to invert the clock phase. However, that might not be quite as desirable in the sense that there could be an potential opportunity for DSD clock jitter to increase. Don't know how much that might matter as far as ability to reduce Q2M DSD DPLL bandwidth to a minimum.
After working with an AKM dac using DSD input, and now having programmed AK4137 from scratch, looks like there may be a fairly easy way to make AK4137 DSD conversion sound best with ES9038Q2M.
Briefly, it appears that relative to most of the rest of the world, AKM uses an inverted DSD clock signal. Turns out there is a setting in AK4137 registers to invert the clock from AKM default and make it same as ES9038Q2M expects.
For those not wanting to engage in pin lifting of AK4137 MCU in order to take over I2C bus, it should be possible to use a small 3.3v logic inverter chip to invert the clock phase. However, that might not be quite as desirable in the sense that there could be an potential opportunity for DSD clock jitter to increase. Don't know how much that might matter as far as ability to reduce Q2M DSD DPLL bandwidth to a minimum.
The trouble with using DSD with the ESS is that the DSD input is re-modulated... its NOT native DSD!
That said, to my ears the most noticeable sound quality improvement between the original ESS Hyperstream designs and Hyperstream II modulators is their DSD handling, with a very noticeable improvement with DSD sound quality of the later Hyperstream II designs (ES9038Q2M is a later hyperstream II design).
Trouble is that IMO AKM DAC"s just sound BETTER then ESS and can process DSD "Native"... Why destroy Native DSD's potential by using ESS DAC's in the first place?
Inverting the DSD Bitclock will have VERY little impact on Jitter performance - if powered from the same VCC as the source Bitclock then there will be no measurable difference (the jitter will be dominated by the Bitclock source).
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JohnW,
This thread started with the idea of modding a Chinese ES9038Q2M dac board. Many of readers of the thread still have those dacs and are interested in getting the most out of them. Some have purchased Chinese AK4137 boards, so my update message was aimed at that group.
EDIT: Would you be willing to describe what makes ESS remodulated and AKM not? Is it the lack of internal ASRC, and the ability to bypass volume control in AKM dacs? Are you saying AKM uses true 1-bit conversion?
This thread started with the idea of modding a Chinese ES9038Q2M dac board. Many of readers of the thread still have those dacs and are interested in getting the most out of them. Some have purchased Chinese AK4137 boards, so my update message was aimed at that group.
EDIT: Would you be willing to describe what makes ESS remodulated and AKM not? Is it the lack of internal ASRC, and the ability to bypass volume control in AKM dacs? Are you saying AKM uses true 1-bit conversion?
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Mark,
Yes, very sorry - I should have noted the title "modding a Chinese ES9038Q2M dac board" of this thread... Sorry, my Bad!
The "Advantage" of remodulating DSD is you can have ASRC mode and digital Volume control etc. - but requires FIR digital filtering which many including myself is at the root of the SQ problems with PCM digital (not to mention the extra modulator with all the issues this brings).
Some of the AKM designs allow the DSD data to be directly converted via the DAC array without any form of "digital" manipulation.
Its not possible to directly access the DAC array with the smaller ESS DAC's and only possible on the larger devices in Mono mode and with the aid of an FPGA / CPLD to format the Data... in this mode there is no ASRC / Volume control etc.
I must point out that DSD is ONLY an advantage when its TRULY native - not remodulated even from DXD PCM...
Yes, very sorry - I should have noted the title "modding a Chinese ES9038Q2M dac board" of this thread... Sorry, my Bad!
The "Advantage" of remodulating DSD is you can have ASRC mode and digital Volume control etc. - but requires FIR digital filtering which many including myself is at the root of the SQ problems with PCM digital (not to mention the extra modulator with all the issues this brings).
Some of the AKM designs allow the DSD data to be directly converted via the DAC array without any form of "digital" manipulation.
Its not possible to directly access the DAC array with the smaller ESS DAC's and only possible on the larger devices in Mono mode and with the aid of an FPGA / CPLD to format the Data... in this mode there is no ASRC / Volume control etc.
I must point out that DSD is ONLY an advantage when its TRULY native - not remodulated even from DXD PCM...
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JohnW,
No Problem. This thread has taken some twists and turns as people express interest and try to learn more about dac modding possibilities.
In any case, thank you for your response. Not sure if you keep up on the details of more recent ESS dac models. Seems like ES9038Q2M and other recent bigger chips could be operated without ASRC and with volume bypass in stereo mode. They all seem to have the same register settings for that. The larger chips only differ in the total number of channels and in that their internal PCM filters can be rearranged in stereo-only mode (no 8-channel operation) so as to double the number of taps.
No Problem. This thread has taken some twists and turns as people express interest and try to learn more about dac modding possibilities.
In any case, thank you for your response. Not sure if you keep up on the details of more recent ESS dac models. Seems like ES9038Q2M and other recent bigger chips could be operated without ASRC and with volume bypass in stereo mode. They all seem to have the same register settings for that. The larger chips only differ in the total number of channels and in that their internal PCM filters can be rearranged in stereo-only mode (no 8-channel operation) so as to double the number of taps.