General Purpose DAC Clock Board

Hi Jesper,
Yes, I do use a lot of Rubycon MU. Reason why is that IME they work better for this type of circuitry than ceramic. You mention impedance and inductance as though they are all that really matters. How about measuring linearity and piezoelectric transduction too? What if they also matter for this application?

The reason for using a lot of the MU caps is that like other bypass caps it helps to pepper the board with distributed caps all of the same value.

Regarding inductance and impedance in particular, part of that is compensated for by layout. There is very little inductance/impedance in the bypass current loop because of layout. As I have written about before the current loops are on low-ish inductance surface fill.

Regarding phase noise measurements, after thinking about it for a long time I decided that phase noise measurements are helpful, but not really what we would like to know. What really matters clock frequency deviation as a function of time. With instruments like TimePod we have no way to display that in graph form similar to the way a scope displays a waveform in terms of voltage versus time. Even when we do measure phase noise, we can only approximately turn that into RMS jitter. Getting to peak to peak jitter from the RMS number is impossible just like it is when measuring voltage if we don't know the time-domain waveform. We might be able to get that time-domain frequency deviation waveform for clock oscillators, but we would have to FM demodulate the sine wave output. It can be done but IIUC its even more expensive than a TimePod for phase noise. Another possible issue is that spurs in phase noise measurements are often filtered out or ignored. Maybe spurs could be relevant for dac clocking? Don't think we really know.

Anyway, mostly what I have to go by is a collection of experiments over time. It started with my first AK4499EQ dac when I designed a clock and PCM->DSD256 conversion board (which used two AK4137 chips). I did experiments using more or less MU bypass caps just for the clocks and or the buffers, putting clocks and buffers on separate or shared voltage regulators, etc. It was work done over a long period of time.

For the present clock board, so far its sounding very good indeed. I will know more when I can use it with the Andrea Mori and or AckoLabs sine wave oscillator clocks. I can then compare Marcel's dac to my Andrea dac. I can also use this clock board to drive the Andrea DSD dac using my best clocks as input sources. I should be able to tease out if this board is doing any harm, or else if it is effectively performing as well as dac equipment that has already been measured for phase noise.

So far its only the stuff external to the clock board, such as the reclocker ferrites, that has been found to be problematic.

Cheers,
Mark
 
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Hi Mark,

Well ... as I read your post above there is a lot of information & thoughts & conclusions in the text that are interesting and inspiring but, at least for me, it will be too comprehensive (and also to some extent outside of my field of knowledge) to consider and reply to it in depth.

However, regarding the decoupling capacitors where I mentioned inductance & impedance as important characteristics it is also my impression that those are not the only key characteristics to consider - linearity & piezoelectric transduction (microphony, I reckon) as you mention are indeed others. But just for the record I would not use other than C0G/NPO in critical circuitry and - as you likely know - at least their microphony levels are very low.

And regarding phase noise measurements, I cannot currently comment on your thoughts here ... although I personally would consider phase noise measurements at least helpful in clarifying "persistent" issues in a clock circuitry. But it is currently beyond me to comment much more on this ...

I have also sent you a PM.

Best regards,

Jesper
 
But just for the record I would not use other than C0G/NPO in critical circuitry and - as you likely know - at least their microphony levels are very low.
NPO caps are not generally recommended for bypass due to their very high Q which may result is ringing. That said, it is known that it is possible use a resistor in series with each NPO bypass cap to tune damping. However that approach increases inductance. Hence the expression, "there is no free lunch."
 
Update just to let folks know work continues in the background. Made some more changes to the reclocker board with a smaller but still important effect on listening panel judgement of soundstage depth. Now doing similar evaluation and modification of squarer boards to help make their presence more transparent. These things are necessary to fix in order to proceed with what I hope will be the next set of experiments to help vet the clock board. As it turns out also having a problem with one of my ultra-low phase noise clocks, which may reduce some of the possible experimental permutations. Expecting the clock problem to be fixed in due course though. Fortunately there is still another set of similar measuring clocks that can be shared between experiments.
 
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Hi Mark, just for clarification, what exactly is the beneficial function of the board ? In post 1 I see the fifo from Andrea, which has space for the XO clocks which are on your experimental board. Simply said, why not put them directly on the FiFo ? Is the board thought to be in a fixed setup, or is it more a lab, test and or development tool ?

interesting read so far, thanks for sharing
 
...why not put them directly on the FiFo ?
Because then someone will have to redesign the clock power, bypass, buffering, etc., on the FIFO board. Otherwise the clocks will sound quite bad. This was already noted to be the case by Andrea with Accusilicon clocks mounted on an early USB board from TheWellAudio. It just wasn't clear why they sounded so bad given their measured phase noise. Turns out that the standard support circuitry commonly used around clock modules does not baby the clocks enough to get the best out of them.

For other use cases than with the FIFO board, sometimes we may need multiple clock frequencies and or may need to feed multiple boards (such as for reclocking) where we should use separate buffered TL drivers to avoid excessive reflections interacting with clock stability.

All the above having been said, my purpose in designing a clock board was for general purpose use. Whatever I need a clock board for. Maybe for testing dacs, or whatever. Once I get something working, then I can use what I learned from designing the clock board to design only as much as is needed to finish a particular dac project. In that case I would be using the clock board as a development tool. Also, I could use it in a one-off dac where cost is not a big issue. Maybe only populate as much of the clock board as will be needed for the particular project. Stuff like that.

Just to give you an idea of one type of test setup for troubleshooting possible clocking problems, here is a test system in use:

1717621352361.png


The clock board is hosting a squarer, and is driving the FIFO board, while at the same time the clock board is the master clock source for the dual dac boards.
 
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Going to try attaching the current version (v2.0) of the clock board (it can be de-archived using KiCad 8). This is the version using LMK1C1104PWR buffers. There is not a finished BOM at this time, however I will try to write something up soon. If any questions, please feel free to ask.

Notes:
1. Doesn't have a frequency multiplier yet, make take some time before that's available. (One possible multiplier under consideration is NB3N502)

2. Not sure if the KiCad archive function includes all custom library info. If any problems please let me know.

3. This is the version I am using with Marcel's dac right now. Using IanCanada or better clocks and reclocking PCM2DSDd output, Marcel's dac sounds very good indeed. In fact I am doing some work on my Andrea dac setup to try to make sure it doesn't fall behind what Marcel's dac is doing at this point.
 

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Also going to post the Adapter Board that connects PCM2DSD to I2SoverUSB, including u.fl connectors for attachment to clock board and reclocker.
Again, this is in as-is condition. It is not fully documented. There are some pics and notes in my dropbox: https://www.dropbox.com/scl/fo/22zuv9aa6vhhff8dofs59/h?rlkey=y6646ixee85tpmh8cel85y7y9&dl=0

Here is a pic of an earlier version of the adapter board showing how I2SoverUSB connects to the bottom side of the Adapter Board. PCM2DSD goes on top.
1717687165050.png
 

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Going to try attaching the current version (v2.0) of the clock board (it can be de-archived using KiCad 8). This is the version using LMK1C1104PWR buffers. There is not a finished BOM at this time, however I will try to write something up soon. If any questions, please feel free to ask.

Notes:
1. Doesn't have a frequency multiplier yet, make take some time before that's available. (One possible multiplier under consideration is NB3N502)

2. Not sure if the KiCad archive function includes all custom library info. If any problems please let me know.

3. This is the version I am using with Marcel's dac right now. Using IanCanada or better clocks and reclocking PCM2DSDd output, Marcel's dac sounds very good indeed. In fact I am doing some work on my Andrea dac setup to try to make sure it doesn't fall behind what Marcel's dac is doing at this point.
It loads up fine in KiCad 8.0.1 Mark
 
Regarding a BOM. I am thinking that since I posted the KiCad files it means anyone can modify and or reuse parts of the circuitry in ways I may not have anticipated. Because of that maybe it will be best if I write up some component value recommendations along with some discussion of how they may be chosen. Some components may have multiple options at different price/performance ratios and or different part values for different use cases.

Any objections to that approach?
 
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Guys, maybe a bit off topic but it seems that this thread is the best place to ask:

Can I replace the 22.5792MHz clock with 45.1584MHz ones and the 24.576MHz with 49.152MHz ones without doing extra software and hardware modification on USB I2S interfaces (e.g: Amanero Combo384)?

Thanks.
 
It wouldn't help you that much to use AS318-B in that way. Even if the dac board could use those clocks, it would buffer them out through a CPLD chip. That increases jitter and changes the sound of the clocks.

Part of what my Clock Board project is designed to do is to get around those types of problems. You could use AS318-B installed in the Clock Board, derive 22/24MHz clock signals to send to your USB board, and then reclock the USB board outputs using the the AS318-B clocks on the Clock Board. Downside is it costs more and its more complicated to do it that way. Philosophically speaking, that's the trouble with dacs: its possible to make very good ones, but its hard to keep it simple and low-cost.
 
Thank you for the data. Once again, C0G have a tendency to ring due to insufficient self-damping. The good news is, anyone is free to modify and or test the clock board as they see fit. If someone else can show better dac sound from some variation on the existing design, then more power to them. We will all benefit together.

Also on the subject of C0G for clocks, IIRC Iancanada tried a mix of C0G and X7R to provide some C0G benefits yet at the same time enough overall damping. Didn't sound good with Crystek clocks, not as good as MU anyway. Didn't sound good for AVCC bypass either, at least no IMHO. Therefore maybe no need to repeat that particular experiment.

Some other information that may be of interest is that Crystek, Accusilicon, and TheWellAudio Squaring boards, all have some internal bypass. Therefore possible interaction with high Q external bypass caps may potentially result in wild impedance fluctuations at the actual clock oscillator.

Of course C0G with small damping resistors might work okay, if someone wants to do the work to find out.
 
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