If you compare this design to that by JLH that I posted there are some differences - first the closed loop gain of your circuit has been increased to roughly double. When that happens the unity gain frequency reduces - think gain bandwidth product - and phase shift starts at a lower frequency - thus the compensation arrangements need bolstering to maintain stability. With this design you would have to consider if a 22 pF capacitor is sufficient. JLH experimented with values in his circuit and settled on 47pF. You could experiment likewise. Just slip the leads of a small capacitor in parallel temporarily to increase the value.
In my view Q5 is sticking because at high output because Q4 is forcing this action by running more standing current than Q5. You can check this out under static conditions by measuring the voltage drops across R11 for for Q4 and R12 for Q5.
It can be seen from your scope image that when the output drops from 78W at 20kHz that the shape of the slope improves as the voltage swing gradually moves in a positive direction.
As an experiment find a resistor you can slip under the leads of R5 to reduce the resistance temporarily to say 68R to improve gm so the swing starts earlier in a plot on your 'scope. Other steps you could try firstly increase the value of C2 in the RC filter from 150pF to 220pF, and review the stopper resistors in the bases and gates of the output devices. It should be sufficient to use the right value for the gates, is 270R enough or is 330R better, and dispense with the base stopper resistors for Q6 and Q7.
Hellow thimios.
VAS is a 6mA CC on the positive side, but the negative side is a Darlington transistor that is actively on.
In this case, saturation causes excess charge to build up in the OPS.
This can also be seen from the fact that the recovery time from saturation on the negative side is much slower than that on the positive side.
When the OPS is strongly saturated in this way, oscillations can be induced, such as by the drop in ft, when returning to the active state.
It is recommended to limit excessive driving during saturation on the negative side.
I propose three types of proposals.
from left
Adding a Baker clamp diode. A small signal Di with a withstand voltage of 100V or more is required.
There is a penalty of increased distortion due to the voltage dependence of the interelectrode capacitance of Di.
Adding three series small-signal diodes to limit the voltage on R10
Adding a small-signal transistor to limit the current in Q5
All of them are just a few extra parts, so you should be able to try them out easily.
VAS is a 6mA CC on the positive side, but the negative side is a Darlington transistor that is actively on.
In this case, saturation causes excess charge to build up in the OPS.
This can also be seen from the fact that the recovery time from saturation on the negative side is much slower than that on the positive side.
When the OPS is strongly saturated in this way, oscillations can be induced, such as by the drop in ft, when returning to the active state.
It is recommended to limit excessive driving during saturation on the negative side.
I propose three types of proposals.
from left
Adding a Baker clamp diode. A small signal Di with a withstand voltage of 100V or more is required.
There is a penalty of increased distortion due to the voltage dependence of the interelectrode capacitance of Di.
Adding three series small-signal diodes to limit the voltage on R10
Adding a small-signal transistor to limit the current in Q5
All of them are just a few extra parts, so you should be able to try them out easily.
Ah, that is very interesting indeed. Thanks @mason_f8
If I was revisiting this design to update it then I might well omit those. Perhaps give a listen with and without.
If I was revisiting this design to update it then I might well omit those. Perhaps give a listen with and without.
Good!
Now I can watch Japan vs. Spain on TV with peace of mind. lol
I have a similar experience in the prototyping stage. In my case, IPS was Nch, so it occurred on the positive side.
The SPICE model can reflect the active behavior relatively well if the parameters are appropriate, but it seems that the saturated behavior is still not sufficient. Therefore, it will be difficult to reproduce this oscillation in simulation.
off topic
But there is still something that has bothered me for a long time. A very rare high-gm dual FET placed casually at the foot of the oscilloscope. What are you going to use it for?
Now I can watch Japan vs. Spain on TV with peace of mind. lol
I have a similar experience in the prototyping stage. In my case, IPS was Nch, so it occurred on the positive side.
The SPICE model can reflect the active behavior relatively well if the parameters are appropriate, but it seems that the saturated behavior is still not sufficient. Therefore, it will be difficult to reproduce this oscillation in simulation.
off topic
But there is still something that has bothered me for a long time. A very rare high-gm dual FET placed casually at the foot of the oscilloscope. What are you going to use it for?
If you replace the 0.22 ohm with 10uH inductors (no resistance) it will oscillate on clipping. Well, my sim does anyway. Add the three diodes and it stops, however add a resistive load and it seems to return... hmmm
Real world and sim are bound to differ though on something like that.
Given that you are not going to be ever using the amp in that region (heavy clipping) I do wonder if it's really an issue in the long run.
FETs are in circuit,links in resistors position.
Attachments
If you think about it, this arrangement it is more suited to having an LTP based circuit where R10 value in the forward drive transistor would be in the region of 680R. iAccordingly the base emitter voltage of Q4 would be less than shown by R10 and Q4 would be running a more appropriate level of current for drive purposes.Hellow thimios.
VAS is a 6mA CC on the positive side, but the negative side is a Darlington transistor that is actively on.
In this case, saturation causes excess charge to build up in the OPS.
This can also be seen from the fact that the recovery time from saturation on the negative side is much slower than that on the positive side.
View attachment 1115535
When the OPS is strongly saturated in this way, oscillations can be induced, such as by the drop in ft, when returning to the active state.
It is recommended to limit excessive driving during saturation on the negative side.
I propose three types of proposals.
from left
Adding a Baker clamp diode. A small signal Di with a withstand voltage of 100V or more is required.
There is a penalty of increased distortion due to the voltage dependence of the interelectrode capacitance of Di.
Adding three series small-signal diodes to limit the voltage on R10
Adding a small-signal transistor to limit the current in Q5
All of them are just a few extra parts, so you should be able to try them out easily.
View attachment 1115537
Q4 and Q5 is a solution to dealing with the capacitive load at the base of a single transistor Vas with the dominant pole capacitor deployed between the collector and base where it is the feedback path of an inverting stage which amplifies the effect and a buffer transistor is needed to avoid overloading the LTP transistor with amplified capacitance presented to Q5 base.
In this present circuit the dominant pole capacitor is taken back to the inverting input of the circuit which avoids that issue.
Av of a transistor increases according to formula Av= gm. RL where the later is the load resistance in k Ohms and gm is in mS. This is close to 40 times per m.a. for small bias currents.
If you reduce Q1 current by reducing the drop in base emitter voltage - that between the base and R10 the gm of this stage will drop accordingly and reduce the overall open loop gain of your circuit. With an LTP input the fall would be dramatic. In the present circuit there would still be a loss of gm which can be compensated for by increasing the current and gm of the next stage.
Your CCS delivers 6m.a. and you can increase this to increase Av to improve the level of open loop feedback of your circuit. In this light lowering the value of R5 makes sense and costs only a matter of cents. In the circumstances mentioned you have a conundrum to deal with - all you need is a single stage Vas
I bought those about 40 years ago!
It was an amplifier published in Elektor.
LFA150 a fast amplifier.
https://www.diyaudio.com/community/threads/elektor-amplifer.355940/#post-6243522
I think that you will find that the saturation storage time of Q3 is causing the effect. After Q3 saturates its base is over driven and some significant charge is stored in it. The 3.9k base resistor and the base current of Q3 will remove the excess charge in time but that storage time keeps Q3 from controlling the output for a while. After the stored charge is gone the loop will race to find its bias point. I suppose that the storage time is being modulated somehow since there are many different retraces of the output during that condition.
James
James
Looking at this shows the rail voltage are +/- 40V not +/- 45V so R10 voltage drop is reduced and the current through Q4 . reduces marginally to 10 m.a. R10 could usefully be reduced to 4k7. That will reduce gm for Q4 but this can be compensated by increasing the current through Q5 by reducing R5 resistance.Hi,
Erm-- A few have asked this
The best I can offer I am afraid is an untested layout-- which was really an exercise in using DipTrace for me. Having said that the whole design is extremely stable and not prone to any "nasties" and even on prototyping board it performs well, and I can not see any major problems with using this layout.
That was just a untested board layout exercise from a long time ago.
I'm very wary of making untested changes to circuits as I've been caught out with that in past. You see something later and wonder why on earth you did it that way at the time... you alter something... and sometimes it doesn't go to plan.
What I can say is the amp in its original form has proved itself over 2 decades now and those that have constructed it have all rated the sonics very highly. Unless you drive the amp hard into clipping the effects noted here, as it comes out of hard clipping, are really a non-issue (imo). It is way outside the normal performance envelope.
Enjoy the music
that is what it was created for.Fair enoughThat was just a untested board layout exercise from a long time ago.
I'm very wary of making untested changes to circuits as I've been caught out with that in past. You see something later and wonder why on earth you did it that way at the time... you alter something... and sometimes it doesn't go to plan.
What I can say is the amp in its original form has proved itself over 2 decades now and those that have constructed it have all rated the sonics very highly. Unless you drive the amp hard into clipping the effects noted here, as it comes out of hard clipping, are really a non-issue (imo). It is way outside the normal performance envelope.
Enjoy the music