One of the Top Solid-State CFA amp design

Re-drawing for clarity reveals a couple things. C9,C10,C11,C12 are counter productive and only serve to couple supply noise into the signal path

As was explained before in other thread, 10uF/16V elcos or C11, C12 are decoupling current source/sink generators (sense BJT). All unwanted AC, RF, ripple, ... must be rejected from sense BJT's collector to prevent any kind of oscillations in CSS generators.

This attached file with Jfet input
Those jfets you used are unobtainable and there seems no good complementary pair alternative.
 
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It is possible in your set up mode a restriction of supply current is is having an effect on the biasing of the TL431's - reduced current flows through whatever resistor network you might have set up.

Your transistor measurements suggest these are in working order under current restricted conditions and that the output stage is hogging most of what is available.

Do you mean my 1K current set resistors are too high? I have stable 15V potelnial on both rails under 36V and 46V condition.

I think this is osc responsible for such a high current draw which goes before current set resistors to TO126 transistors. That's why 15V potential remains stable and TO126 tr are very hot.

When im doing sim on your circ im getting som osc around sleving..

I never got happy with your input transistors in the voltage amplifier, nor for the driver.

Mentioning current sorces!!!! They are part of your circuit problems.
The collector emitter capasitor in the current sorces ( Q27 and Q28) is here making for an oscillator as it "delayes" the feedback.

Where exactly have you found the osc? Before Michael said in p 672 the circuit with your mods simulated perfectly well.

What's wrong with my input transistors in the voltage amplifier and in the driver?

Do you mean 10uF 16V caps could be responsible for osc?

If nobody would like to comment about your circuit, could you say some about pros and cons of your sirc and current circ elaborated here?
 
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LIKE I WROTE EARLIER: I just wanted to use something i had simulated a few times with to make sure i could set focus on the input stage, ....
So i havent looced up your transistors exept cfa driver ***1930 30Mhz. AND you title the tread ....CFA amp... Well... its cfa drivers and you dont use sinclair....
So if the title or amp realy holds for the title i havent asked about.

-LIKE I WROTE IN A EARLIER POST:At the collectors of your current sources i found effect at high signal as an other mentioned (moly) problem under high signal.... so i moved current sources and set i resistor in series. Too avoid the effect of your current sources collector emitter and collector base capacitor. Thats like what Giovanni Stochino and several others do also to spread power.

No i havent critizized your 10u/16V cap ... I WROTE You have several caps in series : AVOID This.

NO The amp i showed is not checked in any way and was just put toghether by copy cut and paste to set fokus on input stage. AND follow up on your questions. ONLY AS EXAMPLES!
Random put togheter. Your amp and your components i havent checked, nor is your topo of my currenttly favorittes, as i have my other projects taking just as much focus as i like ;) If you like a circ with same base design but inverting John Curl JC3 amp and JC2 preamp is classical designs with quad Jfets at the input. Your circuit uses 220 and 10 Ohm just where JC3 does !!!! Have you been looking into JC3 already ?
 
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Balanced input amp example

Andriy would like balanced inputs.

I see on Bob Cordell's book thread 'rsavas' posted a circuit for the Sansui AU-X901 which has a balanced power amp (see p3) with balanced input using the XLR "direct input". It also has a SE to balanced converter (see P2 Q7-Q12) -- effectively an inverting (discrete) opamp with a gain of -1.

The power amps balanced inputs have equal 4k3 on each input and 150k feedback resistors from each output.

It is not necessary to use a bridged power amp when you have balanced inputs. For a single output power amp like Andriy wants we simply ground the noninverting feedback resistor (rather than to the 2nd output). That gives us a standard 4 resistor differential amp with 2 equal input R's.

But unfortunately, you cant get 2 equal input resistors with a CFA input stage. If you add a buffer to the inverting input of a CFA to have two equal input resistors then you no longer have a CFA but a VFA input stage.

BTW The distinction between the CFA/VFA was recently given here here Post 654 by CPaul. Using that distinction I have conceded here that my Rush input stage in earlier posts (eg sim4e Post 564) cannot be called a "CFA" input stages because of the buffering of the inverting input (by Q8,Q9 in sim4e).

Therefore, the only way that I can see to have two equal input resistors and CFA's ... is to bridge two CFA's.

Andriy, I think you have said previously that you would rather use a SE input than bridge two amps per channel. Is that still your thinking?
 
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No i havent critizized your 10u/16V cap ... I WROTE You have several caps in series : AVOID This.

!!!! Have you been looking into JC3 already ?

I haven't wrote anything about critics. Just asked. Btw, I tried to remove 10uF caps from the circ and they seems do not change the operation of the amp. But when I removed 1uF caps in series the amp didn't work what my bulb tester showed.
I will look in JC3.
Andriy, I think you have said previously that you would rather use a SE input than bridge two amps per channel. Is that still your thinking?

Yes, it's correct Ian. Once Eva mentioned that it could be possible to make balanced input with jfets what isn't with bjts unfortunately, as I understood. That's why I asked R Dijk.

Have you noticed the same problem with current sources in our schematic?

What about cross-conduction problem, can we use A1930, C5171 as predrivers to withstand 1W Pd load from 25 Ohm driver BE resistor use or just put a heatsinks for currently used predrivers as I did?
 
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...
Have you noticed the same problem with current sources in our schematic?
None for HF stability. As you mentioned I found the CCS temp co was able to compensate for the input transistor temp co; either by design (LC?) or luck?.

There is the secondary problem of the CCS's of getting enough current from the 15V rails when changing the power supply voltage. R10,R11 need to be changed to suit lower rail voltage to keep the +15V rail regulated by the zeners. If there were LED's in series with the zeners then you could see when the "15V" rails were being "starved". Starving the zener's causes everything else down-steram to be "starved" and I suspected that may be the cause of the motor-boating.

One way around the 15V rail problem would be to have a dedicated +/-15V regulated rails from you second power supply (not feeding it via D3,D4). Unfortunately, as I found on my Cube amp, most pos/neg regulator IC's don't have matching temperature coefficients, some do, but to avoid issues I opted for zener's since they guarantee the same temp.cos.

What about cross-conduction problem, can we use A1930, C5171 as predrivers to withstand 1W Pd load from 25 Ohm driver BE resistor use or just put a heatsinks for currently used predrivers as I did?
Sorry, I am not familiar with these parts in terms of packaging and thermal ratings including their SOA so I don't know if the present predriver can safely handle a 25 ohm collector resistor. A simulation can show the peak currents and voltages when driving say 4 ohms and compare that to the datasheet SOA plots. Likewise, driving 2uF and 8 ohms with say 20kHz in case someone ever wants to do that (with the output inductor put back of course) ... whatever is the worst case for the predriver. I don't recommend trying it on the bench to see if it survives ... one transistor breaking down can take out a lot more in this topology, unfortunately.
 
BUFFERED FEEBDBBACK is not cfa amp.

Andriy would like balanced inputs.

I see on Bob Cordell's book thread 'rsavas' posted a circuit for the Sansui AU-X901 which has a balanced power amp (see p3) with balanced input using the XLR "direct input". It also has a SE to balanced converter (see P2 Q7-Q12) -- effectively an inverting (discrete) opamp with a gain of -1.

The power amps balanced inputs have equal 4k3 on each input and 150k feedback resistors from each output.

It is not necessary to use a bridged power amp when you have balanced inputs. For a single output power amp like Andriy wants we simply ground the noninverting feedback resistor (rather than to the 2nd output). That gives us a standard 4 resistor differential amp with 2 equal input R's.

But unfortunately, you cant get 2 equal input resistors with a CFA input stage. If you add a buffer to the inverting input of a CFA to have two equal input resistors then you no longer have a CFA but a VFA input stage.

BTW The distinction between the CFA/VFA was recently given here here Post 654 by CPaul. Using that distinction I have conceded here that my Rush input stage in earlier posts (eg sim4e Post 564) cannot be called a "CFA" input stages because of the buffering of the inverting input (by Q8,Q9 in sim4e).

Therefore, the only way that I can see to have two equal input resistors and CFA's ... is to bridge two CFA's.

Andriy, I think you have said previously that you would rather use a SE input than bridge two amps per channel. Is that still your thinking?

Yea, thats why i wondered abt CFA and wanting ballanced input.
Its not that many more components, getting rid of a pair of resistors and replacing it with input transistors ( if emitter resistors them also )

Bridging making two amp output in series, isnt one amp distortion just inough??

Then adjusting som feedback values to get the right impedance/gain for bouth inputs, if somone really (REALLY ?) wants to use ballanced.

The new buffered feedback within stippeled lines.
attached for fun, (but without ballanced OF course!)

Yea this time i have deleted a cople of strings asking .op pointing to an unnsesser library, so it should run.

This with buffered feedback its no longer CFA
 

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None for HF stability.

There is the secondary problem of the CCS's of getting enough current from the 15V rails when changing the power supply voltage.

Sorry, I am not familiar with these parts in terms of packaging and thermal ratings including their SOA

If R10, R11 resistors are correctly chosen there shouldn't be any problem with 15V supply.
Do you mean D3, D4 feed Q16, Q17 and D1, D2 feed 15V bridge?

Don't you trust simulation and datasheet of present predrivers? The simulator shows the same predrivers' Pd for 8 and 4 Ohms loads - 1W. Datasheets says absolute maximum rating collector Pd 1.2W ambient and 5W with heatsink. So, the SOA and bench test conditions, if there is no osc, according to Spice, are 1 to 5 times. Isn't it safe enough for predrivers? Likewise drivers' sim Pd is almost 5W, while their SOA, according to datasheet, is 20W with heatsink.
 
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Pd for predrivers 1w, thats 4-8 Ohm RESISTIVE load. Bench test, here kabinett and limited airflow on top of a pcb.... This is pretty close man! what enviroment temperature do you expect ?

What sim shoved for mee som sleving noise, the local sorce was the first thing i suspected. The current sorce transistor has variation in collector voltage equal to signal level or close to.
It could bee the simmulation setting step size making it look like step caused noise ?
 
Andriy would like balanced inputs

You can buffer and drive the midpoint of the 100 Ohms resistors.

That is buffering the negative input and driving the feedback gnd.

If wee then carefully put the current from negative input into the sirc ....
Then any input and output signal should bbee directly causing circuit current.

Personaly i prefer the buffered feedback as i did show in prev post.

No i dont know what to cal the negative input since positive input is as before.

attached file as example for buffering negative input.
 

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Bench test, here kabinett and limited airflow on top of a pcb.... This is pretty close man! what enviroment temperature do you expect ?
As I know, the rule of thumb for safe and reliable operation of semiconductor is do not exceed half the value of SOA margin. I expect as mentined in datasheet - 25C, however it could be a problem for more warm countries, where t-ambient can reach almost a double of this. The other acceptable solution of cross-conduction issue is to exchange for more robust predriver transistors.

You can buffer and drive the midpoint of the 100 Ohms resistors.

I just asked you to know your point with jfet input. I'm not a tech in this. If others will approve than we can elaborate further.
 
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Do you mean my 1K current set resistors are too high? I have stable 15V potelnial on both rails under 36V and 46V condition.

I think this is osc responsible for such a high current draw which goes before current set resistors to TO126 transistors. That's why 15V potential remains stable and TO126 tr are very hot.

The purpose of the zener diode D4 in the original circuit is to make the base voltage of Q16 5volt lower than at Q16 emitter. You could be assured of this being constant across a wide range of supply voltages with zener diodes

If the voltage drop between these Q16 points is any amount greater than 5 volt this will cause Q16 to draw more current -than envisaged for the design.

The effect would be replicated by Q17 on the opposite half circuit.

As previously revealed and questioned you substituted TL431 shunt diodes - for the zeners.

These devices which rely on external components to fix the voltage drop at 5V.

That this what is happening or not remains as a matter of doubt needing to be resolved.

What is your answer?
 
I just asked you to know your point with jfet input. I'm not a tech in this. If others will approve than we can elaborate further.

the ease and simplicity togheter with tolerance for high impedance AND ease of ballanced input when using dual. Self biasing that is self stabilizing.....

Hav a look at PassLab F series amplifiers they al use J-fets input.
A lot of extra components in the current sorces neded for transistors.
Its all about how you implement them.
 
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Hi Andriy,
Closed case temperatures can easily reach 50°C here in Canada in the winter. I would respect thermal limitations a little more seriously if I were you. I'm just letting you know from my own observations, and that was with equipment in idle mode, not after running into a load.

-Chris
 
I just asked you to know your point with jfet input. I'm not a tech in this. If others will approve than we can elaborate further.
Once more to the anomalies in your input stage at high slew,; this may not bee so much to worry about.

But put it this way: if you ground the output and look at what is happening at your input stage: The bias sorces is set at 10 mA, giving 10mA * 100 Ohm is close to 1Volt. Slowly increase input voltage and pay attention to the negative half side..... The base emitter voltage say is 0.6 volt for input transistors, that means they cut completely off when input step exceeds 0.4 volt. So in the moment your input signal is above 0.4 volt the negative half ( input pnp transistor ) is cut completely off, but the positive half is continuing to increase its output.

Same the oposite: decrease slowly input dc voltage having no feedback: Then your input npn transistor cuts of at about 0.4 Volt in

But that is too explain what can bee visible at say a 1v square at input compared too 0.2 V square input.
 
The purpose of the zener diode D4 in the original circuit is to make the base voltage of Q16 5volt lower than at Q16 emitter. You could be assured of this being constant across a wide range of supply voltages with zener diodes
If the voltage drop between these Q16 points is any amount greater than 5 volt this will cause Q16 to draw more current -than envisaged for the design.
That this what is happening or not remains as a matter of doubt needing to be resolved.
What is your answer?
In addition to post 675, the voltage drop at D3, D4 TL431 devices are 5V lower the initial voltage. With 4mA bias current when initial voltage sags by 10V, to 37V for example, the voltage at D3, D4 outs becomes 32V with refference to gnd. Maybe should I measure the current drawn by Q16, Q17 with help of say 10 Ohm resistors? It's after current set R10, R11 resistors, if to look at the layout.

the ease and simplicity togheter with tolerance for high impedance AND ease of ballanced input when using dual. Self biasing that is self stabilizing.....
Your offer is to replace input bjts with jfets and remove CCSs with associated components to simplify the circuit?
Can be used here only N-type jfets , like BF862? They have no P-type equivalent.
Will it remain CFA than if used as SE? Jfets have high input impedance, output impedance of the circuit will increase.

Once more to the anomalities in your input stage at high slev,; this may not bee so much to worry about.
But put it this way: if you ground the output and look at what is happening at your input stage:
Sorry, but I don't understand the point, why would we ever need to short the amp (to ground the output)? Does it really matter what happens then or how the amp will fry?
 
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Closed case temperatures can easily reach 50°C here in Canada in the winter. I would respect thermal limitations a little more seriously if I were you. I'm just letting you know from my own observations, and that was with equipment in idle mode, not after running into a load
Hi Chris. I can only guess that your amp has bad natural airflow or needs an active cooling in such conditions.
Drivers with 5W Pd will be bolted to main heatsink which shouldn't cause any thermal problems for them. Do you think separate heatsink for predrivers won't cope with 2W total Pd?
What do you offer as best appropriate solution, btw?

Could you please guys check the front-end psu if it can withstand 50V out? I replaced current Zeners to 50V type. Just remembered, without load it produces 49-51V, when connected to the amp 46-47V with 3mA input bias. Originaly it was intended for 39V.
 

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