SystemD LiteAmp

Hi again,
yes your wave shapes are looking already reasonably good. May be some
minor tweaking of the snubbers might further dampen the gate ringing during turn on. But thats really fine tuning.
Dampening the gate ring? You mean add the gate snubber (RC network between the gate and the source)? i never try that before. I know you have implemented it on the "SystemD_2kW project", any experience to share?:D
Which snubber values do use?
Now I use "5ohm + 220pF " between the drain and the source on each Mosfet.

ps: the self osc frequency for my board is around 430K.
 
Dampening the gate ring? You mean add the gate snubber (RC network between the gate and the source)?
.....
Now I use "5ohm + 220pF " between the drain and the source on each Mosfet.
In first step your approach to put a RC between drain and source is the right way.
This RC also dampens the ringing of the gate, because usually most of
the gate ringing is coming through the internal Crss of the MosFet...
The ringing at your gate is showing a fundamental of approx. 62MHz and some content of higher frequencies.
For dampening such resonances the snubber shall act mostly resistive at the concerned frequency. Means R should be 2-3 times higher than Xc. 220pF at 62MHz has an Xc=11.6 Ohms.
==> At 62MHz your snubber will act mostly capacitive and not dampen much. Theoretically it will just slightly reduce the resonance frequency and magnitude, but not really dampen much. A resistor value in the range between 22 ... 33 Ohms theoretically should fade the oscillation within shorter time. ... well, theoretically... By the end of the day only measurements will prove.
Furtheron a snubber with 220pF is still light weight for an IRFB4227.
If the impedance of the snubber is much higher than the
impedance of the MosFet-Coss, then the influence of the snubber becomes weak (even if it acts resistive). Unfortunately Coss is massively depending on Vds. So it is not always obvious from data sheet which values work best, or which trade off between nice damping and acceptable snubber losses is most fortunate.
The wave shapes which I had posted were derived with a snubber of 470pF + 18 Ohms from drain to source of an IRFB4227.

In first step I always recommend to stay without additional gate-source-snubber, but investigate how much improvement of the drain-source-snubber is possible with acceptable snubber losses.
However the basic considerations for a gate-source-snubber are similar like for the drain-source-snubber.
 
Hi, Choco,
Based on your suggestion,i had fine-tuned this snubber and got attached pictures,
pic1 47R//47R + 470p (20A sink current turn on)
pic2 47R//47R + 470P (20A sink current turn off)
pic3 47R//47R//47R + 560P (20A sink current turn on)
pic4 47R//47R//47R +560P (20A sink current turn off)
pic5 47R//47R//47R//47R +560P (20A sink current turn on)
pic6 47R//47R//47R//47R +560P (20A sink current turn off)
i'll chose the 12R+560P as the final tuning parameters,

ps: google the class d snubber design, i got http://www.ti.com/lit/an/sloa201/sloa201.pdf, it's also help for the beginners.

Thanks,
 

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I see, you are on the right track.
Now you have everything you need in order to decide about your
personal heat-vs-damping-tradeoff.

From my side there is still open to show the issues of inserting a current probe.
Here a screen shot, which shows the impact of the current probe.
Yes – I have a new vintage scope, thanks to ebay. Since late 2015 I am a proud owner of a Tektronix TDS784C with 2M memory. :)

The screen shot was taken from a modified LiteAmp, for experimentation with SiC-Fets (C3M0065090). I was curious regarding the Qrr and it is obvious that the SiC devices behave
really nice in this respect, but that‘s not the topic of this post.
Load situation is sinking 25A and turning on the low side switch.
During current commutation the Vds including voltage drop of the current probe is about 30..40V more than directly measured at the pins. Taking into account the di/dt of approx. 1.1A/ns, this translates to roughly 30nH which are inserted by the wire loop with current probe.
Data sheets of current probes usually are stating much lower values, but the data sheet values assume that you just put the probe around an existing wire.
But in reality you often have to add a wire of 50mm….60mm length in order to form a loop which is large enough to insert the current probe. In total this insertion of a wire loop with current probe has a massive impact, like a poor layout.
(Depending on load situation this additional inductance also can cause massive ringing, not shown here...)

Ch1, black: Vds of low side Fet, measured directly at the pins. 100V/Div.
Ch3, red: Vgs of low side Fet. 5V/Div.
Ch3, green: Vds of low side Fet including wire loop with current probe. 100V/Div.
Ch4, blue: Id of low side Fet. 10A/Div.

... http://www.ti.com/lit/an/sloa201/sloa201.pdf, it's also help for the beginners.
Beginner? I would bet a box of beer, you are not a beginner. :cheers:
 

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I see, you are on the right track.
Now you have everything you need in order to decide about your
personal heat-vs-damping-tradeoff.
Yes, thanks for your kindly reminding, i'll take it to balance this on my board.

Here a screen shot, which shows the impact of the current probe........
Your screen shots are always nice learning material for the one who like to build the class d amps, i must admit i learn a lot from your posts:D

Talking about the mosfet ruggedness (IRFB4227) in the design, it seems there are no data ratings(dv/dt) in its spec sheet, any recommend data from your side?And, can you post some measurements regarding to this dv/dt again?

ps: Speaking to the beers, you must recognize the pictures in attached, we're summer now, ice beers are good gifts to end the whole working day.:cheers:

Thanks again~~
 

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......
You could consider to use the slightly stronger brother: IRFB4127

Yes, this stronger brother has very nice spec, i hope to get same samples in the future to test it...
Working hard to assembly the first sample these days, and pre-scan the EMC today. Although we failed the test, but the test data shows not bad for this first sample.

PS:Wanna to send above message to U in private, but your mailbox is full now. If you don't mind, please PM me your mail-address:D
 
Hi all,

I make another SMD version based on the LiteAmp. With component values described in #598 using a sagami inductor, twice IRFB4227 per side, and zetex gate drivers.

11R gate resistors for turn-on, 5R6 for turn-off

first picture is Vs-node
second rising Vgs
3th falling Vgs.

snubbering at Vds its't done yet.

IRS2092 running at DT4.
 

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Hi all,

I make another SMD version based on the LiteAmp. With component values described in #598 using a sagami inductor, twice IRFB4227 per side, and zetex gate drivers.

11R gate resistors for turn-on, 5R6 for turn-off

first picture is Vs-node
second rising Vgs
3th falling Vgs.

snubbering at Vds its't done yet.

IRS2092 running at DT4.

what zetex gate drivers have you used ? nice waveforms, only a analog scope would make it look nice, I no fan of the aliasing on cheap digital scopes (8 -bits).
 
Attached schem with updated values for the gate drive. If anyone wants the gerber, just message me and I will give the file.. Though I have the right to deny the file to anyone, specially those who have dubious looking accounts, I will give it only to DIYers (and not mass producers).

Note: Free gerber is for this specific version only (see attached pic). Also I have other derivatives of the layout and will be for sale and those are not shareable. Thanks!

Looks like a good design and layout. I'm curious how you arrived at your current limit settings? It looks like your voltage divider values result in a current limit of ~105A which I would think would be a little uncomfortable for a single pair of IRFB4227. If it's appropriate, I'd also like to ask a general question of how to determine appropriate current limit settings for IR Class D driver ICs? I am sure that Choco has some good ideas on this topic!
 
D

Deleted member 148505

Looks like a good design and layout. I'm curious how you arrived at your current limit settings? It looks like your voltage divider values result in a current limit of ~105A which I would think would be a little uncomfortable for a single pair of IRFB4227. If it's appropriate, I'd also like to ask a general question of how to determine appropriate current limit settings for IR Class D driver ICs? I am sure that Choco has some good ideas on this topic!

Yup the limit was set too high. Not optimized, but it works, I just wanted to use common resistor values on many parts as possible.

On the amps that I sell, I set the OCP to 3x the "advertised" current output. So that it can handle impedance drop on some speakers without triggering OCP. (secretly, it runs on lower impedance loads)

Attached files with new OCP
 

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...I'd also like to ask a general question of how to determine appropriate current limit settings for IR Class D driver ICs?

Basically the formulas from the IR data sheets and applications notes are fitting to reality however you have to consider two further effects which are often neglected.

1. HF-Ringing of the power stage can cause phantom tripping of the sensitive IR shut down circuitry. The only proper way to deal with this is to avoid excessive HF-ringing ==> Layout and snubbering is substantial. Measurements and test set up for various load situations described somewhere ealier in this thread.

2. Thermal behavior of the MosFet. RDSon grows with heat. At max temp it is usually factor 1.5...2 higher than at 25 C.
In order to model this accurately you will need to claculate your MosFet losses including switching losses. With this data you can then step into the thermal model of your MosFet+mounting on the heat sink. Despite its impressive power rating of an IRFB4227 you will find that under normal mounting conditions its junction temperature will heat up from 25°C to 150C in approx. 1s when the losses are around 100W.
Fortunately with a sine wave you already get only short times of max stress and with music it is not a constant sine wave but most time a small signal and only during short times large signals. Feel free to calculate all realistic operating conditions with modulated signals and watch your junction temperature....
A simpler and practical rule of thumb:
Calculate the shut down levels with the RDSon at 150 C (this will avoid early tripping due the real chip temp) and make sure that the losses, including switching losses, at this current do not exceed 50% of the max power rating of the MosFet. Keeping this 50% margin reduces the chances that the junction heats up above 150C already at currents below the tripping level, i.e. during long term bass attacks etc... . This aproach is not bullet proof, but usually OK.
 
If your speaker is a 8 Ohm type you can go for 2x65V_IRFI4020 in briged mode. With an unstabilized but reasonably stiff power supply this will lead to 600Wrms (assuming your PSU will not sag worse than +/-53V).

If your speaker is a 4 Ohm type you can go for 2x40V_IRFI4212 in briged mode. With an unstabilized but reasonably stiff power supply this will lead to 500Wrms (assuming your PSU will not sag worse than +/-34V).

If your speaker cannot handle this amount of power, then you can stay
unbridged. For unbridged power please look here posting #501:
http://www.diyaudio.com/forums/class-d/255046-systemd-liteamp-51.html#post4780991
 
Appologies for the missing data.
I was thinking of a 8r Type, possibly a PA Driver like a Faital 12PR300.

My plan is to extend a 2-Way into a large 3way Floorstander, Bi-Amped, the 2Way can remain passive and be driven from a tube Amp for example, with the addition of a LiteAmp for the Bass Driver. i think the 2x65V Version will be Way enough:)
I just need to look for a matching Powersupply.
thanks for the quick reply!
J:up: