Andrea, no problem!
1) I attach a photo of the Teradak modified clock crystal OCXO 19.2 MHz for Raspberry Pi 3B;
2) Datasheet stationary Raspberry Pi 3B clock 19.2 MHz;
3) !Approximate! graph of Teradak OCXO noise;
4) Scheme for dismantling stationary clocks 19,2 MHz with Raspberry Pi 3B;
5) Photo of my setup at the moment with connected OCXO.
Andrea, an improvement MORE than changing a clock with FifoPI. Substantial synergy occurs Teradak modified clock crystal OCXO with FofoPI. this is a real reduction in jitter for the whole set. I beg you, take measurements of the noise and make sure of it.
Oleg
View attachment 999.pdf
1) I attach a photo of the Teradak modified clock crystal OCXO 19.2 MHz for Raspberry Pi 3B;
2) Datasheet stationary Raspberry Pi 3B clock 19.2 MHz;
3) !Approximate! graph of Teradak OCXO noise;
4) Scheme for dismantling stationary clocks 19,2 MHz with Raspberry Pi 3B;
5) Photo of my setup at the moment with connected OCXO.
Andrea, an improvement MORE than changing a clock with FifoPI. Substantial synergy occurs Teradak modified clock crystal OCXO with FofoPI. this is a real reduction in jitter for the whole set. I beg you, take measurements of the noise and make sure of it.
Oleg
View attachment 999.pdf
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So your RpI is reclocked by a clock hat then ? The Fifo is mandatory as an noise gnd & I2S signal isolator before it as the RpI is a bad source for DAC purposes - but an excelent one of course for library management & playback from the sofa purposes. Even so the sound quality is changing according the power suplly and so on : look at Greg thread improvment about the Fifo Rpi board from IanCanada as illustration. Andrea is right about that.
Your best bet for the moment is to use the better Allo Rpi clone. Or reclocking a raw Rpi is like icing a garbadge box : it will look nicer but not smell better. Your Rpi is needing an Allo Kali hat or a FifoPi reclocker from Iancanada at a minimum. Imho. But you maybe already uses that ?
Edit : you wrote befor I. I see you are using Iancanada Fifo... good ! Ignore my post
Your best bet for the moment is to use the better Allo Rpi clone. Or reclocking a raw Rpi is like icing a garbadge box : it will look nicer but not smell better. Your Rpi is needing an Allo Kali hat or a FifoPi reclocker from Iancanada at a minimum. Imho. But you maybe already uses that ?
Edit : you wrote befor I. I see you are using Iancanada Fifo... good ! Ignore my post
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While I think the Teradak 19.2MHz OCXO is good one, I doubt the jitter of RPi will be improved with it. The problem is the connection between the Teradak OCXO board and the clock pads on RPi. Using the long cable without paying attention to impedance matching will likely makes the jitter performance worse than the inferior onboard clock.
Andrea,
also a big improvement was the separate feeding power of raspberri Pi 3 on the 5v (GPIO), 3.3v (GPIO) and 1.8V(wire). You can use one board for this Mezzanine (LDOVR). An even bigger improvement will be the separate power supply on 5v ConditionerPi (Ian), UcConditioner 3.3V (Ian) and 1.8V LDO. I'm doing it now.
In other words, I consider it imperative to replace the stationary quartz and separate power supply to use the raspberry as a digital sound source. IMHO
Oleg
also a big improvement was the separate feeding power of raspberri Pi 3 on the 5v (GPIO), 3.3v (GPIO) and 1.8V(wire). You can use one board for this Mezzanine (LDOVR). An even bigger improvement will be the separate power supply on 5v ConditionerPi (Ian), UcConditioner 3.3V (Ian) and 1.8V LDO. I'm doing it now.
In other words, I consider it imperative to replace the stationary quartz and separate power supply to use the raspberry as a digital sound source. IMHO
Oleg
I think there is something wrong, you have attached a picture with an oscillator at 19.2 MHz but the phase noise plot shows a 33.8688 MHz carrier.
Anyway -103dBc at 10 Hz from the carrier is not low phase noise.
Andrea,
also a big improvement was the separate feeding power of raspberri Pi 3 on the 5v (GPIO), 3.3v (GPIO) and 1.8V(wire). You can use one board for this Mezzanine (LDOVR). An even bigger improvement will be the separate power supply on 5v ConditionerPi (Ian), UcConditioner 3.3V (Ian) and 1.8V LDO. I'm doing it now.
In other words, I consider it imperative to replace the stationary quartz and separate power supply to use the raspberry as a digital sound source. IMHO
Oleg
It's off topic here....but: Basicly the Allo Rpi clone has not the pwm chip and splitted the three voltage rails as far I know, hence the better result with three separate rails feeded from LiFePo or isolated supercap... But this is for the Greg's thread about FifoPi & surrounding Rpi improvment
. Your clock cable must be 50 ohms if the pcbsare 50 ohms impedance and must be shielded not being more than 2"to 4" between it and the load or it's a waste of time imho, at least in this technology. Sc-Cut oscillator don't use the same tec and is less sensible - or not in Andrea's words- to the length between the osci. and the load with the proper shoelded cables and connectors. As you probably know already
Andrea,
I have attached an approximate noise graph Teradak OCXO with two exclamation marks.
Oleg
It's off topic here....but: Basicly the Allo Rpi clone has not the pwm chip and splitted the three voltage rails as far I know, hence the better result with three separate rails feeded from LiFePo or isolated supercap... But this is for the Greg's thread about FifoPi & surrounding Rpi improvment
Please forgive me, but this is related
I see that only after your first post and second answer before mine. because the outputt management of osci. here with the SC-Cut it will be really better near the carrier than any ocxo just plugged like the one you have, Aculison, etc... Sure you know that due to your complex dac... nice r-core traffo, btw. If a good source, don't hesitate to drop me a link in my pm please.
Andrea,
I have attached an approximate noise graph Teradak OCXO with two exclamation marks.
Oleg
Well, an "approximate noise graph" is not relevant, each oscillator is characterized by its own phase noise performance, and moreover as I already said even if the plot is true it shows a typical high phase noise expected for a AT-Cut crystal not for an SC-cut type. A low phase noise OCXO at 19 Mhz should be at least 25-30 db better.
I'm sure that replacing the clock of the Raspberry with a better one is not the right way to improve the system, there are several reasons I have explained in this thread and other threads about Ian's stuff, but anyone is free to follow his own way.
Andrea
As I did recently.It might interest someone.Also contacted Croven Crystals for the same type of crystal and frequency, which I purchased from LapTech Precision Inc.They require a minimum order quantity of 25 pcs.
The price is 47.90 USD per piece.I said it was too much for me and then they told me that I could order 5 pieces, but at a higher price, which is $ 120 per piece.
But one thing surprised me quite a bit. I was looking for a well polished crystal in the specifications. I quote their answer about it: "We also recommend a etched finish, not a polished finish, which is non-standard and
will cost very high". ??? In the end, chose LapTech Inc. as a much more acceptable solution for me with the assistance of Andrea's good feedback after the previous GB .Also,lead time 12-14 weeks.( Laptech 6-8 weeks ).
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Andrea,
How you getting on with the x2 frequency multipliers?
I've been working on a ~50MHz doubler (100MHz output) and am struggling with cycle to cycle jitter as a result of unsymmetrical input (not exactly 50% duty cycle).
While this cycle to cycle "jitter" might not impact the close-in phase noise, It does impact the edge jitter results - even on an analogue scope on its fastest sweep I can see two discrete edges spaced apart by about 50ps or so.........
I would have considered a 50ps duty cycle summitry "error" at 50MHz as quite decent - I wonder if / how you have resolved this?
In the end I have given up on the typical RF x2 multiplier based on balum / schottky diode bridge... not only due to the issue with summitry, but the attenuation in the circuit requires extra gain which impacts the close in phase noise.
My solution is a XOR edge doubler (adjusted for best duty cycle), this then resonates an LC tuned circuit, with a Crystal based "filter" on the output.
Due to the "limited" Q of the output filter circuit, the Close in noise is determined by the 50MHz frequency source (the AC logic XOR operating at 5V give very decent close in noise)... actually the output "filter circuit" is nothing more then an injection locked oscillator with its close in phase noise being determined by the 50MHz XO...
How you getting on with the x2 frequency multipliers?
I've been working on a ~50MHz doubler (100MHz output) and am struggling with cycle to cycle jitter as a result of unsymmetrical input (not exactly 50% duty cycle).
While this cycle to cycle "jitter" might not impact the close-in phase noise, It does impact the edge jitter results - even on an analogue scope on its fastest sweep I can see two discrete edges spaced apart by about 50ps or so.........
I would have considered a 50ps duty cycle summitry "error" at 50MHz as quite decent - I wonder if / how you have resolved this?
In the end I have given up on the typical RF x2 multiplier based on balum / schottky diode bridge... not only due to the issue with summitry, but the attenuation in the circuit requires extra gain which impacts the close in phase noise.
My solution is a XOR edge doubler (adjusted for best duty cycle), this then resonates an LC tuned circuit, with a Crystal based "filter" on the output.
Due to the "limited" Q of the output filter circuit, the Close in noise is determined by the 50MHz frequency source (the AC logic XOR operating at 5V give very decent close in noise)... actually the output "filter circuit" is nothing more then an injection locked oscillator with its close in phase noise being determined by the 50MHz XO...
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