Thought maybe I should say a bit more about what would seem to be involved in a layout sketch and the purpose of it.
If you think about it, that picture I recently posted of a resistor and cap soldered to two socket pins, along with some decoupling caps, comes pretty close to what would need to be sketched out for the I/V opamps.
Does't have to be great art, just enough to see there where the parts and wires connect and are located physically on the board.
That mainly leaves the RC filtering between the I/V outputs and differential summing inputs, then the differential summing part to figure out. There needs to be enough space between the IC sockets to allow for mounting all the components that need to go in that space.
A hole or a few holes on the PCB may need to be reserved as a interconnection node(s) for some of the components that can't have both leads soldered to IC socket pins. So, those need to be shown as connect points for parts and wires and noted as not be covered with ground plane.
It's not hard. It is mostly looking at the schematic, looking at the sizes of the components in the pictures and counting holes on the board to figure out what the spacing between hole nodes and sockets, etc., needs to be.
That way the sockets can be mounted first, then components can be soldered that would go closest to the board, maybe decoupling caps and some wires.
Stuff that might need to go on later or stick up more can be planned for soldering after the lowest layer of components and wires goes in. All ground plane seams that need soldering can be soldered up before they are blocked from access by components. No getting stuck or running out of space that way, hopefully. Those are the kind of things the exercise is for, at least those are the the type of things that come to mind now. Maybe more while I am doing it. Having those things fresh in mind before starting should help.
Or, I guess, my pictures should work too. But, I mean for the next time you want to do one. Practice is good. Like doing homework for school, not that everyone always likes doing homework. But, usually better test results if it was done
If you think about it, that picture I recently posted of a resistor and cap soldered to two socket pins, along with some decoupling caps, comes pretty close to what would need to be sketched out for the I/V opamps.
Does't have to be great art, just enough to see there where the parts and wires connect and are located physically on the board.
That mainly leaves the RC filtering between the I/V outputs and differential summing inputs, then the differential summing part to figure out. There needs to be enough space between the IC sockets to allow for mounting all the components that need to go in that space.
A hole or a few holes on the PCB may need to be reserved as a interconnection node(s) for some of the components that can't have both leads soldered to IC socket pins. So, those need to be shown as connect points for parts and wires and noted as not be covered with ground plane.
It's not hard. It is mostly looking at the schematic, looking at the sizes of the components in the pictures and counting holes on the board to figure out what the spacing between hole nodes and sockets, etc., needs to be.
That way the sockets can be mounted first, then components can be soldered that would go closest to the board, maybe decoupling caps and some wires.
Stuff that might need to go on later or stick up more can be planned for soldering after the lowest layer of components and wires goes in. All ground plane seams that need soldering can be soldered up before they are blocked from access by components. No getting stuck or running out of space that way, hopefully. Those are the kind of things the exercise is for, at least those are the the type of things that come to mind now. Maybe more while I am doing it. Having those things fresh in mind before starting should help.
Or, I guess, my pictures should work too. But, I mean for the next time you want to do one. Practice is good. Like doing homework for school, not that everyone always likes doing homework. But, usually better test results if it was done
Lol... Mark, it would take me more than several days and even then I would be floundering about and less than enthusiastic to display here to the world of competent DIY'ers my sketch...
Let's just say I'm 100% confident and happy to make a complete and utter 'smurf' of it but humble enough to check before powering up...
oh.. and having studied Victors circuit I would do a p2p using a slab of un-etched board as groundplane... no through hole as no holes..!
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Deal ! Number 1 wifelet is out tomorrow evening... once I have the tribe fed watered and , hopefully, in the arms of Morpheus..I'll give it a go..
Thank you Mark! I have ordered several MSOP2DIP adapter pcb
The attached solution good for me? THX! D'
Attachments
Hi Deenoo,
The schematic drawing you attached is correct. However, Cout, the 10uf capacitor on the right needs to be a special type of cap. Not sure if you found a part number for that yet?
Also, the LTC6655 circuit you show is only a 3.3v reference. For AVCC you also need the rest of the AVCC circuit as recommended by ESS. Do you have the opamp schematic for that?
The schematic drawing you attached is correct. However, Cout, the 10uf capacitor on the right needs to be a special type of cap. Not sure if you found a part number for that yet?
Also, the LTC6655 circuit you show is only a 3.3v reference. For AVCC you also need the rest of the AVCC circuit as recommended by ESS. Do you have the opamp schematic for that?
I think the Cout cap to be polymer, because it has very low ESR.
I made it the ESS recomended AVCC with LME 49720+3042 ref., but I want it to change ref to LTC6655.
Paper work first
For the documentaion of the i/v mod, first I like to do the paper work. The BOM is now on a excel sheet with quantity and price in CHF witch is close to the USD. Can anyone check the amount of the items per position?
By the diagrams I'm a little confused, because there is the recommandation of sabre and the diagramm by Mark. Wich way should I go and what is the value of the input cap?
I need help for the next step.
Thanx
For the documentaion of the i/v mod, first I like to do the paper work. The BOM is now on a excel sheet with quantity and price in CHF witch is close to the USD. Can anyone check the amount of the items per position?
By the diagrams I'm a little confused, because there is the recommandation of sabre and the diagramm by Mark. Wich way should I go and what is the value of the input cap?
I need help for the next step.
Thanx
@bih,
The schematic you have from ESS was for an earlier dac, maybe ES9008 or ES9018. We don't want to use that one. I suggest to use the one you have described as the 'Forum' schematic.
Regarding component values, the resistor values on the 'forum' schematic are good, those should not change.
The capacitor values on the 'forum' schematic should be correct with the following considerations: The I/V cap labeled as 1700pf on the 'forum' schematic might be bigger than optimal for that position. I ordered a 330pf and a 1500pf to try there. I will try the 330pf first. The reason I am unsure about the value for that cap is because there are some things we don't know about the ES9038Q2M dac chip. We don't know to what frequency it needs a good virtual ground, and if the cap is too big it might make a better filter, but it might cause more distortion out of the dac of the virtual offset ground is not maintained up to a higher frequency.
The other cap I might adjust the value of would be the output capacitor labeled 6.8nf. That should be about right by calculation, but it is one that could be adjusted a little, bigger or smaller, depending on how the dac sounds.
All capacitors shown on the schematic should be C0G or NPO dielectric.
Resistors are metal film, 0.1% tolerance. We are using tight tolerance to help null out common mode noise and distortion from the dac outputs.
Opamp decoupling caps are not shown on the schematic, but should be .1uf X7R ceramic, and 10uf tantalum in parallel at each power pin.
The other thing not shown on the schematic is the +1.65v AVCC/2 coming from the AVCC circuit. We show an input node for it but nothing else. We could put another filter on that signal if it picks up any noise along the way as it comes from the AVCC circuit. Hopefully that will not be a problem, but we don't know yet because we haven't finished figuring out how we will implement the through hole component AVCC power supply.
The schematic you have from ESS was for an earlier dac, maybe ES9008 or ES9018. We don't want to use that one. I suggest to use the one you have described as the 'Forum' schematic.
Regarding component values, the resistor values on the 'forum' schematic are good, those should not change.
The capacitor values on the 'forum' schematic should be correct with the following considerations: The I/V cap labeled as 1700pf on the 'forum' schematic might be bigger than optimal for that position. I ordered a 330pf and a 1500pf to try there. I will try the 330pf first. The reason I am unsure about the value for that cap is because there are some things we don't know about the ES9038Q2M dac chip. We don't know to what frequency it needs a good virtual ground, and if the cap is too big it might make a better filter, but it might cause more distortion out of the dac of the virtual offset ground is not maintained up to a higher frequency.
The other cap I might adjust the value of would be the output capacitor labeled 6.8nf. That should be about right by calculation, but it is one that could be adjusted a little, bigger or smaller, depending on how the dac sounds.
All capacitors shown on the schematic should be C0G or NPO dielectric.
Resistors are metal film, 0.1% tolerance. We are using tight tolerance to help null out common mode noise and distortion from the dac outputs.
Opamp decoupling caps are not shown on the schematic, but should be .1uf X7R ceramic, and 10uf tantalum in parallel at each power pin.
The other thing not shown on the schematic is the +1.65v AVCC/2 coming from the AVCC circuit. We show an input node for it but nothing else. We could put another filter on that signal if it picks up any noise along the way as it comes from the AVCC circuit. Hopefully that will not be a problem, but we don't know yet because we haven't finished figuring out how we will implement the through hole component AVCC power supply.
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Turns out it took me a little longer than I expected to figure out how I wanted to do a layout, maybe a couple of hours. Strange when you see diagram because it looks so simple. Yet, it took some time to decide short and wide, long and thin, lay resistors and caps down flat against board, make them into a pyramid (or tepee), or whatever else.
Ended up making some nodes that weren't at socket pins. They can be up in the air only supported by the components coming together where they are soldered, or they can be stabilized more by soldering them to a hole in the board. That part I will leave up to the builder to decide, but the layout is quite simple which is exactly how I like them to look.
I didn't fill out the decoupling caps and power entry in full detail (some of which is on the top of the board), but I left space for the parts. Just trying to make the signal wiring look less cluttered up by non-signal-related details.
Anyway, this is the type of thing I would do for myself. There are not rules about exactly how to do it or how to show parts. I personally don't usually draw parts is much detail, sometimes abbreviating them with schematic symbols. But, it is still clear the sketch is meant to be mechanical.
No top, side, and end views required. The wiring is mostly on the bottom so that is what I show. Other than at sockets, connectors, and where nodes come together at non-socket pin locations, ground plane should be everywhere including between the rows of socket pins.
I could wait and post it after other people have taken at try at it, or I could zip or rar it into a compressed folder that people can open and look at it or not, as they prefer.
Anyone have a preference?
Ended up making some nodes that weren't at socket pins. They can be up in the air only supported by the components coming together where they are soldered, or they can be stabilized more by soldering them to a hole in the board. That part I will leave up to the builder to decide, but the layout is quite simple which is exactly how I like them to look.
I didn't fill out the decoupling caps and power entry in full detail (some of which is on the top of the board), but I left space for the parts. Just trying to make the signal wiring look less cluttered up by non-signal-related details.
Anyway, this is the type of thing I would do for myself. There are not rules about exactly how to do it or how to show parts. I personally don't usually draw parts is much detail, sometimes abbreviating them with schematic symbols. But, it is still clear the sketch is meant to be mechanical.
No top, side, and end views required. The wiring is mostly on the bottom so that is what I show. Other than at sockets, connectors, and where nodes come together at non-socket pin locations, ground plane should be everywhere including between the rows of socket pins.
I could wait and post it after other people have taken at try at it, or I could zip or rar it into a compressed folder that people can open and look at it or not, as they prefer.
Anyone have a preference?
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Looking at that drawing again I can see I should have moved that bottom opamp socket down so as to show a little more space between it and the next socket above and to the right. In comparison, the upper opamp socket seems to be spaced about right in relation to the opamp socket below it and to the right.
EDIT: Actually, in a departure from my normal practice, I used every other grid intersection on the graph paper to represent a hole in the perfboard. That being the case, the lower opamp socket can't be exactly where I showed it in the drawing as there are no holes for it right there. Oops.
EDIT: Actually, in a departure from my normal practice, I used every other grid intersection on the graph paper to represent a hole in the perfboard. That being the case, the lower opamp socket can't be exactly where I showed it in the drawing as there are no holes for it right there. Oops.
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Hi Deenoo,
Good to hear you have ESS recommended part already done.
May I ask if you think you might by chance be willing to post some pictures of your modded board as it is now or maybe after you install the LTC6655 so we can see your approach to laying out the circuitry? I think readers are usually interested to see how other members do such things.
Hi Mark, i found this two AVCC buffers, so the "basic " firs one one would be enough to feed both AVCC L and R. Basic question: would be better to use two separate independent power supplies 3,3Vfor example from LT3042 3.3V and then after it use two avcc buffers one for each avvc channel ? i assume that using two separate supplies (combination 3042+opamp buffers) would cause more improving in SQ then one united power supply 3.3V + LTC6655+buffer opamp for both avcc ?
Thanks
Attachments
@Blackfear,
The correct AVCC circuit information is shown below. Both schematics are the same, except the second one also shows the AVCC/2 voltage divider and filter cap Vref signal that is needed by the output stage (it is labeled 'offset' in this schematic) .
There needs to be two AVCC opamp circuits, one for the left channel, and one for right. There will also be two AVCC/2 reference voltages. One dual opamp is enough to make both AVCC circuits.
Also, please note the text information on one of the pictures below. That is good information regarding AVCC and output stage component selection.
An LTC6655 reference if used requires only one which would be shared by the AVCC circuits for both dac channels. The LTC6655 would replace the connection on the left side of the first schematic labeled 3.3v DVCC.
The correct AVCC circuit information is shown below. Both schematics are the same, except the second one also shows the AVCC/2 voltage divider and filter cap Vref signal that is needed by the output stage (it is labeled 'offset' in this schematic) .
There needs to be two AVCC opamp circuits, one for the left channel, and one for right. There will also be two AVCC/2 reference voltages. One dual opamp is enough to make both AVCC circuits.
Also, please note the text information on one of the pictures below. That is good information regarding AVCC and output stage component selection.
An LTC6655 reference if used requires only one which would be shared by the AVCC circuits for both dac channels. The LTC6655 would replace the connection on the left side of the first schematic labeled 3.3v DVCC.
Attachments
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Guess I could a little later. Or someone else who understands it could. If someone beats me to it that would be great, then I could double check to verify everything is good. Not much to it actually.
Will will also be needing through hole component layout and board mechanical attachment to dac board plans.
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