Yet.
I checked in with Linear Systems last spring and they were running test batches for the P-ch devices at that time. They were experiencing some sort of a yield problem (unspecified), but they're well aware of the pent-up demand for matched N & P-ch dual JFETs. They intend to meet it ASAP.
Grey
I checked in with Linear Systems last spring and they were running test batches for the P-ch devices at that time. They were experiencing some sort of a yield problem (unspecified), but they're well aware of the pent-up demand for matched N & P-ch dual JFETs. They intend to meet it ASAP.
Grey
Don't worry about the fets, just get the Idss close and everything will follow. How do you think that we made the first series, before complementary jfets were even available?
This jfet input stage tends to adjust out differences. Of course there can be some residual offset, but that is manually adjusted out in the original design, after warm up. There is no DC stage gain IN THE ORIGINAL DESIGN so it does not further amplifiy the input offset.
When enthusiastic 'fellow designers' modify and remove these initial considerations, then they get into trouble and start complaining. However, they do it to themselves, the circuit will take care of itself, if left in its original form, in spirit, at least.
This jfet input stage tends to adjust out differences. Of course there can be some residual offset, but that is manually adjusted out in the original design, after warm up. There is no DC stage gain IN THE ORIGINAL DESIGN so it does not further amplifiy the input offset.
When enthusiastic 'fellow designers' modify and remove these initial considerations, then they get into trouble and start complaining. However, they do it to themselves, the circuit will take care of itself, if left in its original form, in spirit, at least.
This DC offset setting circuit (pot + 2 resistors + filter cap) was not any important for simulations, so replaced by battery and then omitted completely. Anyone can feel free to put it back. I assumed potential builders would think it over.
Anyway, the DC stability would not be great even with this circuit, that is why original design has input capacitor (wise), though it is against author's philosophy.
Anyway, the DC stability would not be great even with this circuit, that is why original design has input capacitor (wise), though it is against author's philosophy.
The 1O UF polypropylene, polystryene, polycarbonate cap was added 1/3 of a century ago, and we were only just learning about capacitors. I used polycarbonate coupling caps with the Levinson JC-2 preamp. Why would we NOT have a coupling cap in this amp?
Also, the very FIRST example of this design was used as a tweeter amp, so the coupling cap was much smaller, perhaps as small as .1 uF
Later designs, past 1977, I started to use servos, but this design did not, as it was made between 1974 to 1976.
Actually, with modern matched fet pairs, (like I would use) the cap really isn't necessary. It is just to keep amateur diyers from getting into trouble, like they are here, even in simulation.
Also, the very FIRST example of this design was used as a tweeter amp, so the coupling cap was much smaller, perhaps as small as .1 uF
Later designs, past 1977, I started to use servos, but this design did not, as it was made between 1974 to 1976.
Actually, with modern matched fet pairs, (like I would use) the cap really isn't necessary. It is just to keep amateur diyers from getting into trouble, like they are here, even in simulation.
I didn't make a big deal out of the offset compensation being left out of the SIMULATION. Only the 'hand-wringing' of the people who don't think that the amp will work with real world devices. The catch resistor is a good idea, why did you not recommend it from the first? Perhaps you did, and I missed it.