No, you are absolutely correct. For a given circuit topology, ULGF, loop gain in the audio band (especially at higher frequencies), and stability margins are all inextricably linked.
The only thing you can do to substantially increase loop gain at higher audio frequencies is to increase the order of your compensation (e.g. go from "standard" miller to two-pole or TMC, or from two-pole to nested loops etc. etc.) See Hypex's Ncore amplifier for an amplifier with a fifth-order (!) control loop.
Here a new OLG plot. I've been able to create around 60 degrees phase margin, a gain of 40 degrees compared to the OLG plot atop this pageUnfortunately I had to sacrifice THD for it.
The changes were an increase of the LTP degens a big deal, and a snubber network.
Is C3 not a compensation capacitor?
BTW, if it is, you need to measure the loop gain of its loop, too.
Last edited:
Finally, a voice of sanity! Minimum phase circuit, that is
.Not necessary a matter of topology only though, but of the open loop unity gain frequency (note: this is not the ULGF) and the distribution of the high frequency residual poles. However, from a certain frequency and up, these poles are more and more controlled by the circuit parasitics - this is the next limitation after the active devices Ft.
Last edited:
Good point. Yes my original statement did inherently assume that the topology has been optimised in terms of device selection in order to push high-frequency singularities as far up in frequency as possible.
I see the inaccuracy of my statement above. In my mind I had assumed a given order of compensation. Worryingly waly's post makes logical sense to me. Must be learning something.
The devices are optimized as far as I could. I guess I could swap in small signal transistors with a higher Ft. But what I did was to replace the BC550/BC560's with ideal NPN/PNPs that don't have evil Cob.
The VAS mirrors are not responsible for the additional phase shift around 100MHz. The ones that do slightly are the ones that make up the gain block. Using ideal trannies made the pole be pushed higher up slightly but not much. This lead me to conclude that I can't do anything about phase through transistor device selection.
I've tried TPC and the likes but they don't seem to work on my circuit, most likely because my circuit doesn't have one big dominant pole, but many small HF poles all pushed up together at the end of transistor Ft capabilities.
I could try adding yet another HF feedback, directly from the VAS output to the input (output stage exclusive) and see what it does.
PS This is annoying Having this much gain left and not be able to do anything with it
The VAS mirrors are not responsible for the additional phase shift around 100MHz. The ones that do slightly are the ones that make up the gain block. Using ideal trannies made the pole be pushed higher up slightly but not much. This lead me to conclude that I can't do anything about phase through transistor device selection.
I've tried TPC and the likes but they don't seem to work on my circuit, most likely because my circuit doesn't have one big dominant pole, but many small HF poles all pushed up together at the end of transistor Ft capabilities.
I could try adding yet another HF feedback, directly from the VAS output to the input (output stage exclusive) and see what it does.
PS This is annoying
Having this much gain left and not be able to do anything with it
Last edited:
This sucks. If I add just one single compensation cap, from the VAS output directly to the VAS input, the OLG phase won't go past 90 degrees untill after unity gain. Stable as a rock no?
Then I looked at the THD numbers. Now that was a dramatic increase in distortion (0.001418%). I effectively excluded the output stage from the VAS feedback.
It's all about trade-offs.
Then I looked at the THD numbers. Now that was a dramatic increase in distortion (0.001418%). I effectively excluded the output stage from the VAS feedback.
It's all about trade-offs.
Yeah I tried many to no avail, I most of the time ended up with a 180 degrees phase before gain would be 0.
But something else, how stable it really needs to be in practice? While I got it stable at the limit with a pure C as load with 0 ESR, the compensation can be a whole lot less with an ESR of 10mOhm or 50mOhm for even less requirement to compensate.
That way I could preserve a good deal of THD rather than making it stable for a world with pure capacitive loads without any R
But something else, how stable it really needs to be in practice? While I got it stable at the limit with a pure C as load with 0 ESR, the compensation can be a whole lot less with an ESR of 10mOhm or 50mOhm for even less requirement to compensate.
That way I could preserve a good deal of THD rather than making it stable for a world with pure capacitive loads without any R
Why to go after complicated VAS if the main distortion is in the OPS.
Here is my amp with simple beta enhanced VAS and THD20k is below 1ppm(0.000082%) at 80W/8ohm. Even Hawskford enhaced cascoded VAS shows similar distortion.
Phase margin is 60 degree and gain margin is 11 dB.
http://www.diyaudio.com/forums/solid-state/182554-thermaltrak-tmc-amp-15.html#post3065943
BR Damir
Here is my amp with simple beta enhanced VAS and THD20k is below 1ppm(0.000082%) at 80W/8ohm. Even Hawskford enhaced cascoded VAS shows similar distortion.
Phase margin is 60 degree and gain margin is 11 dB.
http://www.diyaudio.com/forums/solid-state/182554-thermaltrak-tmc-amp-15.html#post3065943
BR Damir
Yeah the OPS is the culprit, it showed by either including or excluding the OPS. When the OPS is included with a less than optimal phase margin, THD is similar at 200W/8ohm.
What would you suggest is the main contributor to your low THD, when I don't see you include the OPS in the miller feedback loop?
What would you suggest is the main contributor to your low THD, when I don't see you include the OPS in the miller feedback loop?
You are chasing a ghost. You won't be able to reach 0.0001% distortions with Miller compensation. Harry explained well as of why.
Let me put it this way: the open loop OPS has, say, 0.1% distortions at max power and 60KHz (where the crossover distortion, 20KHz 3rd harmonic, is located). That's a very optimistic number, but to bring that to 0.0001%, you would still need 60dB of loop gain @60KHz. As in a Miller compensated amplifier the loop gain falls at 20dB/decade, the ULGF of your amp needs to be 60MHz. Try to do that with the current bipolar power output devices having Ft=30MHz. Not to mention that 60MHz is already way to high for any practical implementation (think of the circuit physical size and the inductive parasitics involved).
Using power mosfets in the output stage could theoretically let you reach that ULGF, however, a mosfet output stage handling the same power levels will always have much more that 0.1% open loop distortions. Reason is the large Cgd and the lower transconductance, compared to power bipolars.
What you are left with is either a high order frequency compensation (minimum 3, I would say) method, or simply class A.
Last edited:
Harry, no; C3 was part of a snubber that's now gone again.
You really got me into something with that OLG plot of yours
It's just I never knew how to pull one from Multisim, but now that I can easily it's fun playing with modifications and see what it does to OLG.
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.