Wonderful Zoran, this is precisely the sort of help I need.
I have redrawn my schematic accordingly, assuming I will be using a WM8805 receiver outputting left justified format data.
I haven't added any resistors between the ICs other than the two banks on the AD768's inputs, do I need to add more? I guess it's time I got a 'scope...
Now I'm wondering about oversampling, I have some AD1896 chips, so I could build an oversampling board and try the setup with and without oversampling.
I note in the datasheet that you daisychain the AD1896 so that instead of just the 8x OS of one a chip, you can also achieve 64x, 512x and 4096x.
I'm not sure what is the maximum frequency the AD768 can handle as I'm not certain how to read it's datasheet, but it would need to handle nearly 3mkz to achieve 64x OS and over 20mhz to achieve 512x OS. 4096x would be 180mhz which sounds rather outlandish to me.
44.1 x 8 = 352.8 (353khz)
352.8 x 8 = 2822.4 (2.8 mhz)
2822.4 x 8 = 22579.2 (22.6mhz)
22579.2 x 8 = 180633.6 (180mhz)
I have redrawn my schematic accordingly, assuming I will be using a WM8805 receiver outputting left justified format data.
I haven't added any resistors between the ICs other than the two banks on the AD768's inputs, do I need to add more? I guess it's time I got a 'scope...
Now I'm wondering about oversampling, I have some AD1896 chips, so I could build an oversampling board and try the setup with and without oversampling.
I note in the datasheet that you daisychain the AD1896 so that instead of just the 8x OS of one a chip, you can also achieve 64x, 512x and 4096x.
I'm not sure what is the maximum frequency the AD768 can handle as I'm not certain how to read it's datasheet, but it would need to handle nearly 3mkz to achieve 64x OS and over 20mhz to achieve 512x OS. 4096x would be 180mhz which sounds rather outlandish to me.
44.1 x 8 = 352.8 (353khz)
352.8 x 8 = 2822.4 (2.8 mhz)
2822.4 x 8 = 22579.2 (22.6mhz)
22579.2 x 8 = 180633.6 (180mhz)
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That was not a good idea. rfbrw is one of the wisest members here but he is a little behind the times. He still thinks DIY means Do It Yourself and he was providing hints so you could find the answers for yourself and learn something in the process.
Perhaps the forum should be renamed difmAudio (Do It For Me) because that's the way is seems to work these days. Nobody reads datasheets and they demand someone else immediately provides answers for every question.
Ian says he's not sure what the maximum frequency the AD768 is as he's not certain how to read the datasheet.That's funny because the max sample rate is right there, in big block letters, on the title page of the data sheet. And it appears numerous times throughout the document. Like all good diyAudiophools, Ian has DSP (Data Sheet Phobia.)
I object to being called a fool who doesn't read datasheets because I've spent the last few weeks reading literally hundreds of datasheets plus a lot of other material, trying to educate myself. I'm still not able to interpret the data in datasheets fully, hence I am not entirely clear on how the 30 MSPS sampling rate of the AD768 relates to a frequency in Hertz. If I remember the Nyquist rule correctly, it requires two samples to reproduce a waveform without aliasing, therefore the sample rate must be twice the frequency to accurately reproduce a signal.
Does that mean that 30 MSPS equates to 15Mhz (30 million divided by 2) or is it more complex than that?
Anyways, I've been too tired to do much today, which includes reading and thinking. I'm battling a leg infection and not feeling too great, hence the limited energy for work today.
Does that mean that 30 MSPS equates to 15Mhz (30 million divided by 2) or is it more complex than that?
Anyways, I've been too tired to do much today, which includes reading and thinking. I'm battling a leg infection and not feeling too great, hence the limited energy for work today.
Hi Ian
The point for paralel from serial when 32bit word is present is to have 32 bit shift register. 4 x 8bit. Does not matter the fact that You will use only 16bits from 2 x 8bit shift register. Because of the position of MSB - it is in the 4th IC from data input...
...
Other way is complicated, include interventin in WCLK line, Making "window" of 16bits, and "shorten" all WCLK periods introducing a jetter and adding maybe more ICs into the circuit.
I am pretty sure that for test more friendly will be DIP packages for seral to parallel interfce because it is much easyer to solder and the space will be smaller against the same but with SMD adopters?
164 i used horizontaly positioned, and 595 verticaly.
I will post picture and then will be more clear...
.
I think that max SCK F is not major thing at this moment? From the importance is set device in operation?
These interfaces (in diskrete DACs) I tested with max 384KHz SR and they working well. Even faster exchnging SR up or down without any pause. Faster than integrated DAC in the chip.
.
(To compare the max SR from data speed, TDA1540 have 12MBit limit and without anu issue going to 384KHz SR)
cheers
164 i used horizontaly positioned, and 595 verticaly.
I will post picture and then will be more clear...
.
I think that max SCK F is not major thing at this moment? From the importance is set device in operation?
These interfaces (in diskrete DACs) I tested with max 384KHz SR and they working well. Even faster exchnging SR up or down without any pause. Faster than integrated DAC in the chip.
.
(To compare the max SR from data speed, TDA1540 have 12MBit limit and without anu issue going to 384KHz SR)
cheers
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Yes, I regretted buying the 595 modules the moment you explained that I would need more than two - the modules take up more than twice the space as a DIP version, so I shall have to buy some DIP versions and put the modules in my box for future use.
Again, yes, you are exactly right, just getting the device working is the goal, simply going from WM8805 to DAC using left justified data. Adding any further steps such as sample rate conversion can come later, or not at all, I only mentioned it as an aside, not something to be concerned about right now.
Again, yes, you are exactly right, just getting the device working is the goal, simply going from WM8805 to DAC using left justified data. Adding any further steps such as sample rate conversion can come later, or not at all, I only mentioned it as an aside, not something to be concerned about right now.
If that's true, why did you specify the ADR02 and OP97 as apparent voltage regulators? You show the gates of the HC04 wired backwards and you show series capacitors in ground connections. There's more but why should I waste my time. You obviously don't care. You just post something and hope someone will tell you how to fix it.
The AD1896 will have a maximum output frequency though so 4096X OS is only going to work for very low input frequencies, below full audio bandwidth. Which I take to be @rfbrw's point.
The typical maximum update rate is 40MSPs (i.e. 40MHz clock) but only 30MHz is guaranteed. But no matter how many AD1896s you daisy chain you'll not get anywhere near that figure because of what I've said above.
To get beyond 8X OS probably you'll need either an FPGA or a fast MCU. For the latter there is a Cortex M7 now at 1GHz clock - that might be fast enough to max out this DAC
Get it working NOS first though.Yeah, I have bigger problems to overcome before even beginning to think about up/over/re sampling.
I seem to have made another ****-up by only just now realising that the ADR02 is only good for 10mA, so while it is very accurate and low noise, it isn't going to work to provide the power supply voltages. I shall have to have a good think about how to fix this problem as just sticking in some good old 7805s instead doesn't seem the best idea. Maybe there is a circuit I can build that uses the ADR02 and a transistor to deliver 5v with rather more current than 10mA.
I seem to have made another ****-up by only just now realising that the ADR02 is only good for 10mA, so while it is very accurate and low noise, it isn't going to work to provide the power supply voltages. I shall have to have a good think about how to fix this problem as just sticking in some good old 7805s instead doesn't seem the best idea. Maybe there is a circuit I can build that uses the ADR02 and a transistor to deliver 5v with rather more current than 10mA.