what regards LT3042 reference vibration sensitivity, we had discussed of that already:
https://www.diyaudio.com/community/...ystal-oscillator.261651/page-194#post-6686923
https://www.diyaudio.com/community/...ystal-oscillator.261651/page-194#post-6686923
I made still some further tests. First I changed the Cset capacitor to 10uF/50V X7R. This has over 80% capacitance left at 5V.
Here is the same measurement as earlier. Not much improvement to X5R.
Then I wrapped the dac board with speaker polywool and placed it within a steel kettle.
Clear improvement. About as good as tantalum polymer.
So piezoelectric microphony is a very probable cause. And it seems that Class II capacitors can be used in LT3042 Cset provided that proper shock mounting or noise damping is implemented.
Anyhow IMO all this just proves that Vref implementation is very critical for DS dacs. Even small imperfections can easily overshadow the potential benefits from low close-in phase noise clocks.
Here is the same measurement as earlier. Not much improvement to X5R.
Then I wrapped the dac board with speaker polywool and placed it within a steel kettle.
Clear improvement. About as good as tantalum polymer.
So piezoelectric microphony is a very probable cause. And it seems that Class II capacitors can be used in LT3042 Cset provided that proper shock mounting or noise damping is implemented.
Anyhow IMO all this just proves that Vref implementation is very critical for DS dacs. Even small imperfections can easily overshadow the potential benefits from low close-in phase noise clocks.
Maybe that also explains why PPS caps sound better than X7R for clock oscillator module bypass, such as for Crystek 957?
I would not draw any conclusions about possible audibility from my measurements without proper listening tests. The noise levels seem to be well below generally accepted hearing threshold. And as Peufeu noted this phenomen is mostly related to high impedance nodes.
Regarding listening tests, all these things need to be fixed at once for good audibility. Otherwise an unfixed problem can mask improvement of a fixed problem.
Also, there is a bit more to using PPS bypass for oscillator modules. diyiggy noted an improvement when the clock and bypass were isolated from the voltage regulator by a bit of inductance. Independently did the same here. Seems to help isolate the clock from voltage regulator X7R output caps (if C-II is used for that purpose).
EDIT: BTW we haven't gotten to taking a look at ferrite bead hysteresis noise yet.
Also, there is a bit more to using PPS bypass for oscillator modules. diyiggy noted an improvement when the clock and bypass were isolated from the voltage regulator by a bit of inductance. Independently did the same here. Seems to help isolate the clock from voltage regulator X7R output caps (if C-II is used for that purpose).
EDIT: BTW we haven't gotten to taking a look at ferrite bead hysteresis noise yet.
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You can always tap the board with a finger while looking at the regulator output with a scope...
Yes, that's exactly it. If VREF is microphonic, in a quiet lab you'll get noise skirts. If you play music next to it though, it'll pick it up and distort the signal.
That will also stop air drafts so it will remove temperature-dependent drifts (ceramic caps have pretty large tempco). If a cap connected to a high impedance node changes its capacitance value due to whatever cause, conservation of charge applies. So the cap still has the same charge, but a different capacitance value. Q=CV, so this results in a voltage on the node being decoupled. It should be small, because X7R's tempco is designed to null around 25°C, and it will be very low frequency, so probably not what's happening here. Piezo is the most likely explanation, but that can also come from thermal expansion of the whole board under the influence of random air drafts, that will stress and squeeze the cap too... Anyway, after observing the effect of tapping the board on output voltage, I'd recommend blowing some air on it. A while ago I measured a bunch of cheap clocks for jitter, and a makeup remover cotton disk stuck on it to neutralize air currents made a significant difference in frequency stability...
It's the same with Groner's preamp, there is a big film cap with DC bias at the input. Mine is very microphonic, so if someone walks in the room, it shows up on the scope!
I've noticed aluminium polymer caps have quite high leakage, sometimes up to mA. No good for decoupling high impedance nodes like references, and leakage depends on temperature, so it also introduces drift. I don't know if this is the case for tantalum polymers, though, so just hand waving here. Personally I'd use good quality electrolytic like Panasonic FR, I never noticed microphony from these, and leakage is very low.
I don't believe that. On a low impedance node like a power supply, the regulator will absorb any microphonic current from the cap. I'd rather bet on the cap having different inductance, ESR and value, and shifting around the resonance peaks with the cap inside the crystek. Or maybe it changes how much HF noise gets in, or how much clock leaks out. You could scope the clock's 3V3 with a X10 probe, tiny ground clip, and check for ringing. A power supply should not ring. If it does, a small resistor in series with the decoupling cap could tame it, but it has to be mounted with very low inductance (is, replace a SMD 0805 cap with a 0603 cap and 0802 resistor in series)...
Not so sure that's exactly the case. The regulator can attenuate output voltage variations, but not completely. Also IIRC LT3042 datasheet says larger output caps can improve transient response at the expense of reduced regulator bandwidth. If a cap improves transient response, then not all it is doing is being instantly 'absorbed' by the regulator.
In any case, diyiggy was right about Crystek bypass caps. Works for clock buffer chips too. Something is going on there whatever it is.
According to this source the DC leakage of tantalum polymers, aluminium polymers and electrolytics are similar. The tantalum polymers I'm using have max DC leakage of about 50-70uA according to datasheets.
Piezo effect creates a current, so the resulting voltage is proportional to node impedance. Suppose 33mOhm output impedance for the reg, and 33k resistor on VSET pin, that's a factor of 1 million worse for the cap on the VSET pin
The output impedance of the reg will increase at high frequency though, so if the board is vibrating at 1MHz, then perhaps.
MLCCs act both as piezo loudspeakers and microphones, so could signal couple between two unrelated parts of the board this way? That would be an interesting experiment to try! Perhaps an argument for soft termination caps...
My experience with polymers is most will have little leakage, but once in a while there's one which is barely within spec. So if you rely on it being much better than spec, then once in a while the board won't work. Plain electrolytics usually spec 0.01CV µA, so 33µF charged to 3V3 gives 1µA max.
If only someone stuck a scope probe in there...
From what I have seen the polymer capacitors typically have a max. leakage specification of around 10x the values for tantalum.
These are the caps diyiggy recommended: https://www.mouser.com/ProductDetail/Rubycon/16MU224MZ22012?qs=T3oQrply3y%2BM8bQWZCSUDw==
The caps are 805 size. I have put them on smaller pads for test by mounting the cap on its side, and by scraping a bit of solder mask off just beyond the existing ground pad so as to be able to solder that end of the cap a slightly off the pad (assuming there is surface fill in that area)
The caps are 805 size. I have put them on smaller pads for test by mounting the cap on its side, and by scraping a bit of solder mask off just beyond the existing ground pad so as to be able to solder that end of the cap a slightly off the pad (assuming there is surface fill in that area)
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That seems to be the case according to datasheets. A 22uF/16V tantalum (not polymer) has max DC leakage current of about 5uA. ESR is of course much higher. I'll need to try some of those.
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We haven't gotten to homogenizing listening tests yet. It's fool's errands to discuss listening test results when one does it with headphone while the other does it with speakers in a room or one does single blind test while the other dose double blind test. Testers need to be on the same page or there can't be any productive discussions. Lets get this cleared up first. What is your listening test setup detail?