Hehe, thanks.
When I say measurements are important, I don't mean that as direct predictable influence on how it will sound (although there's definitely a correlation).
What I mean is, if the circuit is supposed to do a thing, then there should be a measurement that shows how well it does the thing, so that it can be optimized to do the thing. The measurement that will work best for that is not necessarily one of the "industry standard" ones.
For example, since we're in this topic, I had a WM8805 and I noticed the subbu guys were spending months swapping capacitors and whatnot trying to make it sound better. ES9023 is supposed to remove jitter, but according to them, the WM8805 did "something" that the ES9023 did not remove, since tweaking the WM8805 did something to the sound. I assumed they were not crazy. Therefore:
I used one board with a USB2 micro and a WM8805 to output SPDIF, clocked by its own local canned oscillator. That WM8805 acted as master, so it generated LRCK, BCLK, slaving the micro that output the I2S.
Then I connected that SPDIF output to the input of another WM8805.
The job of that WM8805 was to read the SPDIF and extract the clock from it.
So I measured how well it did what it was supposed to do, by comparing the master clock from the SPDIF transmitter, with the recovered SPDIF clock of the SPDIF receiver. Using high-tech equipment known as "XOR gate" and a lowpass filter, it will output the phase shift between these two square waves as DC that will wobble according to the varying phase shift (ie, jitter) between these two. One can also look at the two square waves on the scope, while triggering on one.
Another simple measurement is to just feed the 44.1k wordclock into a soundcard capable of sampling at 192k and doing a FFT. That will give you phase noise on the wordclock, without phase noise from the DAC, so it has a lower noise floor. It requires tuning the soundcard for low jitter. By using a software detector, phase can be plotted directly across time, so what the oscillators do becomes quite visible. If LRCK from the SPDIF source and the SPDIF receiver are acquired on two separate channels at the same time, soundcard jitter can be removed.
Then I tried a 74HC divider to make a pseudo-wordclock from the MCLK and checked that with the soundcard, that's how I found out WM8805 generates different kinds of jitter on MCLK and LRCK... They should be synchronous, but they're not! lol
So that's how I found out there was no way to make the WM8805 crystal oscillator behave. No matter where I put the crystal, how I shielded it, it was always full of trash. But when the receiving WM8805 was fed from a canned XO instead of using a crystal, its output became squeaky clean.
So the result was a 50c tweak: one flop to divide the clean 50MHz ES9023 clock into 25MHz, which WM8805 accepts.
I did not do a listening test on that one.
When I say measurements are important, I don't mean that as direct predictable influence on how it will sound (although there's definitely a correlation).
What I mean is, if the circuit is supposed to do a thing, then there should be a measurement that shows how well it does the thing, so that it can be optimized to do the thing. The measurement that will work best for that is not necessarily one of the "industry standard" ones.
For example, since we're in this topic, I had a WM8805 and I noticed the subbu guys were spending months swapping capacitors and whatnot trying to make it sound better. ES9023 is supposed to remove jitter, but according to them, the WM8805 did "something" that the ES9023 did not remove, since tweaking the WM8805 did something to the sound. I assumed they were not crazy. Therefore:
I used one board with a USB2 micro and a WM8805 to output SPDIF, clocked by its own local canned oscillator. That WM8805 acted as master, so it generated LRCK, BCLK, slaving the micro that output the I2S.
Then I connected that SPDIF output to the input of another WM8805.
The job of that WM8805 was to read the SPDIF and extract the clock from it.
So I measured how well it did what it was supposed to do, by comparing the master clock from the SPDIF transmitter, with the recovered SPDIF clock of the SPDIF receiver. Using high-tech equipment known as "XOR gate" and a lowpass filter, it will output the phase shift between these two square waves as DC that will wobble according to the varying phase shift (ie, jitter) between these two. One can also look at the two square waves on the scope, while triggering on one.
Another simple measurement is to just feed the 44.1k wordclock into a soundcard capable of sampling at 192k and doing a FFT. That will give you phase noise on the wordclock, without phase noise from the DAC, so it has a lower noise floor. It requires tuning the soundcard for low jitter. By using a software detector, phase can be plotted directly across time, so what the oscillators do becomes quite visible. If LRCK from the SPDIF source and the SPDIF receiver are acquired on two separate channels at the same time, soundcard jitter can be removed.
Then I tried a 74HC divider to make a pseudo-wordclock from the MCLK and checked that with the soundcard, that's how I found out WM8805 generates different kinds of jitter on MCLK and LRCK... They should be synchronous, but they're not! lol
So that's how I found out there was no way to make the WM8805 crystal oscillator behave. No matter where I put the crystal, how I shielded it, it was always full of trash. But when the receiving WM8805 was fed from a canned XO instead of using a crystal, its output became squeaky clean.
So the result was a 50c tweak: one flop to divide the clean 50MHz ES9023 clock into 25MHz, which WM8805 accepts.
I did not do a listening test on that one.
So you tried an experiment and it turned out to work? Or was it that you deduced from measurements before trying it that a clock module would fix the problem?
How did you decide to try an external clock source for WM8805? Did you just decide to give it try? Did you have some particular reason that made you think it would probably help?
In other words, what was your state of mind in trying an external clock to fix the jitter problem? Just tried it to be thorough, or maybe you tried it because someone told you it would help? Maybe you simmed it and that suggested an external clock should help? What prompted you to try it?
In other words, what was your state of mind in trying an external clock to fix the jitter problem? Just tried it to be thorough, or maybe you tried it because someone told you it would help? Maybe you simmed it and that suggested an external clock should help? What prompted you to try it?
peufeu, for dummies please, what is the difference between canned xo and external crystal please. I do not understand the illustration.
About grounds, can we do without close islands rigth on some ic dac pins and vias to the gnd plane as we can need isolation rings (ring guard and split?) ? Sometimes I surmise you migth have no choice or meant you the top external layer should always be the ground and route signals with vias on the second layer. So hard to do it continuous, but as far the gnd impedance is well managed enough, it is maybe on a least importance?
Topology and measurements https://www.audialonline.com/blog/back-to-the-roots-14-bits-of-tda1541a/ but ok not delta sigma and not the same clock frequencies involved either.
About grounds, can we do without close islands rigth on some ic dac pins and vias to the gnd plane as we can need isolation rings (ring guard and split?) ? Sometimes I surmise you migth have no choice or meant you the top external layer should always be the ground and route signals with vias on the second layer. So hard to do it continuous, but as far the gnd impedance is well managed enough, it is maybe on a least importance?
Topology and measurements https://www.audialonline.com/blog/back-to-the-roots-14-bits-of-tda1541a/ but ok not delta sigma and not the same clock frequencies involved either.
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As a lurking dummy I can take a stab at that - there is an inverter inside the WM8805 which can be used as the foundation for a clock oscillator - see below.
As shown, the oscillator is composed of the crystal - external to the chip - and the inverter which is the downward pointing triangle with the circle at the bottom. The shown configuration is problematic presumably because the inverter is subject to interference from the rest of the IC.
The solution is delete the crystal and instead use a self-contained crystal oscillator module (aka canned xo) that has a logic level output signal, connecting its output to the XIN pin. With a full logic swing clock signal coming in, the relative levels of interference will be much lower.
Even though this thread is mainly about measurements, I hope it is acceptable to write something about audibility.
I found this graph in Brian C. J. Moore, An introduction to the psychology of hearing, fifth edition, Elsevier, 2004, ISBN 0-12-505628-1. It shows that for modulated sine waves, close-in amplitude modulation is more audible than close-in phase modulation. This holds up to about 90 Hz frequency offset for a 1 kHz carrier.
The graph shows at what modulation index the modulation got audible. The phase modulated signal actually consisted only of the carrier and the first upper and lower sideband tones.
The article Moore got it from is A. Sek, "Modulation thresholds and critical modulation frequency based on random amplitude and frequency changes", Journal of the Acoustical Society of Japan (E), volume 15, pages 67...75, 1994.
I found this graph in Brian C. J. Moore, An introduction to the psychology of hearing, fifth edition, Elsevier, 2004, ISBN 0-12-505628-1. It shows that for modulated sine waves, close-in amplitude modulation is more audible than close-in phase modulation. This holds up to about 90 Hz frequency offset for a 1 kHz carrier.
The graph shows at what modulation index the modulation got audible. The phase modulated signal actually consisted only of the carrier and the first upper and lower sideband tones.
The article Moore got it from is A. Sek, "Modulation thresholds and critical modulation frequency based on random amplitude and frequency changes", Journal of the Acoustical Society of Japan (E), volume 15, pages 67...75, 1994.
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I'm on the phone so pardon my french...
An oscillator is made with a crystal and an inverting amplifier.
This inverter has a logic gate symbol but it isn't, usually it is 74hcu04 which is used as an analog inverting amplifier. It can also be a transistor, for example colpitts, clapp oscillator.
The crystal in the feedback of this amplifier makes it oscillate at the desired frequency.
Signal on crystal is low amplitude sine wave, tens of mV tops, high impedance, very vulnerable to noise. For example the traces between the crystal and the chip can pickup noise from nearby traces. The crystal is in a metal can but it is not grounded so noise can couple into it too. It made different jitter with the crystal on top side or bottom side of the board.
Also modulating the power supply of the inverter will change the frequency. So it integrates its supply noise into phase noise.
It really is an analog circuit and the best place to put it is stand alone in a shielded can with the crystal (hence "canned XO" with XO meaning crystal oscillator).
The worst place to put it is in a big digital chip making lots of noise, with traces carrying I2S close to the sensitive amplifier input...
So to answer your question when I saw suspicious jitter, the chips internal crystal oscillator was the primary suspect.
Since I kinda expected this could happen I had designed the board to allow clocking WM8805 from the ES9023 XO. With a divide by 2 flop since WM can't run on 50MHz.
The output of a canned oscillator is high level low impedance 3V3 LVCMOS so it is much more robust that the millivolt signal on the crystal. Even better when buffered with a logic gate so noise can't couple into the oscillator through the output.
Abraxalito answered, a canned XO is... A crystal oscillator in a can. Shielded grounded metal can.
https://www.mouser.fr/c/passive-com...vices/oscillators/standard-clock-oscillators/
Crystal is just the crystal, you have to add the rest of the oscillator circuit
https://www.mouser.fr/c/passive-components/frequency-control-timing-devices/crystals/
Guard rings are meant to protect high impedance nodes against leakage current due to unavoidable contamination on the surface of the board. Only works on DC if you want to measure nano amps. No use in a dac.
Split grounds increase inductance, no good when you have MHz signals.
Every cut, slit, split in the ground plane makes a slot antenna. It is easy to make unintentional resonant structures with split grounds. If their resonant frequency matches a frequency present in your design your enclosure is like a microwave oven lol
Same thing for mezzanines, heat sinks, big caps, daughter boards, stuff standing above the board on wires. It's a dipole antenna with the board as ground plane.
Best is solid ground plane on layer 2 of 4 layer board. It is only 0.2mm below top layer, so vias to ground plane are very short and low inductance. This makes your decoupling caps work much better than with vias to ground on the other side of the board, further away. Inductance is proportional to surface area of current loops.
Jlcpcb makes 4 layer cheaper than the postage fee. Just the time saved by not routing +-15V for these damn opamps on 2 layers is worth it
I agree. 4-layer boards makes things much easier. I normally have solid ground planes on layers 2 and 4. Top layer is for signals and 3rd layer for power tracks or planes and some auxiliary signal tracks (e.g. static GPIO). In this way ground for power tracks is on separate ground plane from signal ground.
Thank you.
Exactly the same type of expectation I would have about clocking ES9038Q2M using a crystal rather than a clock module.
To describe some of my recent activity, when designing my Clock & DSP board it was allowed for a number of similar types of contingencies. Thus there are a lot of jumpers to allow for some experiments and to check some things. Some jumpers were there to check on things I suspected, some were to find out things that didn't quite rise to a level of suspicion but that I thought should probably be checked anyway.
Also laid out the board and assigned layers almost exactly as you and @bohrok2610 have described. Didn't think there was any better way.
One difference in intent was that the board was for early stage R&D, not for production. I didn't care too much about passing EMI/EMC testing. What I wanted more was to see if I could move the needle on dac SQ a bit. Along the way a small number of things were discovered that were not anticipated nor allowed for in the initial board design. The subsequent revision fixed those things. A few other experiments were performed later using dead bug techniques. Overall the board has proven useful as a learning and a dac development tool.
So, that's my shared story for now.
On another topic, a quote from the book, "The Art of Doing Science:"
"I need to discuss science vs. engineering. Put glibly:
In science if you know what you are doing you should not be doing it.
In engineering if you do not know what you are doing you should not be doing it.
Of course, you seldom, if ever, see either pure state. All of engineering involves some creativity to cover the
parts not known, and almost all of science includes some practical engineering to translate the abstractions
into practice. Much of present science rests on engineering tools, and as time goes on, engineering seems to
involve more and more of the science part. Many of the large scientific projects involve very serious
engineering problems—the two fields are growing together! Among other reasons for this situation is almost
surely we are going forward at an accelerated pace, and now there is not time to allow us the leisure which
comes from separating the two fields."
In the above regard, I consider some of what I am doing to fall into the category of science and some to be engineering (as viewed in the 'glib' sense described above). Thus there has to be a mixture of experimenting to learn and of thoughtful engineering practices.
Moving along to another subject, there are a couple of papers I will attach to perhaps raise awareness about non-time invariance and non-stationarity in the real world, and the limitations some scientists and engineers are finding with Fourier Transforms as they apply to some real world applications. In geology, one paper argues that non-stationarity should be proven to be of deterministic causation before abandoning stationary models.
In other fields such as EKG measurement, or short term financial forecasting, an assumption of non-stationarity may be made without proven deterministic causation. In those fields non-stationarity may be a necessary assumption if signal identification and or short term predictions are to be optimized.
A quote from the second paper talks about something that has been a concern of mine:
"The exclusive heritage use of the Fourier series
functions, the trigonometric functions of sine and cosine,
also has the following three reasons [16]. Given that we
want a time invariant representation of signals, since there is
usually no natural origin of time, leads to trigonometric
functions that are the eigenfunctions of time translation.
Linear systems also have the same eigenfunctions - the
complex exponentials that are equivalent to the real
trigonometric functions. The third good reason for the
Fourier functions is that the synthesis of the band limited
physical signal from equally spaced samples taken at a rate
of at least twice higher than the signal's highest frequency is
simple to understand as a consequence of the Nyquist
sampling theorem.
Most natural phenomena are non-linear and nonstationary,
and direct application of the Fourier spectrum
analysis may lead to undesirable affects and unrelated
physical interpretation. There is presently no engineering
tool for systematic spectrum analysis and synthesis of
nonlinear and nonstationary data. Nonlinear and
nonstationary processes are complex processes that evolve
in time, such as speech or music and their properties are
statistically non-invariant over time."
My comment: Physical devices used to reproduce speech or muic are IMHO also nonlinear, nonstationary, and evolve over time. Maybe we are making too many assumptions in the subjective interpretation of FFT measurements? One example suggested in another thread: https://www.diyaudio.com/community/...quality-between-some-dacs.386815/post-7045337
"I need to discuss science vs. engineering. Put glibly:
In science if you know what you are doing you should not be doing it.
In engineering if you do not know what you are doing you should not be doing it.
Of course, you seldom, if ever, see either pure state. All of engineering involves some creativity to cover the
parts not known, and almost all of science includes some practical engineering to translate the abstractions
into practice. Much of present science rests on engineering tools, and as time goes on, engineering seems to
involve more and more of the science part. Many of the large scientific projects involve very serious
engineering problems—the two fields are growing together! Among other reasons for this situation is almost
surely we are going forward at an accelerated pace, and now there is not time to allow us the leisure which
comes from separating the two fields."
In the above regard, I consider some of what I am doing to fall into the category of science and some to be engineering (as viewed in the 'glib' sense described above). Thus there has to be a mixture of experimenting to learn and of thoughtful engineering practices.
Moving along to another subject, there are a couple of papers I will attach to perhaps raise awareness about non-time invariance and non-stationarity in the real world, and the limitations some scientists and engineers are finding with Fourier Transforms as they apply to some real world applications. In geology, one paper argues that non-stationarity should be proven to be of deterministic causation before abandoning stationary models.
In other fields such as EKG measurement, or short term financial forecasting, an assumption of non-stationarity may be made without proven deterministic causation. In those fields non-stationarity may be a necessary assumption if signal identification and or short term predictions are to be optimized.
A quote from the second paper talks about something that has been a concern of mine:
"The exclusive heritage use of the Fourier series
functions, the trigonometric functions of sine and cosine,
also has the following three reasons [16]. Given that we
want a time invariant representation of signals, since there is
usually no natural origin of time, leads to trigonometric
functions that are the eigenfunctions of time translation.
Linear systems also have the same eigenfunctions - the
complex exponentials that are equivalent to the real
trigonometric functions. The third good reason for the
Fourier functions is that the synthesis of the band limited
physical signal from equally spaced samples taken at a rate
of at least twice higher than the signal's highest frequency is
simple to understand as a consequence of the Nyquist
sampling theorem.
Most natural phenomena are non-linear and nonstationary,
and direct application of the Fourier spectrum
analysis may lead to undesirable affects and unrelated
physical interpretation. There is presently no engineering
tool for systematic spectrum analysis and synthesis of
nonlinear and nonstationary data. Nonlinear and
nonstationary processes are complex processes that evolve
in time, such as speech or music and their properties are
statistically non-invariant over time."
My comment: Physical devices used to reproduce speech or muic are IMHO also nonlinear, nonstationary, and evolve over time. Maybe we are making too many assumptions in the subjective interpretation of FFT measurements? One example suggested in another thread: https://www.diyaudio.com/community/...quality-between-some-dacs.386815/post-7045337
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Hm, bohrok2610 found previously that power ground planes can act as antenna, with sufficient noise pickup to affect very low noise circuits. Check 5th measurement here and compare to this one (post #1397 - link doesn't open exactly this one).
It may be better, for sensitive circuit parts like voltage references and alike, to use signal traces sandwiched between ground plane and Zero Signal Plane (plane connecter to gnd at only one point) and power planes at 4th layer. I tried this approach with opamp amplifier and immunity to EMI was outstanding. Here is noise measurement with bare PCB only 20 cm apart from old linear lab PS with two large unshielded EI transformers. Only 100 nV of 50 Hz noise and this measurement setup usually picks 100 nV noise if anything is powered within several meters radius.
Attachments
In some cases it may be worth going to a 6-layer board. Prices are coming down even on those. IIRC Benchmark DAC-3 used at least 6-layers. Other options include the use of shielding cans, etc. Other than that, I put my dac test boards in an emptied out steel file server case for shielding when in use. Also use a good power conditioner 
In addition in a thread started by @gentlevoice I wrote about some ideas for trying to keep bypass currents mostly on areas of surface fill in mixed signal designs: https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6928583
https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6929600
https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6943556
https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6944464
https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6949831
EDIT: One of the big issues with opamp noise immunity in dac output stage circuits is RF coming out of the dac chip. Routing buried traces may help to an extent, however that may also increase capacitance as seen at the opamp input terminals. In an I/V stage that can cause noise peaking, so there may be a tradeoff to consider. I did note that Topping buried traces between I/V opamp outputs and differential summing stage inputs in D90. Thought that might have been to add a bit more RF filtering between stages.
In addition in a thread started by @gentlevoice I wrote about some ideas for trying to keep bypass currents mostly on areas of surface fill in mixed signal designs: https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6928583
https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6929600
https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6943556
https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6944464
https://www.diyaudio.com/community/...apacitor-simulation-model.382329/post-6949831
EDIT: One of the big issues with opamp noise immunity in dac output stage circuits is RF coming out of the dac chip. Routing buried traces may help to an extent, however that may also increase capacitance as seen at the opamp input terminals. In an I/V stage that can cause noise peaking, so there may be a tradeoff to consider. I did note that Topping buried traces between I/V opamp outputs and differential summing stage inputs in D90. Thought that might have been to add a bit more RF filtering between stages.
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That was with a 2-layer board placed in a EMI-rich environment. IME ground planes in 2-layer boards can easily become a problem. With 4-layer boards the results are much more predictable in general. And the layout is easier.