@bohrok2610 & InspectorGadget: Interesting to hear that you have good experiences with this - series, as I read your replies - of capacitors. However, what really caught my attention was the rather unusual impedance curve of the actual capacitor I linked to. I don't remember having seen an impedance curve this linear over such a wide frequency range, and as I can see it the other values in this series are not as linear ... ? Also, although it is specified at 55 mohm impedance the impedance plot is at ~33 mohms. Anyway ... 
.. smiling here ...
Cheers,
Jesper
I admit I am also quite taken with their looks
.. smiling here ...Cheers,
Jesper
Some of my results with the network analyzer:
Murata NFM21PS106
This is a 4uF feed through cap. Requires 4 layer board with ground on L2 and 2 vias on each side. Unbelievable performance in filtering and decoupling. Look at curve in datasheet. Model is available on Murata simsurfing site. ESR is very low so can't be parallel with other MLCCs. Ideal for decoupling one pin or filtering power supply before ldo. Murata BLM18EG ferrite bead is a nice match.
LLR reverse geometry 0306 controlled ESR
Ideal for multiple power pins on same net. Won't ring due to ESR. Tiny so it can squeeze close to the chip pins. Low inductance.
Special snowflake tantalum polymer
Useless. For same price you can put 10x 10uF 0603. If you want ESR, add 0R1 in series with each. Resistor adds a bit of inductance but if you put LLR cap on the chip pin...
Alu electrolytics
Pin spacing is inductance. 2.5mm 4nH. Get biggest capacitance with smallest pin spacing. Like Pana FR 470u 6.3V. put 10 in parallel, they are very cheap. You get 4700uF with 400pH ESL and 8 mOhm. For same price as special snowflake tantalum polymer...
And in stock
Oscons and other polymers
Great for dc-dc output due to high current rating. Useless for dac, too much inductance vs ESL, will ring with ceramic unless its LLR.
Murata NFM21PS106
This is a 4uF feed through cap. Requires 4 layer board with ground on L2 and 2 vias on each side. Unbelievable performance in filtering and decoupling. Look at curve in datasheet. Model is available on Murata simsurfing site. ESR is very low so can't be parallel with other MLCCs. Ideal for decoupling one pin or filtering power supply before ldo. Murata BLM18EG ferrite bead is a nice match.
LLR reverse geometry 0306 controlled ESR
Ideal for multiple power pins on same net. Won't ring due to ESR. Tiny so it can squeeze close to the chip pins. Low inductance.
Special snowflake tantalum polymer
Useless. For same price you can put 10x 10uF 0603. If you want ESR, add 0R1 in series with each. Resistor adds a bit of inductance but if you put LLR cap on the chip pin...
Alu electrolytics
Pin spacing is inductance. 2.5mm 4nH. Get biggest capacitance with smallest pin spacing. Like Pana FR 470u 6.3V. put 10 in parallel, they are very cheap. You get 4700uF with 400pH ESL and 8 mOhm. For same price as special snowflake tantalum polymer...
And in stock
Oscons and other polymers
Great for dc-dc output due to high current rating. Useless for dac, too much inductance vs ESL, will ring with ceramic unless its LLR.
Not in stock at Mouser, Digikey, or Arrow. Long lead time item they say.
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It's the N2PK VNA. It has very good dynamic range but is limited to 60MHz. The software is MyVNA.
Gentlevoice,
I am curious about some AVX caps as inductance and dielectric is talked here.
Smd: Acu-P serie
Niobium oxyde smd as a tantalum swap
The RF MLO despite it is polymer based perhaps worths the try as well
Just two cents as the discussion is technically above my head. Anyway I like the idea of esr linearity, but sometimes non linear esr caps can have pleasant result as the acrylic also from CDE...20% precision only but way different subjectivly than the Panasonic ECHU for illustration.
I am curious about some AVX caps as inductance and dielectric is talked here.
Smd: Acu-P serie
Niobium oxyde smd as a tantalum swap
The RF MLO despite it is polymer based perhaps worths the try as well
Just two cents as the discussion is technically above my head. Anyway I like the idea of esr linearity, but sometimes non linear esr caps can have pleasant result as the acrylic also from CDE...20% precision only but way different subjectivly than the Panasonic ECHU for illustration.
@diyiggy: Hi again
I took a look at the datasheet for the Accu-P series and you may have noticed that it only offers quite low capacitances - to my memory a maximum of 82pF which is very low for typical audio decoupling purposes (might well be fine for direct-coupling purposes - didn't consider that, but still low value). The same applies for the MLO series - still very low capacitance values.
Regarding Panasonic's ECHU series as far as I can see it uses PPS as the dielectric material. I know it has a positive reputation among some audio people, however, to my ears they sound somewhat bright and tonally "bland". I once saw a datasheet for PPS capacitors and apparently the so-called dissipation factor rises steeply at higher frequencies (above ~1 MHz) likely causing more distortion at these frequencies.
Wrt. SMD capacitors used for digital decoupling may I then suggest that you take a look at Kemet's capacitor simulation software which can be found online at this link:
https://ksim3.kemet.com/capacitor-simulation
Here it is possible to see the ESR and inductance curves for many different capacitors ...
And assuming, everything else being equal (like "all capacitors basically sound the same if they measure the same"), that the desired capacitor characteristic is a low(est) impedance at the decoupling frequency - e.g. decoupling a 24.576 MHz master clock for a 48 kHz base frequency - you can see that e.g. 82 pF in a 0805 package (10 volt, C0G) typically is lowest impedance at appr. 800 MHz. Here the impedance is ~ 100 mohm, whereas at 24.576 MHz the impedance is 79 kohms (kiloohms!). Thus, if one desires an efficient damping/filtering of the 24.576 MHz clock noise a 82 pF capacitor would not be a very efficient choice.
For 24.576 MHz a 1210 package 47 nF (25 volt, C0G) capacitor would give much better filtering with an appr. 15 mohm impedance at this frequency.
I hope this is a useful reply?
Cheers, Jesper
I took a look at the datasheet for the Accu-P series and you may have noticed that it only offers quite low capacitances - to my memory a maximum of 82pF which is very low for typical audio decoupling purposes (might well be fine for direct-coupling purposes - didn't consider that, but still low value). The same applies for the MLO series - still very low capacitance values.
Regarding Panasonic's ECHU series as far as I can see it uses PPS as the dielectric material. I know it has a positive reputation among some audio people, however, to my ears they sound somewhat bright and tonally "bland". I once saw a datasheet for PPS capacitors and apparently the so-called dissipation factor rises steeply at higher frequencies (above ~1 MHz) likely causing more distortion at these frequencies.
Wrt. SMD capacitors used for digital decoupling may I then suggest that you take a look at Kemet's capacitor simulation software which can be found online at this link:
https://ksim3.kemet.com/capacitor-simulation
Here it is possible to see the ESR and inductance curves for many different capacitors ...
And assuming, everything else being equal (like "all capacitors basically sound the same if they measure the same"), that the desired capacitor characteristic is a low(est) impedance at the decoupling frequency - e.g. decoupling a 24.576 MHz master clock for a 48 kHz base frequency - you can see that e.g. 82 pF in a 0805 package (10 volt, C0G) typically is lowest impedance at appr. 800 MHz. Here the impedance is ~ 100 mohm, whereas at 24.576 MHz the impedance is 79 kohms (kiloohms!). Thus, if one desires an efficient damping/filtering of the 24.576 MHz clock noise a 82 pF capacitor would not be a very efficient choice.
For 24.576 MHz a 1210 package 47 nF (25 volt, C0G) capacitor would give much better filtering with an appr. 15 mohm impedance at this frequency.
I hope this is a useful reply?
Cheers, Jesper
Indeed, I thougth they were existing in the nano range.
What about the Niobium for tantalum swap ?
Try CDE FCA if needing 0.1 uF , it will give you something different (for analog purpose) for HF load decoupling VS ceramic class I. Similar HF behavior according the datasheet and 0805 package... but different result you may mesure.
What about the Niobium for tantalum swap ?
Try CDE FCA if needing 0.1 uF , it will give you something different (for analog purpose) for HF load decoupling VS ceramic class I. Similar HF behavior according the datasheet and 0805 package... but different result you may mesure.
If you want to stick a cap on a clock (or on anything really), gotta ask what the cap is for? What's its job? Could be:
1- Lower HF impedance of the supply rail (the usual "decoupling")
2- Get rid of noise incoming on the supply rail
3- Prevent the load (ie, a clock) from polluting the supply rail with HF noise
For a clock, there is always a small ceramic cap inside the clock can anyway. It is much closer to the active circuit, so its wiring inductance will be much less. And because of the large pin spacing, the inductance to the cap on the board will be quite high. I wonder if this can make the two caps ring. If it does, it should be observable as ringing on the VCC pin when the clock switches. This will depend on the ESR of the cap. If the VCC is connected to other caps via traces, this can also ring.
For points 2 and 3, a pi filter with a ferrite bead does a much better job than just a cap. Ferrite beads also ring with caps (they're inductors). Murata provides spice models for all their ferrite beads, so I use that.
Basically, swapping parts without spicing it first to check if an unwanted resonance is introduced is a bit hazardous...
1- Lower HF impedance of the supply rail (the usual "decoupling")
2- Get rid of noise incoming on the supply rail
3- Prevent the load (ie, a clock) from polluting the supply rail with HF noise
For a clock, there is always a small ceramic cap inside the clock can anyway. It is much closer to the active circuit, so its wiring inductance will be much less. And because of the large pin spacing, the inductance to the cap on the board will be quite high. I wonder if this can make the two caps ring. If it does, it should be observable as ringing on the VCC pin when the clock switches. This will depend on the ESR of the cap. If the VCC is connected to other caps via traces, this can also ring.
For points 2 and 3, a pi filter with a ferrite bead does a much better job than just a cap. Ferrite beads also ring with caps (they're inductors). Murata provides spice models for all their ferrite beads, so I use that.
Basically, swapping parts without spicing it first to check if an unwanted resonance is introduced is a bit hazardous...
Of course it is hazardous.
In the famous Crystak 95x can a member opened, ISCMMS if I remember, the pico range are ceramic class I but there is still class 2 around. Is that safe (piezzo)?
On the SA 10 shelatic linked as for the Mori osci. I indeed saw the use of smd coil in the paths...
I remember a HF engineer here called Marce...in his daily job he had tons of expensive softwares to calculate all those pH and resonances as he was designing multi layer pcbs. Just the software maintenance year issue costed more than 10 Grand...uH.
What happens also when parrelleling too much caps ? Vertical current ground loop if stacking smd capacitors ? If // lythics in line, is there a difference between the trace inductance of the close cap and say the 20° ?
Do the designers pkay with the width of the traces to play with inductance when it is in that very low pico H you are talking guys ?
The close L2 gives the lowest decouplibg capacitance ? For illustration 15 pF when very close ?
I try to follow but it is hard without your EE background guys...
In the famous Crystak 95x can a member opened, ISCMMS if I remember, the pico range are ceramic class I but there is still class 2 around. Is that safe (piezzo)?
On the SA 10 shelatic linked as for the Mori osci. I indeed saw the use of smd coil in the paths...
I remember a HF engineer here called Marce...in his daily job he had tons of expensive softwares to calculate all those pH and resonances as he was designing multi layer pcbs. Just the software maintenance year issue costed more than 10 Grand...uH.
What happens also when parrelleling too much caps ? Vertical current ground loop if stacking smd capacitors ? If // lythics in line, is there a difference between the trace inductance of the close cap and say the 20° ?
Do the designers pkay with the width of the traces to play with inductance when it is in that very low pico H you are talking guys ?
The close L2 gives the lowest decouplibg capacitance ? For illustration 15 pF when very close ?
I try to follow but it is hard without your EE background guys...
Theory and sims are fine as far as they go. However, reality may surprise at times with some unexpected twist. Diyiggy nailed it in terms of what makes Crystek 957 sound acceptable, as far as I'm concerned. Maybe rising ESR of the PPS cap interacts in a benign way with the clock module internal ceramic cap. At the same time the PPS cap may provide better linearity at frequencies where its impedance is low. However it works, it does work. So of course there must be a reason. When you find out what it is you can add it to your sim.
Btw when you see the tiny oscillator than Pulsar Clock made (NLA now), for sure HF seems not to be an easy territory. And maybe some like old dac chips at low frequency speeds because it's easier to make it sounds acceptable too ! Just wonder...
Anyway, let you continue guys, that's crazy good knowledge and experience you have guys... fascinating thread to read. . The very few I beleive to understand is pcbs designers have to choose trade offs too !
Anyway, let you continue guys, that's crazy good knowledge and experience you have guys... fascinating thread to read.
. The very few I beleive to understand is pcbs designers have to choose trade offs too !
If you observe the small 3 pin regulator board here you will notice that... it has three pins... And it has decoupling caps on it, both input and output.
Since it has a long inductive ground pin, these caps do not have a solid connection to the ground plane. So, they are useless at shunting HF noise to ground.
But what they do well is couple HF noise directly between input and output
In fact, with this type of setup, the regulator is transparent to HF noise in both directions...
This shows up rather obviously in measurements: PSRR is a straight line angled 45° going down, and reaches zero at some not so high frequency. So I guess they didn't measure it lol. That kind of stuff makes me not really interested in their other products...
Since it has a long inductive ground pin, these caps do not have a solid connection to the ground plane. So, they are useless at shunting HF noise to ground.
But what they do well is couple HF noise directly between input and output
In fact, with this type of setup, the regulator is transparent to HF noise in both directions...
This shows up rather obviously in measurements: PSRR is a straight line angled 45° going down, and reaches zero at some not so high frequency. So I guess they didn't measure it lol. That kind of stuff makes me not really interested in their other products...
What is the proper way to acheive it ? I surmise it is a 3V3 reg and the adm reg is maybe a pre reg ?
I just imagine as I have no Pulsar Clock.
If I remember Pulsar Clock was using Jocko Homo (RIP) technic that was batch of crystal measuring to keep only the best that have less noise below 10 Hz or 1 hz...dunno exactly remember.
Btw, should we gnd the can of such crystals ?
I just imagine as I have no Pulsar Clock.
If I remember Pulsar Clock was using Jocko Homo (RIP) technic that was batch of crystal measuring to keep only the best that have less noise below 10 Hz or 1 hz...dunno exactly remember.
Btw, should we gnd the can of such crystals ?