Yes, it is sad that many here complaining about the sound of modern LDOs (LT30xx or TPS7Axx) have only used them in separate 3-pin regulator modules possibly hanging with wires. I guess TP and other similar "modular" dac implementations have led people to believe that all regulators work fine as separate modules.
Stepping the inductor in the ground pin... HF PSRR of LM317, which is already not spectacular, goes byebye with as little as 10nH.
Above 1MHz, PSRR drops to 0dB.
The negative PSRR spike is the input ceramic cap ringing with the rest of the power supply due to pin inductance
Yes if you use wires (100nH) it will amplify the input noise by 20dB if it hits the spot ! lmao
Above 1MHz, PSRR drops to 0dB.
The negative PSRR spike is the input ceramic cap ringing with the rest of the power supply due to pin inductance
Yes if you use wires (100nH) it will amplify the input noise by 20dB if it hits the spot ! lmao
What is the inductance of 1mm width, 5 mm length, 1 oz, copper trace ?
What is the tread off with longer trace length if a little inductance is needed but the length of tge ground loop is increased VS very short trace with reg near the load but with an inductance that could be a local EM/IM source near a clock or a digital'ic ?
Or does increased trace length changes just its capacitance ?
What is the tread off with longer trace length if a little inductance is needed but the length of tge ground loop is increased VS very short trace with reg near the load but with an inductance that could be a local EM/IM source near a clock or a digital'ic ?
Or does increased trace length changes just its capacitance ?
Increased trace length increases both capacitance and inductance.
https://www.pcbway.com/pcb_prototype/impedance_calculator.html
https://www.edn.com/rule-of-thumb-5-capacitance-per-length-of-50-ohm-transmission-lines-in-fr4/
https://www.edn.com/total-loop-inductance-length-in-50-ohm-transmission-lines-rule-of-thumb-6/
https://www.pcbway.com/pcb_prototype/impedance_calculator.html
https://www.edn.com/rule-of-thumb-5-capacitance-per-length-of-50-ohm-transmission-lines-in-fr4/
https://www.edn.com/total-loop-inductance-length-in-50-ohm-transmission-lines-rule-of-thumb-6/
Attachments
Last edited:
Thanks, I found with the lt3042/TPS7A (second one being better) it was better with more inductance i.e. 5 cm long cable between the output cap array and the load when feeding the IanCanada Clock II. Maybe the inductance tamed a caps resonnance ?
Stupid question, but what should use gentlevoice if wanting to use very close regs nears the digital ICs on his sketch moddelings ?
Stupid question, but what should use gentlevoice if wanting to use very close regs nears the digital ICs on his sketch moddelings ?
You can search "PCB trace inductance calculator"
If your trace is over a continuous ground plane, its inductance depends on its length to width ratio (thick and short = lower L -- thin and long = high L) and on the height above the ground plane (closer = lower L).
If your trace is a copper pour that's starting to look like a plane, then its inductance is "per square". It's a rather amazing property. One square of copper over a plane has the same inductance no matter the size. So, power pours, even small ones, just below a chip, they work great as long as there's no split in them.
If your trace is not over a continuous ground plane, here's a calculator. You have to consider the inductance of the whole current loop. With a ground plane it's simpler (and much lower) because the return current goes in the plane below the trace. But without a plane, return current will go... wherever it can. So it gets more complicated. But if someone isn't using planes, then it means it's a low speed design and they don't mind inductance. In this case, no issue.
Basically when you put a decoupling cap you have to visualize the current loop through the cap and the chip's VCC and GND pins. And then you try to make the area of that loop as small as possible. It is much easier in 3D when the ground part of that loop is through the plane right below the cap and the chip, because then the width of the loop becomes the thickness of prepreg material between toplayer and layer2 (0.2mm in 4 layer).
Capacitance is proportional to the area of the two plates that make the capacitor, and inverse proportional to the distance between them. So, thin trace has low capacitance, good for fast signals, and fat copper pour has high capacitance to ground, would be bad for signals but it's not used for that. Capacitance is not high enough to be useful for decoupling unless you make $$$ boards with plenty of closely spaced layers.
If your trace is over a continuous ground plane, its inductance depends on its length to width ratio (thick and short = lower L -- thin and long = high L) and on the height above the ground plane (closer = lower L).
If your trace is a copper pour that's starting to look like a plane, then its inductance is "per square". It's a rather amazing property. One square of copper over a plane has the same inductance no matter the size. So, power pours, even small ones, just below a chip, they work great as long as there's no split in them.
If your trace is not over a continuous ground plane, here's a calculator. You have to consider the inductance of the whole current loop. With a ground plane it's simpler (and much lower) because the return current goes in the plane below the trace. But without a plane, return current will go... wherever it can. So it gets more complicated. But if someone isn't using planes, then it means it's a low speed design and they don't mind inductance. In this case, no issue.
Basically when you put a decoupling cap you have to visualize the current loop through the cap and the chip's VCC and GND pins. And then you try to make the area of that loop as small as possible. It is much easier in 3D when the ground part of that loop is through the plane right below the cap and the chip, because then the width of the loop becomes the thickness of prepreg material between toplayer and layer2 (0.2mm in 4 layer).
Capacitance is proportional to the area of the two plates that make the capacitor, and inverse proportional to the distance between them. So, thin trace has low capacitance, good for fast signals, and fat copper pour has high capacitance to ground, would be bad for signals but it's not used for that. Capacitance is not high enough to be useful for decoupling unless you make $$$ boards with plenty of closely spaced layers.
Wire of 5cm has about 40nH inductance. Connecting LT3042/TPS7A with 5cm wires (in, gnd, out) makes it more or less useless for anything above 1MHz. Without measurements your findings are also useless.
It depends.
If the clock is powered via a connector, then on the pcb with the clock there should be a filter, most likely a pi filter, to prevent HF from the clock from being radiated by the wires. Look for a ferrite bead between two caps.
If this is the case then the length of the wires is not that important. Apart from the switching spikes which are the local capacitor's job, a clock draws a constant DC current. Every time it switches, it sips one gulp of charge from the capacitor. So if it switches at a constant frequency, this averages to a DC current which is very stable. So the transient response of the regulator, which would be degraded by the wires, is completely irrelevant. Its PSRR and noise are what matter for this particular load. I mean the wires are fine unless they cause some ringing between caps, or if there is no filter on the pcb, in which case they're a nice antenna to soak the room in nice low jitter 24.576MHz radio waves.
If the clock is powered via a connector, then on the pcb with the clock there should be a filter, most likely a pi filter, to prevent HF from the clock from being radiated by the wires. Look for a ferrite bead between two caps.
If this is the case then the length of the wires is not that important. Apart from the switching spikes which are the local capacitor's job, a clock draws a constant DC current. Every time it switches, it sips one gulp of charge from the capacitor. So if it switches at a constant frequency, this averages to a DC current which is very stable. So the transient response of the regulator, which would be degraded by the wires, is completely irrelevant. Its PSRR and noise are what matter for this particular load. I mean the wires are fine unless they cause some ringing between caps, or if there is no filter on the pcb, in which case they're a nice antenna to soak the room in nice low jitter 24.576MHz radio waves.
Hi & good morning ...
I would like to add an observation of mine in relation to ferrite beads etc. ... In my simulations they appear to be sort of a double-edged sword: Whereas they isolate noise coming from the PSU line to the device in question they also appear to increase HF impedance as seen from the device towards the PSU line. I.e. unless the decoupling near the device in question is very linear frequency-wise the ferrite bead appears to "enclose" the device VCC noise due to its increased HF impedance ... It makes me think that ferrite beads may be an approach possibly invented in the purely digital world like e.g. computers ... ?
I also remember Markw4 saying in one of his posts that ferrite beads should be avoided in relation to clocks - obviously, I don't know why exactly but thinking that maybe this could be the (a) reason ... (?)
@diyiggy: There is a tool that can help simulate many aspects of PCB design including trace inductances, capacitances & impedances. It is for free and there is a link here:
https://saturnpcb.com/saturn-pcb-toolkit/
The tap "conductor impedance" calculates values related to trace impedances etc.
Calculating parallel wire inductances & loop inductances etc. can be done e.g. with the eeweb tools:
https://www.eeweb.com/tools/parallel-wire-inductance/
Best regards,
Jesper
I would like to add an observation of mine in relation to ferrite beads etc. ... In my simulations they appear to be sort of a double-edged sword: Whereas they isolate noise coming from the PSU line to the device in question they also appear to increase HF impedance as seen from the device towards the PSU line. I.e. unless the decoupling near the device in question is very linear frequency-wise the ferrite bead appears to "enclose" the device VCC noise due to its increased HF impedance ... It makes me think that ferrite beads may be an approach possibly invented in the purely digital world like e.g. computers ... ?
I also remember Markw4 saying in one of his posts that ferrite beads should be avoided in relation to clocks - obviously, I don't know why exactly but thinking that maybe this could be the (a) reason ... (?)
@diyiggy: There is a tool that can help simulate many aspects of PCB design including trace inductances, capacitances & impedances. It is for free and there is a link here:
https://saturnpcb.com/saturn-pcb-toolkit/
The tap "conductor impedance" calculates values related to trace impedances etc.
Calculating parallel wire inductances & loop inductances etc. can be done e.g. with the eeweb tools:
https://www.eeweb.com/tools/parallel-wire-inductance/
Best regards,
Jesper
Yes that's the point, it's an inductor with dissipative properties. It keeps out the noise coming in from the supply, and keeps the noise generated by the load from contaminating the main supply.
They're very often used in RF too.
Averaged over one clock period, a clock oscillator draws constant current. It doesn't need low power supply impedance at low to mid frequencies. But it needs low impedance at HF, which is provided by the local cap. You have to sim the whole network and tweak it until you get the impedance you want. Sometimes a resistor is needed in series with the bead to prevent ringing.
But if you have a load that draws variable current and needs low power supply impedance, then of course you shouldn't put the ferrite bead there. If you use a local LDO you can put it (and the pi filter) before the LDO. If you use a shunt regulator you can put a pi filter in the current source supply.
Ferrite beads in clocks and clock buffers are often used to prevent clock switching noises from polluting the PS. See e.g. https://www.ti.com/lit/ds/symlink/lmk1c1102.pdf chapter 11.
I don't know what their first application was, but ferrite beads are used a lot in mixed-signal designs, both to keep interfering currents local and to filter supplies of sensitive circuits. Your observation is correct, putting a very lossy inductor (which is what a ferrite bead is) in the supply line normally increases impedance.
By the way, when did the topic of this thread change from the DAC reference to clock oscillators?
By the way, when did the topic of this thread change from the DAC reference to clock oscillators?
Dunno, but one place you don't want a ferrite bead is between the VREF regulator and the DAC VREF pin... It should be before the regulator.
The thinking was derived from some personal hubris in which I was convinced that ferrite beads would isolate the clocks from each other and from the power supply. When I listened to the result some instruments sounded better. Sure was proud of myself.
Unfortunately for me, a friend came over and listened. I didn't tell him what I changed. He proceeded to ream me a new one. Told me to his ears some instruments did sound better, other instruments sounded worse, and that the reproduction of space and soundstage had collapsed. He said whatever you did, put it back the way it was before!
Ouch! That stung, and I haven't forgotten the lesson: Don't assume textbook authors have timepods to measure jitter, and that they did measure it before they wrote about the benefits of ferrites. Also, don't assume ferrite manufacturers want to talk about the downsides of their products.
In addition IME diyiggy is once again right. Some trace length between regulator and clocks helps, at least if using Crystek 957 and 805 film decoupling caps.
Guess I would make one more point, I have heard EEs say stuff such as, 'an RC filter completely eliminates RF ingress at the input terminal of an amplifier.' EEs are supposed to know that filters attenuate, they don't eliminate. There are no ideal brick wall filters, especially one made with a one pole RC, or from a two pole LC. So you can probably imagine how I feel about explanations of ferrites and X7R bypass caps making a perfect filter. We should all take note when we read an overly idealized explanation.
Regarding what ferrites might be doing wrong: https://purifi-audio.com/2020/04/28... of distortion,a hysteretic mechanism at work.
Last edited: