White SMD , 4V Vf. Any green/blue/UV/white LED can be used.
Vf from 2.6 - 4V is what we are concerned with. 2 reds can also be used.
PS- I think some yellows are 2.6 Vf - can also be used.
OS
Terry do a listening test to Kypton-v
Maybe tomorrow. I'm at the hospital with my daughter. She is giving birth to our new granddaughter.
All the "standard" topologies are at POST #1.
They are -
-Wolverine , Symasui , CFA-X, Spooky. What they have been building
since the 70's.
The "new" ones -
-Kypton V/C , Eyesee , Infidel. Search the thread for these. Infidel
is still "in progress".
I will put all these(finalized) in ONE post and link to post #1. (when done).
Future ones - there are still some designs that have never been done.
I have over 2500 amp designs/schema's at my disposal.
OS
They are -
-Wolverine , Symasui , CFA-X, Spooky. What they have been building
since the 70's.
The "new" ones -
-Kypton V/C , Eyesee , Infidel. Search the thread for these. Infidel
is still "in progress".
I will put all these(finalized) in ONE post and link to post #1. (when done).
Future ones - there are still some designs that have never been done.
I have over 2500 amp designs/schema's at my disposal.
OS
The last of the "rarer" IPS's.
Infidel V2 is (below).
Thimios or Terry .... do the basic changes of the the last posted schema
to your existing PCB's. Even if one of you does so , we will know whether
it is thermally stable.
In the V2 , I added BV's caps - did not need 100u , 10uf will do.
Only .01ma "slop" with temperature(below2 ) , as well. Added Q9-Q10 (current
mirrors) , these replace the diodes and don't affect co-efficient.
It even works better !
-10ppm THD20K
--85db PSRR
- perfect clip / 300V/us slew.
Reached the design goals - hopefully with the temperature problem solved.
After either builders make the changes - new layout.
OS
Infidel V2 is (below).
Thimios or Terry .... do the basic changes of the the last posted schema
to your existing PCB's. Even if one of you does so , we will know whether
it is thermally stable.
In the V2 , I added BV's caps - did not need 100u , 10uf will do.
Only .01ma "slop" with temperature(below2 ) , as well. Added Q9-Q10 (current
mirrors) , these replace the diodes and don't affect co-efficient.
It even works better !
-10ppm THD20K
--85db PSRR
- perfect clip / 300V/us slew.
Reached the design goals - hopefully with the temperature problem solved.
After either builders make the changes - new layout.
OS
Attachments
YOU are telling me to "muntz" it ??
But I listen to you ... (many I do not).(below) Actually Q6/8 collectors (the "wasted" ones) go to Q11/14 emitters.
So is this now a folded hawksford cascode ?
Performance varies. <300hz PSRR took a big "hit" , went from -85 to -58db.
>300hz did the opposite ... -85 to -88db ??
THD is still 10ppm , slewrate is 300V+ , thermals are the same. CLG did
rise by 3db ...
Had to adjust the TiS's accordingly.
In total (the psrr mainly), a slight performance
drop.
PS - same slight performance drop with Q6/8 tied to Q12/13 emitters , as well.
But , both mods work.
OS
Attachments
Last edited:
Speculation
Hi Pete,
Nope, albeit Muntz might have thought the same thing. I was just wondering if we could do something useful with the Q6/8 collectors.
Perhaps because R8/R22 are not decoupled by large caps in the same way as at the input side (by means of C5/6) ?
Cheers, E.
One more suggestion: Make the degen. R's of the CM's equal and increase the gain of the IPS (R13=0).
Edit: * because the path from the inverting input to the TISes is shorter.
Hi Pete,
YOU are telling me to "muntz" it ??
Nope, albeit Muntz might have thought the same thing. I was just wondering if we could do something useful with the Q6/8 collectors.
Well, more or less. Less, because the collector signals are shunted by R23/R30. Therefore I suggested to ty them to the emitters of Q12/Q13.
That's weird. Don't understand (yet) why the PSRR got worse anyhow.
Perhaps because R8/R22 are not decoupled by large caps in the same way as at the input side (by means of C5/6) ?
How did you done it? I don't see an extra R (or CCS) between the base of Q11 and Q14 to "restore" the TIS bias current.
Anyhow, the "folded connection" of Q6/8 increases the gain somewhat. In that case you could lower the gain from Q6/7 to the TISes by lowering the ratio of R6/R23 (resp. R20/R30) while maintaining the same overall loop gain. Maybe this will result in a slightly better phase margin* and/or temperature stability (just speculation).
Cheers, E.
One more suggestion: Make the degen. R's of the CM's equal and increase the gain of the IPS (R13=0).
Edit: * because the path from the inverting input to the TISes is shorter.
Last edited:
You right , me wrong
. I messed up on one of my expressions.
-Just a slight "hit" in <300hz psrr and a 3-4db increase all the way to 50K. (overall positive gain)
PS - adding decoupling on the NFB buffer does nothing.
- I got to eliminate 2 resistors and the thermals are nearly 0 !
- +3.5db CLG with about the same gain margin increase for 20K = lower
thd 20 (7-10ppm).
WOW - no former R13 = 5ppm 2mhz UG (below 1) C7/8 might need to be
27p (a very slight overshoot @ 500V slew! @ 22p ).
My last post example was conceptual , (below 2 is the real one + .asc).
Works VERY nice. Might be "prime time".
Thanks for your help, Ed (BV , too).
OS
Attachments
Last edited:
Hi OS,
With five pairs of power transistors and +/-75V rails, this should easily do 250W into 8 Ohms, which it does. However when I simulate this it gives me 0.003410%. Obviously, not bad at all.
But fret not my friend. Just add two magic 500nF capacitors, one across R20 and the other across R27, and viola! 0.000653%!
Bela
With five pairs of power transistors and +/-75V rails, this should easily do 250W into 8 Ohms, which it does. However when I simulate this it gives me 0.003410%. Obviously, not bad at all.
But fret not my friend. Just add two magic 500nF capacitors, one across R20 and the other across R27, and viola! 0.000653%!
Bela
Last edited:
I test 2V p-p input 60V p-p @4R - not full power.
Hey , your right. Ohhh , I love all this good advice !!
Just add "C11/12"=.47u.
4.4V p-p in - 120V p-p out 4R = wow! (below)
PS - I knew about that "trick" , but 20HZ thd is slightly sacrificed on
some designs.
Edit - we now match the "blameless" on THD , beat most CFA's in slew , and with less parts.
I'm "buying" !!
Thank you !
OS
Attachments
Last edited:
