Had some fun with the soic package... Plenty of room left on a 100*55mm board for an input stage and its supply (with only one mosfet package obviously). That's work for tomorrow.
No smd parts under 1206... should be easy to solder. All caps but the output filter's ones are smd NP0.
No smd parts under 1206... should be easy to solder. All caps but the output filter's ones are smd NP0.
Attachments
I see you also skipped D7, D8, R30, R31....(with only one mosfet package obviously)...
Basically that is possible, however you might have to readjust R32 and R33.
Or alternatively you might need to enlarge the dead time. For dead time adjustment you will need R26, so better keep this in the layout.
No need to be afraid of immediate defects, but if you notice that during idle the MosFet is generating unpleasant heat, then will have to readjust.
And of course you can spend some months on retweaking the last 0.000000000% THD. 😛
If you also intend to use the layout for +/-80V then you should increase various distances between tracks with rail voltage or halfbridge levels.
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Once again, thanks for the warnings/comments/suggestions.
I'll find a way to fit r26 back in.
Btw, since we're speaking layout do you think I need another pair of 1uF caps near the mosfet under the board ? I've got a pair next to the mosfets pins on the groundplane side.
With one mosfet package, I'm doing this as a strictly home-hifi affair. I wouldn't feel at ease without the second pair of mosfets at those voltages.
Thus clearances are just like we discussed a few months back :
- the ground plane has an isolate rule set to 12mil,
- the power planes have isolate rules set to 16mil (I corrected the two tracks going to the left of the board, they were too close as there is 80v between them),
- the drc check is set at 12mil for the rest.
Without much thinking, I indeed remove those resistors to ease routing. I intended to simply add 6r8+15 and use a 22r resistor. A bit naive maybe... D7 and D8 were skipped according to your suggestions (post 223).I see you also skipped D7, D8, R30, R31.
Basically that is possible, however you might have to readjust R32 and R33.
Or alternatively you might need to enlarge the dead time. For dead time adjustment you will need R26, so better keep this in the layout.
I'll find a way to fit r26 back in.
Btw, since we're speaking layout do you think I need another pair of 1uF caps near the mosfet under the board ? I've got a pair next to the mosfets pins on the groundplane side.
If you also intend to use the layout for +/-80V then you should increase various distances between tracks with rail voltage or halfbridge levels.
With one mosfet package, I'm doing this as a strictly home-hifi affair. I wouldn't feel at ease without the second pair of mosfets at those voltages.
Thus clearances are just like we discussed a few months back :
- the ground plane has an isolate rule set to 12mil,
- the power planes have isolate rules set to 16mil (I corrected the two tracks going to the left of the board, they were too close as there is 80v between them),
- the drc check is set at 12mil for the rest.
Without much thinking, I indeed remove those resistors to ease routing. I intended to simply add 6r8+15 and use a 22r resistor. A bit naive maybe... D7 and D8 were skipped according to your suggestions (post 223).
I think keeping the 15R resistors unchanged would fit better, also fitting to post 223. (Higher drive impedance leads to shorter effective dead time.)
But in fact I did not go for a real life optimization of the single
MosFet version. With respect to this it is good that you will 'find a way to fit R26 in'.
Personally I would place it, even when in standard home use the stress is low - with a second pair of 1uF the design will fit for full power use at 4R load.... do you think I need another pair of 1uF caps near the mosfet under the board ?
A single SMD capacitor (or more) between +V and -V main power rails, as close as possible to switching transistors, keeps the highest frequency portion of switching current away from ground plane. A second SMD capacitor between -V and GND moves the highest frequency portion of voltage ripple due to switching currents to +V rail, which is not connected to any sensitive electronics. There are 220nF 250V 1210 X7R caps for 1st purpose, and even 2.2uF 100V X7R 1210 for 2nd. This makes possible brute-force turn-off with gate diodes and buffers, at di/dt over 1000A/us with modest EMI, which makes a cooler amplifier and removes the need for dead time.
Choco you are a good teacher, but remember that received knowledge remains connected to the master as long as the master has developed deeper knowledge or has more proof of concept.
Choco you are a good teacher, but remember that received knowledge remains connected to the master as long as the master has developed deeper knowledge or has more proof of concept.
It is not about masters and pupils. It is about learning from each other.
More than ten years ago you gave me a good hint regarding resonances in the halfbridge and I took this hint as a highly valuable starting point for own examinations.
Of course over the years tons of insights came from my scope, combined with simulations/calculations and own fundamental considerations.
But it is not only the autodidactic process - many other hints on various topics came from various different sources (forums, colleagues, friends, books, papers, conventions...).
Why can't you accept to learn from others? I bet in April 2016 you were aware of the LiteAmp. Most likely you also were aware of my short overview about possible variations / evolutions of post filter feedback designs with the IRS2092, which I listed in posting #79 in this thread:
Tips and suggestions on IRS2092 implementation?
But completely ignoring all this you still posted:
'By design IRS2092 only supports pre-filter feedback...'
http://www.diyaudio.com/forums/clas...-ohm-200-usd-real-power-fake.html#post4675660
..and ignored my asking mail about the technical considerations why you insist on this outdated view.
I really beg: Please come back to a normal exchange of thougts.
P.S.
Regarding shortest dead times, or even overlap, or what you call no dead time:
In this region of timing I clearly refuse the wording dead time. In this region it's not about dead time, because here the model of dead time is simply insufficient. Any reasonable model for this is about the details of the transitions. The model has to take into account multiple types of transitions which happen partially in parallel, partially overlapping, partially in sequence. Transitions of voltages, transitions of currents and transitions of complex impedances. No matter how much brute force you will apply in order to speed up the switching - the switching is not an ideal step, but a transition. Dive into this and you will notice that brute force with 'no dead' time will lead to higher idle losses, but in turn it can reduce switching losses at medium and higher loads, because it allows to avoid or reduce the Qrr related switching losses and also reduces the commutation time for the load current. Both obviously leads to a smaller integral(Vds(t) x Id(t) dt).
More than ten years ago you gave me a good hint regarding resonances in the halfbridge and I took this hint as a highly valuable starting point for own examinations.
Of course over the years tons of insights came from my scope, combined with simulations/calculations and own fundamental considerations.
But it is not only the autodidactic process - many other hints on various topics came from various different sources (forums, colleagues, friends, books, papers, conventions...).
Why can't you accept to learn from others? I bet in April 2016 you were aware of the LiteAmp. Most likely you also were aware of my short overview about possible variations / evolutions of post filter feedback designs with the IRS2092, which I listed in posting #79 in this thread:
Tips and suggestions on IRS2092 implementation?
But completely ignoring all this you still posted:
'By design IRS2092 only supports pre-filter feedback...'
http://www.diyaudio.com/forums/clas...-ohm-200-usd-real-power-fake.html#post4675660
..and ignored my asking mail about the technical considerations why you insist on this outdated view.
I really beg: Please come back to a normal exchange of thougts.
P.S.
Regarding shortest dead times, or even overlap, or what you call no dead time:
In this region of timing I clearly refuse the wording dead time. In this region it's not about dead time, because here the model of dead time is simply insufficient. Any reasonable model for this is about the details of the transitions. The model has to take into account multiple types of transitions which happen partially in parallel, partially overlapping, partially in sequence. Transitions of voltages, transitions of currents and transitions of complex impedances. No matter how much brute force you will apply in order to speed up the switching - the switching is not an ideal step, but a transition. Dive into this and you will notice that brute force with 'no dead' time will lead to higher idle losses, but in turn it can reduce switching losses at medium and higher loads, because it allows to avoid or reduce the Qrr related switching losses and also reduces the commutation time for the load current. Both obviously leads to a smaller integral(Vds(t) x Id(t) dt).
@Choco
Just finished the assembly of the 80V version, I noticed at that the Mosfets heats much more that those in the 40V version, at the same load.
28V 8A @ 4Ohms for example
Any advice?
Just finished the assembly of the 80V version, I noticed at that the Mosfets heats much more that those in the 40V version, at the same load.
28V 8A @ 4Ohms for example
Any advice?
Without any detailed measurements it is impossible to see whether you are talking about the normal amount of higher losses in this operating point or if your build is still suffering from an error.
In any case please also be aware that the 2x80V is not intended to drive 4R.
Reference from posting #400:
In any case please also be aware that the 2x80V is not intended to drive 4R.
Reference from posting #400:
2x80V_IRFI4020:
Possible operating range: 2x50V...2x84V
Max. power at stabilized 2x84V: 400W / 8R
Power with realistically sagging supplies, idling at 2x80V:
250W/8R (not suited for 4R and 2R !)
Looks like I am over driving the amplifier then!
Reason why it cannot drive 4 Ohms?
Reason why it cannot drive 4 Ohms?
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SOA of these IRFI MosFets.
What If replaced with IRFB4227?
For example, the PEAVEY IPR-1600 amplifier is based on the IRS2092 & the IRFB4227 (Two transistors only per channel), they even dont use any heat sinks. powered at +-80VDC delivering 500W @ 4R.
To start with, I wanted to say how impressed I am by Chocoholic's willingness not only to share his project but also to answer questions about it, often beyond what was originally asked. I've been browsing through the class-D forum and there are very few open designs and even fewer with published measurements. A thousand thanks.
On the other hand, Eva's post made me realize two things:
- the app notes from IR insist quite a bit on this rail-to-rail cap close to the mosfets. I've no doubt the plethora of caps around the mosfet pins on the liteamp pcb do the job. On my layout, maybe less so. It's quite easy to add it at this stage so why not ?
- the bigger the package, the better the capacitance change vs DC bias of ceramic caps (for a given value/working voltage). K-sim on Kemet's website is quite enlightening about that. So I'll shift a few caps from 1206 to 1210.
This brings me to the attached layout for the output stage. Does it look better ?
On the other hand, Eva's post made me realize two things:
- the app notes from IR insist quite a bit on this rail-to-rail cap close to the mosfets. I've no doubt the plethora of caps around the mosfet pins on the liteamp pcb do the job. On my layout, maybe less so. It's quite easy to add it at this stage so why not ?
- the bigger the package, the better the capacitance change vs DC bias of ceramic caps (for a given value/working voltage). K-sim on Kemet's website is quite enlightening about that. So I'll shift a few caps from 1206 to 1210.
This brings me to the attached layout for the output stage. Does it look better ?
Attachments
Choco: Your reaction gets caught in the toxic teacher filter. I'm unable to decode.
00940: Good, but populating both C13 and C14 can result in additional resonance and more ripple between -V and GND. My recommendation is populating only C13. You got the right layout to compare. You are right about the capacitance drop towards rated voltage, it happens mostly on small sizes in X5R/X7R-like dielectrics, and on all sizes for Y5V-like. But, there is another difference between 1206 and 1210, inductance increases for longer size in the "12" direction, but is reduced for longer size in the "10" direction.
00940: Good, but populating both C13 and C14 can result in additional resonance and more ripple between -V and GND. My recommendation is populating only C13. You got the right layout to compare. You are right about the capacitance drop towards rated voltage, it happens mostly on small sizes in X5R/X7R-like dielectrics, and on all sizes for Y5V-like. But, there is another difference between 1206 and 1210, inductance increases for longer size in the "12" direction, but is reduced for longer size in the "10" direction.
Thanks for not letting it escalate. I had taken this master comment (and some others) for a serious statement - sorry.Choco: Your reaction gets caught in the toxic teacher filter.
Still I am curious about your reasonings which pushed you to an absolute 'no go' of postfilter feedback with IRS2092.
I would say: By design IRS2092 was never intended for post filter feedback, but nevertheless allows it with restricted design freedom.
00940:
Back to the ceramic caps. It is of key importance to provide a low Z and preferably slightly lossy path for high frequency currents between the drain of the MosFet and source of lower MosFet. Placement should be in a way that the inductance of the loop from upper rail => upper Mos => lower Mos => cap(s) => upper rail has lowest possible inductance. You gain nothing by using a smaller package and then adding inductance by the tracks towards the cap. However making such tracks wide helps to reduce the loop inductance.
Looking at the cap(s) - typically 100V X7R types are available in sizes were two of them in series will show mostly the same inductance like one 250V type+more tracks.
However if you have two in series you have to define their DC operating point, which easily can be achieved by connecting their center tap to GND. If you use the GND plane for this you get a very low inductive track for free. Downside is as said Eva that you inject more noise to GND.
If these caps increase or reduce the noise on the rails will depend on the very specific layout and also will depend very much were on the rail tracks you will measure.
Overall EMI in the frequency range 10MHz - 1GHz is not always acting like one would expect at first glance. Statements on this only turn reliable for a specific design by measuring this design in the EMI chamber.
My posting about paralleling two pairs was not focussing on resonances, but component stress. X7R or even more lossy ceramics cannot handle unlimited HF-currents continuously.
Yes with IRFB4227 it is possible. I also moded one sample with IRFB4227. I can collect my old notes and post some infos, but have to ask for some patience.What If replaced with IRFB4227?
Yes with IRFB4227 it is possible. I also moded one sample with IRFB4227. I can collect my old notes and post some infos, but have to ask for some patience.
Conducted a test today with pair of IRFB4227. But the IR is resetting at 4A Load.
My mods for IRFB4227 were focussed on seeing what the IRS2092 can drive directly.
Basically it would be a better design to use at least a PNP in each gate drive to enhance the
turning off.
Anyhow, the IRS2092 in DIP housing is capable to drive the IRFB4227 directly in an acceptable way. You could call this design a dirty hack 🙂 .
My mods vs the IRFI +/-80V version:
- LowSide IRFB4227 was mounted in the position of Q6 with a ceramic isolator on the heat sink. Drain soldered in the center hole of the 5-Pin layout. Source soldered in the hole of the negative rail. Gate with a short wire directly wired towards R31.
- High Side IRFB4227 was mounted in the position of Q7 with a ceramic isolator on the heat sink. Source soldered in the center hole of the 5-Pin layout. Drain soldered in the hole of the positive rail. Gate with a short wire directly wired towards R30.
- R32, R33, R36, R37 not placed.
- D7 = MBR1100
- D8 = MBR1100
- Supply voltage of IRS2092 must be reduced, because the level of this supply translates with its square into driver losses. ==> D5 = Z13V
-The fat IRFB4227 needs a stronger snubber than the light weight IRFI.
==> C15 & C16 470pF. This calls for higher power resistors R34 & R35.
Something like 18R/2W. Be creative, but keep the loop of the snubber small...
Dead time adjustment: R25 = 8k2, R26 = 3k3
Over current protection has to be adjusted.
Have a look to the attached calculation sheet. It shows the values I used.
The Excelsheet also takes into account the temperature of the junction.
This parametrization is taking the IRFB4227 to its limits, better do not go higher.
But of course you can use the sheet for playing around and also you can adjust it to any other Mosfet by picking the Rdson at 25C and the Rdson at Tjmax from the MosFet data sheet for any design with the IRS2092.
In any case this nerd mod will show more heating when powering 4R from +/-80V compared to the little brother with +/-40V. A rough rule of thumb indicates also here that the losses grow with the square of the rail voltage.
...hope I did not miss anything. Also I do not have this sample anymore, because went on modding with Infineon IP320N20N3 and also with some Cree C3M0065090... 🙂
Basically it would be a better design to use at least a PNP in each gate drive to enhance the
turning off.
Anyhow, the IRS2092 in DIP housing is capable to drive the IRFB4227 directly in an acceptable way. You could call this design a dirty hack 🙂 .
My mods vs the IRFI +/-80V version:
- LowSide IRFB4227 was mounted in the position of Q6 with a ceramic isolator on the heat sink. Drain soldered in the center hole of the 5-Pin layout. Source soldered in the hole of the negative rail. Gate with a short wire directly wired towards R31.
- High Side IRFB4227 was mounted in the position of Q7 with a ceramic isolator on the heat sink. Source soldered in the center hole of the 5-Pin layout. Drain soldered in the hole of the positive rail. Gate with a short wire directly wired towards R30.
- R32, R33, R36, R37 not placed.
- D7 = MBR1100
- D8 = MBR1100
- Supply voltage of IRS2092 must be reduced, because the level of this supply translates with its square into driver losses. ==> D5 = Z13V
-The fat IRFB4227 needs a stronger snubber than the light weight IRFI.
==> C15 & C16 470pF. This calls for higher power resistors R34 & R35.
Something like 18R/2W. Be creative, but keep the loop of the snubber small...
Dead time adjustment: R25 = 8k2, R26 = 3k3
Over current protection has to be adjusted.
Have a look to the attached calculation sheet. It shows the values I used.
The Excelsheet also takes into account the temperature of the junction.
This parametrization is taking the IRFB4227 to its limits, better do not go higher.
But of course you can use the sheet for playing around and also you can adjust it to any other Mosfet by picking the Rdson at 25C and the Rdson at Tjmax from the MosFet data sheet for any design with the IRS2092.
In any case this nerd mod will show more heating when powering 4R from +/-80V compared to the little brother with +/-40V. A rough rule of thumb indicates also here that the losses grow with the square of the rail voltage.
...hope I did not miss anything. Also I do not have this sample anymore, because went on modding with Infineon IP320N20N3 and also with some Cree C3M0065090... 🙂
Attachments
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