TPC vs TMC vs 'pure Cherry'

[kgrlee]

Okay, tried the variant as described in #56 ... and it looks nominally better at 2R - but then goes very wonky

Frank, I won't have time to investigate properly for another month but using the #56 version and MJL3281/1302 seems to get rid of the wriggles into 2R load. Note R22 becomes 33 and C9 470p

With 1R5 load, even this is 'clipping' cos the VAS CCS runs out of current.

2R is a very cruel load for the MJL2994/3 version and exceeds SOA with any sensible heatsink. I note Self's fig 6.16 (4th ed) which is roughly what this series is based on, clips even earlier and shows the same behaviour even with its plain Miller comp. (with the same devices)

I won't be able to do a full stability analysis with this load until the end of Aug but please post what you get if you do. Do you have a simple 50W 8R example that doesn't behave like this that you could post the .ASC?

Thanks for drawing this to my attention.

 

[MagicBox]

Hello guru kgrlee,

Have you tried a combination of the different compensation methods? I've learnt that TPC and Cherry work well together. You can see how different compensations stack up in http://www.diyaudio.com/forums/solid-state/238429-my-new-vas-topology-18.html#post3565551 . Cherry on its own is difficult to get stable but with some help from unexpected corners it can be made quite workable. At least, in spice world It's interesting to see that we're all running into the same limitations while trying to find ways around it.

 

[kgrlee]

Just to point out that the .ASC of the 'final' pure Cherry version is at post #1480 cfa-topology-audio-amplifiers

This uses MJL3281/1302 which are seen to be da o/p devices of choice.

 

[kgrlee]

This is a reply to Dave Zan's post from the CFA topology amplifiers as it is really about why he thinks an inner Cherry loop with zillion MHz ULGF is evil

Yes, of course. But most of the excess phase will be from the slow outputs and drivers so I would be surprised if the omission of just the comparatively fast IPS means you can safely quadruple the ULGF.

If the loop had only 1 'known' roll-off, the ULGF could be at zillion MHz without problem. The large PM (& infinite GM) give a large margin of protection from further roll-offs due to parasitics etc.

As always, simpler circuits also allow simpler & better layout, less parasitics etc

I would put the poles in descending evil order .. outputs, then drivers, VAS, IPS, parasitics. Of course poor design and layout may easily change this order somewhat.

The 'fast' IPS DO introduce significant phase. You see this when you cascode the IPS. Also when you go from a single device IPS (the simplest possible CFA) to a LTP.

An amp can have an unstable inner loop, this is does not have to make the outer loop unstable.
Consequently the outer loop stability indicators will look fine.

I would very much like to see an example (either sensible or stupid) of this mythical beast.

For the .ASC I posted in #1480, reducing C1/3 reduces LG for the 'inner' Cherry loop (ie makes it more stable) but increases it for the main 'IPS' loop. This reduces the stability of the complete amp...

Yes, different capacitors just move the gain between the inner and outer loop so don't really help.

Here I have some 'real life' experience.

In most cases, increasing C1/3 usually DOES makes the amp more stable. (various caveats apply. See Cherry's 1982 JAES articl)

Different capacitive loads is an excellent test.
But I suspect that if the OPS is well buffered then the different loads may not impact the inner loop(s) much.
A time delay will always impact the inner loop(s) so should be a more robust test.
But I haven't actually tested the tests, do you have any data on this?

A delay simply introduces phase which is proportional to frequency. If you want to use this to determine a stability margin, you might as well just specify a larger PM.

I don't thnk an OPS can buffer the load to such an extent that the inner loop is not affected. A very complex amp with no feedback might do this but it wouldn't be a good amp.

If this is astx's supa amp, you'll remember we couldn't sim his stability results either.

But we both had identical conditions.
The limitation of the model is not an excuse.
All models are limited so tolerance of model inaccuracies is useful in itself.
But more importantly, it usually also reflects tolerance of real world imperfections.
And the OIC did worse in both aspects.

This isn't what my notes say.

After some encouraging results which were confirmed by astx's real life measurements, we got to a stage when the stability & THD with small changes to the circuit no longer reflected 'real life'. I was making changes which seemed to improve things but 'real life' said the opposite.

In the end, I only got 'similar' results to real life by making some assumptions of his 4" ribbon cable but this was still very far out.

As I was then making changes which in SPICE world would improve TMC while degrading 'pure Cherry' or vice versa, I didn't think any of our SPICE models was sufficiently accurate to proceed further. Astx is finding out some of these things anew at the moment .. eg the effect of stoppers on the bases.

You can conclude what you like from that episode. I certainly learnt a lot. But can only conclude that 'pure Cherry' was worse given astx's particular build. I think I can do better with 'pure Cherry' but would need a 'real life' example closer to my ideas on layout, decoupling & grounding to prove it.

A model is ONLY useful when it has some semblance to 'real life'. When you look at stuff where it starts to depart in large measure ... This is quite separate from 'tolerance of model inaccuracies' which I DO try & sim.

So my 'real life' example would need to be simple enough that SPICE can reflect it too.

Yes, if you try to stabilise the Cherry loop with variation of the capacitor value.

How else do you intend to stabilize it?

 

[Edmond Stuart]

>'An amp can have an unstable inner loop, this is does not have to make the outer loop unstable.
>Consequently the outer loop stability indicators will look fine.'
>>'I would very much like to see an example (either sensible or stupid) of this mythical beast.'

Hi Richard,

The Hawksford error correction OPS is a nice example. The inner loop uses positive feedback and thus extremely unstable, yet the outer loop is stable.

Cheers, E.

 

[Dave Zan]

This is a reply to Dave Zan's post ... about why he thinks an inner Cherry loop with zillion MHz ULGF is evil

I don't think it's evil, on the contrary, it would be excellent.
I am just not yet convinced it's possible.

If the loop had only 1 'known' roll-off, the ULGF could be at zillion MHz without problem. The large PM (& infinite GM) give a large margin of protection from further roll-offs due to parasitics etc.

As always, simpler circuits also allow simpler & better layout, less parasitics etc

I would put the poles in descending evil order .. outputs, then drivers, VAS, IPS, parasitics...

Yes. That's more or less my point.
If the loop had only one pole then the introduction of the IPS would alter the Unity Return Ratio Frequency dramatically, from infinity to a lot less.
But you already have the outputs, then drivers and your example has a 2 transistor VAS so that's already most of the excess phase.
I doubt the extra from the IPS is sufficient to explain a URRF that's more than four times more than what is usually achieved.

The 'fast' IPS DO introduce significant phase. You see this when you cascode the IPS. Also when you go from a single device IPS (the simplest possible CFA) to a LTP.

Certainly some, no dispute there.
The solution to this debate is very simple, build your proposal
The amp itself is simple, the PCB could be easily produced.
You have a donor amp for case and power supply IIRC.
The transistors are obtainable and not expensive, I'll pay for them if you want a contribution.

I would very much like to see an example (either sensible or stupid) of this mythical beast.

Isn't this exactly what most amp oscillation problems are?
They don't usually oscillate at the outer loop URRF or near it.
The outer loop is stable.
Instead some inner loop oscillates at perhaps 10's of MHz.
This can be a loop around even one transistor with stray inductance and capacitance.

Here I have some 'real life' experience.
In most cases, increasing C1/3 usually DOES makes the amp more stable. (various caveats apply. See Cherry's 1982 JAES articl)

Yes, I have found an improvement in Spice simulations but it's smallish.
I think it's small precisely because the extra phase from the IPS is small, so it doesn't matter "too much" where the Return Ratio is moved.
Hence my comment that it doesn't "really" help.

A delay simply introduces phase which is proportional to frequency...

A delay introduces phase but not "simply".
The extra phase is non-minimum

I don't think an OPS can buffer the load to such an extent that the inner loop is not affected...

I think your preferred output load test is more realistic.
JCX use of time delay was a clever way to prove a point of theory.
The impact of the delay is indisputable.
No debate about whether it influenced the inner loop.

You can conclude what you like from that episode. I certainly learnt a lot. But can only conclude that 'pure Cherry' was worse given astx's particular build. I think I can do better with 'pure Cherry' but would need a 'real life' example closer to my ideas on layout, decoupling & grounding to prove it.

Better start to build your prototype then
Until then the best evidence is Toni's build and that didn't favour OIC.

How else do you intend to stabilize it?

Some additional shunt compensation would be possible.
Not my recommendation, just a possibility.

Best wishes
David

 

[Dave Zan]

...
The Hawksford error correction OPS is a nice example. The inner loop uses positive feedback and thus extremely unstable, yet the outer loop is stable.

This is classic Nyquist stuff.
There are several possibilities, some practically irrelevant to audio amps so I have never really had a think about them all.
JCX's professional experience in control systems means he probably can quote chapter and verse and save me some effort.
In the meantime.
1. An inner loop can be unstable in isolation and stabilised by an outer loop.
2. An inner loop can be unstable within a stable outer loop. This possibility seems to be what Richard disputes.
etc.

Best wishes
David.

Best wishes
David

 

[kgrlee]

>'An amp can have an unstable inner loop, this is does not have to make the outer loop unstable.
>Consequently the outer loop stability indicators will look fine.'
>>'I would very much like to see an example (either sensible or stupid) of this mythical beast.'

The Hawksford error correction OPS is a nice example. The inner loop uses positive feedback and thus extremely unstable, yet the outer loop is stable.

The Hawksford error correction may have marginal stability but it is still STABLE. Hence the 'outer/main/important' loop is stable.

Perhaps a better example of marginal stability in inner loops not affecting the 'main' loop is TPC which often shows 10dB or more peaking in the midrange with no effect in the final amp.

But these 2 'inner loops' are still STABLE though with very small margins. (You'll note that my 'inner' Cherry loop has excellent margins even at that evil high frequency.)

Any of the Nyquist gurus want to tweak one of these (or some other amp example) so the 'inner' loop becomes unstable but the final amp still stable ?

As an example of how the 'outer' loop reflects behaviour of 'inner loops', this is Closed Loop response of said evil amp with really wonky loads and stability margins cut to the bone. You'll note there are 3 bumps, each of them reflecting the behaviour of an 'inner' loop.
_________________

The solution to this debate is very simple, build your proposal.
The amp itself is simple, the PCB could be easily produced.
You have a donor amp for case and power supply IIRC.
The transistors are obtainable and not expensive, I'll pay for them if you want a contribution.

I may take you up on your kind offer.

Let me get loadsa beach bum stuff out of the way. The carcases are buried under a pile of speaker junk including 2 large JBL horns in my shed. (I live in said shed) What model JBL horns are yours?

Some additional shunt compensation would be possible.

Evil! Truly EVIL

 

[Dave Zan]

...JBL horns in my shed...What model JBL horns are yours?

I have JBL 2447 and 2453 drivers for the front.
The surrounds are JBL 2432 (extreme overkill to have comp. driver surrounds but I wanted to timbre match.)
The actual horns are not JBL. At the moment I have ad-hoc conical horns while the serious horns are under construction.
Or, more accurately, while I de-clutter the shed to make space in the workshop to finish construction of the horns.
They are somewhere between the JBL 235* and 236* series in size and shape.
So what are your JBL horns?

Best wishes
David

 

[kgrlee]

The horns are JBL 2345s with 2470 compression drivers. Sh*t! That's a lot of money to end up in Cooktown for a system used only for school discos.

Maybe we could do a swap .. but they are heavy beasts.

 

[Dave Zan]

Can we continue this on my... thread?

Doing more work, my initial thought that your 'Tian probe between OPS and the feedback take-offs' is looking at the VAS+OPS+Cherry 'inner loop' seems to be not quite true though it is a useful alternative view...

Why do you now think this?

Best wishes
David

 

[Dave Zan]

I have taken the liberty to respond to some of your PM comments back in this thread, in case anyone else cares about analysis of feedback.

I was quite excited when you suggested that the Tian probe on the output looked at the 'OPS loop' ... especially when some quick sims on a VAS amp, showed equivalent results to having the Tian probe on the VAS input (which is how I look at the 'inner VAS/OPS Cherry loop)

My analysis of the theory says the two placements should be completely equivalent.
But I also did a few simulations, just to check and was admittedly pleased to see that they matched perfectly.
That confirmed not only my analysis but that the Tian probe is correctly implemented, which I had always assumed but never actually checked.

I did some more work on CFAs to try check equivalence of 'Tian on O/P' and 'Tian on 'VAS i/p' looking at the 'inner loop' and didn't quite get that. These were with zillion H inductors isolating the 'inner loop' from IPS.

I think this shows the inaccuracies of the inductor method rather than any problem with my recommendation.
These inaccuracies are precisely why the Tian method is superior.
Unless you have any other problems I think my analysis stands.

Best wishes
David

 

[kgrlee]

I think we are both nit-picking here. What is still lacking is a good way to look at 'main/outer loops' for CFA amps. hint hint

I'm ashamed to say I haven't had time to look at the true implications of the VAS emitter resistor (ala Cherry) and its decoupling (ala Lee)

 

[jcx]

for more head scratching: http://www.diyaudio.com/forums/soli...terview-error-correction-250.html#post1328496

the Tian probe clearly isn't measuring what I'd like - pretty sure the loop gain isn't "flat" at lower frequency - my guess is the EC loop changes sign, becomes positive feedback at low frequency and cancels out the negative feedback in the Tian probe calculation

I've not yet learned the Middlebrook "final solution" extra element theorem GFT despite having Vorperian's book, the Middlebrook CD

 

[kgrlee]

for more head scratching: http://www.diyaudio.com/forums/soli...terview-error-correction-250.html#post1328496

the Tian probe clearly isn't measuring what I'd like - pretty sure the loop gain isn't "flat" at lower frequency - my guess is the EC loop changes sign, becomes positive feedback at low frequency and cancels out the negative feedback in the Tian probe calculation

I've not yet learned the Middlebrook "final solution" extra element theorem GFT despite having Vorperian's book, the Middlebrook CD

jcx, do you still have the *.ASC models for this sim? And the FET models?

I won't be able to do any serious work on this for a while but they are certainly worth investigating further.

My $0.02 is that Cherry always strives to maximise NFB around the evil OPS (as is right & proper) so you will always see huge ULGF around that for his designs.
______________

Did you find any cases of the mythical 'unstable inner loop and stable outer loop'? Gotta be unstable. Marginal stability isn't enough. The best example of this is the huge Loop Gain mid peak with TPC. It's extremely marginal but always ju..ust stable.
______________

Also any good 'clear explaination of measuring T and calculating desensitivity with (unstable) minor loops inside stable negative feedback amplifiers'
______________

I think this shows the inaccuracies of the inductor method rather than any problem with my recommendation.

Mr. Zan, the experiments combined zillion H inductors AND Tian probes. I was trying to isolate the VAS/OPS/Cherry loop from the rest of the amp.

But either way, I think the Tian probe on the output is a valid and useful view of the VAS/OPS/Cherry loop.

But I think its essential, perhaps even more important to have a good loop at the 'outer/main' loop.

 

[wahab]

My $0.02 is that Cherry always strives to maximise NFB around the evil OPS (as is right & proper) so you will always see huge ULGF around that for his designs.

Actualy ULGF is relatively low IIRC , i ll have to check
in a design i use as experimentation beast in simulator
of NDFL concept.

Seems that the global feedback loop is frequency limited
such that the input stage is not fed back with the frequency
range at wich phase shift become excessive , that is , gain
margin is increased this way...

I ll have to dig further in Mr Cherry s writings since it s
not a long time ago that i started to give some attention
to what appeared me at first look as a quite complexe
and hardly practical topology but on the simulator i was
surprised that it seemed to work and even very well as far
as linearity is the main concern.

 

[Dave Zan]

I think we ... both nit-pick...

Sometimes apparently minor inconsistencies are a clue to a fundamental issue.
So I want to make sure we have consistency before I post more.
Don't want to spend the time and then have it nit-picked or, worse, incorrect.

...the Tian probe clearly isn't measuring what I'd like - pretty sure the loop gain isn't "flat" at lower frequency...

Tian probe doesn't know what you like, of course, but it's a bit counter-intuitive.
At least, it may be, but it's fairly hard to see.
If not an ASC at least a clearer picture would help.

Did you find any cases of the mythical 'unstable inner loop and stable outer loop'? Gotta be unstable. Marginal stability isn't enough. The best example of this is the huge Loop Gain mid peak with TPC. It's extremely marginal but always ju..ust stable.

Any linear model will have difficulty with actual instability since output will be unlimited. This has made me wonder how best to analyse the problem.

Mr. Zan, the experiments combined zillion H inductors AND Tian probes. I was trying to isolate the VAS/OPS/Cherry loop from the rest of the amp.

I should have written that "I suspect this shows the inaccuracies of the inductor method." Post it up and let's make sure.

But I think its essential, perhaps even more important to have a good loop at the 'outer/main' loop.

OK. I'll post it .

Best wishes
David

 

[MiiB]

I have tried to make e version of the SSA with pure cherry compensation, at high power it shows quite dramatic improvement in distortion figures . Now I prepare a PCB where the compensation scheme can be altered with different stuffing.

 

[kgrlee]

Did you find any cases of the mythical 'unstable inner loop and stable outer loop'? Gotta be unstable. Marginal stability isn't enough. The best example of this is the huge Loop Gain mid peak with TPC. It's extremely marginal but always ju..ust stable.

Any linear model will have difficulty with actual instability since output will be unlimited. This has made me wonder how best to analyse the problem.

The best 'linear' measure is simply to plot Closed Loop response. The curve I show in #248 has wonky loads AND compensation cut to the bone.

The 3 peaks are at UGLF of the 'inner Cherry' loop, ULGF of the 'main/outer' loop and the resonance of the output inductor with the wonky load. The 'inner' & 'outer' loops are on the verge of instability which you can see on their Loop Gains. This is reflected in the Closed Loop gain.

If the 'marginal stabilty' isn't a problem (like the mid peak with TPC) you'll see zilch on the Closed Loop response. But if the stability of the inner loop is evil, you'll see peaking on the Closed Loop response.

If anyone has examples that disprove this, please speak up and post the evidence.
________________

MiiB, have a really good look at the Loop Gain of your amp with Cherry with the Tian probe on the output. It's important that this has good stability margins.

When Guru Zan shows us how to put a Tian probe on the IPS of a CFA, use this too.

Bear in mind that improving the stability of the 'inner VAS/OPS' loop using bigger Cherry caps, may decrease stability of the 'outer/main' loop.

Have provision on your SSA PCB to put 100p to 1n across the 10R VAS resistors.

SSA (and VSSA too) only have 2 stages within the Cherry loop so is probably OK. But I'm a firm believer in Murphy's Law.
___________________

Mr. Zan, I'm excited to hear that you are doing an article for Linear Audio but sad that this beach bum probably can't afford to see it

 

[Dave Zan]

If anyone has examples that disprove this, please speak up and post the evidence.

OK. Next post.

Mr. Zan, I'm excited to hear that you are doing an article for Linear Audio...

Thanks for the enthusiasm.
The first article is not doin' but done and was published in Volume 6.
It's an introduction to "Advanced Amps", essentially that means better than simple Miller compensation.
The second one is under way at the moment for Volume 7.
That looks at TPC, TMC, OIC and the like.
I have plans for another for Volume 8 on how to analyse feedback and simulate with Middlebrook and Tian probes.
Still need to work out some LTSpice details.

Just so there's no confusion, is this the CFA you want to analyse the outer loop?