Re: Re: Re: MOSFETs as drivers
Hi Glen,
Why not use an 'uncrippled' VAS and get ~70ppb?
BTW, a 100 Ohm gate stopper is quit low for the p-channel device. As the capacitances of the n-channel device are about 2.2 times lower, the gate stopper of this part has to be 2.2 times higher.
Regarding the RC to ground, my simulator tells me it's of little help. Whether this is true or not, I've to find out in real life (and reserve some real estate on the PCB for these components)
I'm still busy with version 2 of the PMP amp, including protection circuitry for the output devices. A hell of job to get that thing really stable.
Cheers Edmond.
G.Kleinschmidt said:Also, now slightly off topic
Shown below is an almost finished drawing of the input stage circuit board. With the compensation optimised for a 1MHz unity loop gain frequency, the front end simulates ~700ppb THD-20 driving 80Vp-p with an ideal output stage, and passes a 500kHz full amplitude squarewave as shown below
BTW, in your pretty PMP amp I notice that you use 220 ohm / 100 ohm gate stoppers for the 2SK1530 / 2SJ201. How come not the lower value gate stopper with the RC to ground?
Cheers,
Glen
Hi Glen,
Why not use an 'uncrippled' VAS and get ~70ppb?
BTW, a 100 Ohm gate stopper is quit low for the p-channel device. As the capacitances of the n-channel device are about 2.2 times lower, the gate stopper of this part has to be 2.2 times higher.
Regarding the RC to ground, my simulator tells me it's of little help. Whether this is true or not, I've to find out in real life (and reserve some real estate on the PCB for these components)
I'm still busy with version 2 of the PMP amp, including protection circuitry for the output devices. A hell of job to get that thing really stable.
Cheers Edmond.
Re: Re: Re: Re: MOSFETs as drivers
Just think of a simplified mosfet driver. You have a bias generator providing a fixed voltage (Vbias) between the gates of the two complementary MOSFETs (Q1 and Q2). There is a voltage developed across a biasing resistor connected between the sources. The voltage is equal to Vbias-(VgsQ1+VgsQ2).
For bipolar OPS, this voltage will be equal to about 1.4V.
Now what happens when one MOSFET conducts high Id for class AB drive of the output devices?
Its Vgs increases, so, by the above formula, the biasing voltage between the sources goes down. If Vgs of one MOSFET rises too high, the other will be cut off.
No, I just wan't to get this one finished first. Shed/workshop renovations are the current hold up (been demolishing and building for nearly 6 years now, will soon come to an end.
OK. Good luck with the PMP. I think I will pass on the MOSFET driver idea now, due to the AB driver operation at high currents forced by the low MOSFET transconductance and rise in Vgs.
This makes MOSFET's less than ideal for this application, IMO.
Cheers,
Glen
AndrewT said:
Just think of a simplified mosfet driver. You have a bias generator providing a fixed voltage (Vbias) between the gates of the two complementary MOSFETs (Q1 and Q2). There is a voltage developed across a biasing resistor connected between the sources. The voltage is equal to Vbias-(VgsQ1+VgsQ2).
For bipolar OPS, this voltage will be equal to about 1.4V.
Now what happens when one MOSFET conducts high Id for class AB drive of the output devices?
Its Vgs increases, so, by the above formula, the biasing voltage between the sources goes down. If Vgs of one MOSFET rises too high, the other will be cut off.
jacco vermeulen said:
No, I just wan't to get this one finished first. Shed/workshop renovations are the current hold up (been demolishing and building for nearly 6 years now, will soon come to an end.
Edmond Stuart said:
Hi Glen,
Why not use an 'uncrippled' VAS and get ~70ppb?
BTW, a 100 Ohm gate stopper is quit low for the p-channel device. As the capacitances of the n-channel device are about 2.2 times lower, the gate stopper of this part has to be 2.2 times higher.
Regarding the RC to ground, my simulator tells me it's of little help. Whether this is true or not, I've to find out in real life (and reserve some real estate on the PCB for these components)
I'm still busy with version 2 of the PMP amp, including protection circuitry for the output devices. A hell of job to get that thing really stable.
Cheers Edmond.
OK. Good luck with the PMP. I think I will pass on the MOSFET driver idea now, due to the AB driver operation at high currents forced by the low MOSFET transconductance and rise in Vgs.
This makes MOSFET's less than ideal for this application, IMO.
Cheers,
Glen
Leach looks in detail at the output currents of a BJT driver stage.G.Kleinschmidt said:
He too suggests that because the driver never actually goes "off" that it is ClassA.
But, unless your BJT is different, then a constant current through the non operational half of the complementary drivers is not ClassA it is ClassAB with a bias current through the other device.
Please explain why your BJT driver is better than FET in avoiding the ClassAB operation.
AndrewT said:
Great, a semantic argument. I only referred to the BJT driver operation as “class A” in so far as neither device is ever cut-off. These terms aren’t applicable to driver conduction as they are to output device conduction anyway, but I thought I gave enough of an explanation of the circuit operation in my posts to make that clear.
You can surely call it “ClassAB with a bias current through the other device” if you think that is a more accurate description.
AndrewT said:
I have, three times already. The rise in Vgs of one MOSFET conducting heavy Id cuts the other off.
OK.... the quest for the perfect driver stage continues with unexpected results.......
I really haven’t got time to analyse the circuit operation now, but a quick sim revels that, under fast slewing conditions, a BJT driver suffers from cut-off operation also, even so the the MOSFETs did it cleaner and more abruptly - particularly so due to the rise of Vgs of one MOSFET pulling up the bias source and switching the other one off.
So, it is looking like there is more than one mechanism at play here, causing device cut off, and MOSFET drivers may very well not be out of the race yet.
If anyone else finds this topic sufficiently interesting to investigate further than what I have so far, the basic LTspice *.asc file for the monster 20 BJT pair output stage is attached. I'd appreciate any feedback.
Andy C's RET models are used.
I really haven’t got time to analyse the circuit operation now, but a quick sim revels that, under fast slewing conditions, a BJT driver suffers from cut-off operation also, even so the the MOSFETs did it cleaner and more abruptly - particularly so due to the rise of Vgs of one MOSFET pulling up the bias source and switching the other one off.
So, it is looking like there is more than one mechanism at play here, causing device cut off, and MOSFET drivers may very well not be out of the race yet.
If anyone else finds this topic sufficiently interesting to investigate further than what I have so far, the basic LTspice *.asc file for the monster 20 BJT pair output stage is attached. I'd appreciate any feedback.
Andy C's RET models are used.
Attached it the results of the quick sim. The green trace is the output waveform, the OPS being driven with a 80Vp-p squarewave slewing at 80V/us.
The red and blue traces are the collector currents for each driver transistor. As can be seen, during the positive and negative excursions of the squarewave, the driver transistors are being alternately cut-off.
Without putting too much though into the circuit operation before finishing this post and taking my schnitzels of the stove, I tentatively put the problem down to the competing NPN and PNP output transistor base currents being drawn through the 5 ohm biasing resistor between the driver transistor bases.
Cheers,
Glen
The red and blue traces are the collector currents for each driver transistor. As can be seen, during the positive and negative excursions of the squarewave, the driver transistors are being alternately cut-off.
Without putting too much though into the circuit operation before finishing this post and taking my schnitzels of the stove, I tentatively put the problem down to the competing NPN and PNP output transistor base currents being drawn through the 5 ohm biasing resistor between the driver transistor bases.
Cheers,
Glen
Attachments
I am amazed. Here I build, in quantity, an 800W amp into 4 ohms (rated) with J201 and compliment fet drivers, and it seems to be deemed impossible, impracticable, or both. I build amps both with bipolar (cheaper designs) and power fet drivers, almost interchangeable with each other. What is the problem?
john curl said:
Hi John,
I tend to agree with you on this one. Although I have not used MOSFETs to drive bipolars, I see no fundamental problem with it, as long as the driver is properly designed and enough idle bias current is put through the driver to allow adequate current to be pulled out of the bases of the power BJTs at high frequencies. The MOSFET Vgs does increase when driving a heavy BJT load on, but not necessarily enough to turn off the MOSFET on the other side. For example, the J201 needs a Vgs of about 1.7V for a driver idle of 250 mA (appropriate if driving a large number of BJTs) and needs a Vgs of about 2.5V to push 2 Amps, an increase of only 0.8V. When one takes into account that the BJT base voltage-to-output rail voltage will increase from perhaps 0.6V to about 1.0V under heavy current conditions, one sees that there will usually be enough bias spread to keep the other MOSFET on anyway.
Although it is nice to see that both driver MOSFETs remain on during such low-frequency heavy-drive conditions (call it Class A or not), the really important gating thing is that the driver be able to produce enough TURN-OFF current to the group of output BJTs under high-frequency high drive conditions (e.g., high currrent slew rate).
I don't know if you use a speedup capacitor between the sources of your MOSFET drivers or not, but that is also an option in this regard.
The MOSFET drivers may also be less susceptible to SOA failure under extreme drive conditions than BJT drivers. They will also not suffer from Beta droop and ft droop when asked to deliver high currents to BJTs that are suffering from Beta droop and ft droop.
Anyway, I see no fundamental problems using MOSFETs to drive BJTs as long as the numbers are done right, which I am sure you have done.
Cheers,
Bob
Right. I'm just working through the best options and analysing the pro's and con's of both BJT and MOSFET drivers. I put my results up here to further discussion on the topic, but as usual it just raises the usual dismissive objections.
WRT to the rise in Vgs cutting the other off, I agree that if a MOSFET with a sufficiently high transconductance is used and the peak current demands are not too great, then it should not occur. We can of course pick hypothetical operating figures to prove that this is the case.
However, in my sims I was using Lateral Mosfets which exhibit a much larger rise in Vgs for a given rise in Id and my peak drive currents are a lot greater than 2.5A. My front end slews approximately 200V/us. Here the peak current well exceeds 2.5A.
Under these conditions, the rise in Vgs does indeed force cut-off operation of the other device. Vertical MOSFETs would be a better option here and I would have run a sim by now if I could stop LTspice from continually crashing each time I try to run the VMOS models Edmond sent me.
Whether or not the forced cut-off of the MOSFET driver under adverse slewing conditions due to the rise in Vgs really matters is another matter for debate, but it is actually nice to have a thorough understanding of the driver circuit operation and understand what is going on – and the mechanism is something to factor into the design and device selection. At least with a BJT driver it is one mechanism one doesn’t have to worry about.
Now what would be really interesting is if someone could actually put forward some ideas further to the LTspice sim file I have provided towards designing a very high current driver, either bipolar or MOSFET that doesn’t cut-off under fast slewing conditions.
If one runs that *.asc file provided in by second to last post, one can see for themselves that a speed up capacitor between the driver emitter/source leads does next to nothing to improve the situation at these drive currents, the only simple fix being to run an impractically high driver bias current (amps).
WRT to the rise in Vgs cutting the other off, I agree that if a MOSFET with a sufficiently high transconductance is used and the peak current demands are not too great, then it should not occur. We can of course pick hypothetical operating figures to prove that this is the case.
However, in my sims I was using Lateral Mosfets which exhibit a much larger rise in Vgs for a given rise in Id and my peak drive currents are a lot greater than 2.5A. My front end slews approximately 200V/us. Here the peak current well exceeds 2.5A.
Under these conditions, the rise in Vgs does indeed force cut-off operation of the other device. Vertical MOSFETs would be a better option here and I would have run a sim by now if I could stop LTspice from continually crashing each time I try to run the VMOS models Edmond sent me.
Whether or not the forced cut-off of the MOSFET driver under adverse slewing conditions due to the rise in Vgs really matters is another matter for debate, but it is actually nice to have a thorough understanding of the driver circuit operation and understand what is going on – and the mechanism is something to factor into the design and device selection. At least with a BJT driver it is one mechanism one doesn’t have to worry about.
Now what would be really interesting is if someone could actually put forward some ideas further to the LTspice sim file I have provided towards designing a very high current driver, either bipolar or MOSFET that doesn’t cut-off under fast slewing conditions.
If one runs that *.asc file provided in by second to last post, one can see for themselves that a speed up capacitor between the driver emitter/source leads does next to nothing to improve the situation at these drive currents, the only simple fix being to run an impractically high driver bias current (amps).
G.Kleinschmidt said:
Hi Glen,
It is not true that one does not have to worry about cutoff of a BJT driver on the side going through turn-off.
While this usually is not a problem under low-frequency conditions, it is one of the defining problems under high-frequency, high-level conditions, whether the output stage is a MOSFET or a BJT. Having adequate ability to suck charge out of the output device(s) that is turning off is critical. In most cases, this will be the defining criteria. If you put enough standing current in the driver to always have enough current to turn off quickly enough the output devices, the problem you mention will not usually happen.
This issue is usually a function of the rate of change of the output current, rather than the output voltage. It is usually worse for BJT's.
It is true that YMMV in the use of the speedup capacitor.
Cheers,
Bob
Bob Cordell said:
Yes, I clearly confirmed that the BJT drivers suffer from cut off also in posts 2811 and 2812. It is the rise in Vgs of a low transconductance MOSFET that I said is one mechanism contributing to device cut off that one doesn't have to worry about when using BJT drivers.
Also, as stated in my last post, I agree that passing a large enough standing current in the driver solves the cut off problem (my LTspice attached sim demonstrates this - post 2811).
Just run it with the 5 ohm driver biasing resistor reduced in value to an ohm or less to put the bias current at ~1.5A.
Then cut off is avoided at 80V/us slewing, but a ~1.5A driver bias is totally impractical, and it is still not good enough for 200V/uS slewing.