This Video is part of a series that covers all this in detail. Talking widely about the Impedance (among other things) PDN of your PCB (Power Delivery Network). These videos may help in your quest. They refer to a specific set of instruments and a plugin for altium, but a rich source of information nonetheless. This first 3 part video series on decoupling
and this one more specifically covering via placement for decoupling.
and this one more specifically covering via placement for decoupling.
What exactly is it you want to measure when the circuit it powered up? Do you want to perturb the power distribution system at some point and observe the time-domain response? Do you want to introduce some test signal into the power system while measuring steady state dac distortion? Something else?
If you watch the above vids, of all of them (they are about an hour each iirc) maybe focus on the second vid, which is actually part 3, I didnt post in order it seems. That one is focused on measuring and fixing layouts and decoupling networks. I recommend playing back at higher speed than normal if you can, as he does speak a bit slowly. there will be much you know already, as its fairly comprehensive; but there is much to learn from them; or at least I did.
@Markw4 :
A very good question, Mark. Considering it yesterday I think the sort of "meta"-purpose would be "to unravel the relevant characteristics of the PDN that affect the sound of the DAC/ADC in question." However, from a practical standpoint, that may not be so simple ... ?
Incidentally, yesterday I happened to focus on the second of the videos suggested by InspectorGadget and I think using a VNA (here performed by Florian Hämmerle of Omicron Labs) to investigate what happens on the PDN line while it is powered up (but maybe in a non-active way, i.e. no data & no clock) would give relevant information about impedance levels of the PDN that includes the non-active-state impedance of the DAC/ADC power inputs ... Does that make sense, and do you think it would provide real & useful information?
Additionally, I imagine looking at the PDN with an FFT and a scope so as to see any power "pins" and ringing issues that may be present. Does this combination (VNA, FFT & scope) sound useful and sufficient in your experience - or do you have other approaches/ideas? I'd appreciate your feedback as I reckon you have been doing this for a while ...
@Bonsai : Thanks for the suggestion on nextpcb ... I'll check it out
@InspectorGadget : Thank you also for the links to Robert Feranec's videos .. I actually am familiar with them and find many of them to be quite instructive - although I have not yet tried to play them at a higher speed 
.. And, as I wrote above, I actually happened (before reading your #44 post) to focus on the second of the videos and saw Florian's impedance measurements. I think this could be very useful - although 
- it would be great if it was possible to simulate these things beforehand so measurements were not that needed ...
To this end: Any of you have tried to measure all the components used in one of your PDNs beforehand e.g. with a VNA - and then verifying that things were as e.g. simulated in LTSpice - following soldering the components into the board? ...
@MarcelvdG : Well, anyway thanks for considering! ...
Eventually what really matters I suppose is how the overall design ends up sounding - with this as an aim just hoping to tie together simulation & measurements.
Cheers & have a good day ...
Jesper
A very good question, Mark. Considering it yesterday I think the sort of "meta"-purpose would be "to unravel the relevant characteristics of the PDN that affect the sound of the DAC/ADC in question." However, from a practical standpoint, that may not be so simple ... ?
Incidentally, yesterday I happened to focus on the second of the videos suggested by InspectorGadget and I think using a VNA (here performed by Florian Hämmerle of Omicron Labs) to investigate what happens on the PDN line while it is powered up (but maybe in a non-active way, i.e. no data & no clock) would give relevant information about impedance levels of the PDN that includes the non-active-state impedance of the DAC/ADC power inputs ... Does that make sense, and do you think it would provide real & useful information?
Additionally, I imagine looking at the PDN with an FFT and a scope so as to see any power "pins" and ringing issues that may be present. Does this combination (VNA, FFT & scope) sound useful and sufficient in your experience - or do you have other approaches/ideas? I'd appreciate your feedback as I reckon you have been doing this for a while ...
@Bonsai : Thanks for the suggestion on nextpcb ... I'll check it out
@InspectorGadget : Thank you also for the links to Robert Feranec's videos
.. I actually am familiar with them and find many of them to be quite instructive - although I have not yet tried to play them at a higher speed .. And, as I wrote above, I actually happened (before reading your #44 post) to focus on the second of the videos and saw Florian's impedance measurements. I think this could be very useful - although - it would be great if it was possible to simulate these things beforehand so measurements were not that needed ...To this end: Any of you have tried to measure all the components used in one of your PDNs beforehand e.g. with a VNA - and then verifying that things were as e.g. simulated in LTSpice - following soldering the components into the board? ...
@MarcelvdG : Well, anyway thanks for considering! ...
Eventually what really matters I suppose is how the overall design ends up sounding - with this as an aim just hoping to tie together simulation & measurements.
Cheers & have a good day ...
Jesper
You could conduct a PDN test two ways I can think of off the top of my head:-@Markw4 :
A very good question, Mark. Considering it yesterday I think the sort of "meta"-purpose would be "to unravel the relevant characteristics of the PDN that affect the sound of the DAC/ADC in question." However, from a practical standpoint, that may not be so simple ... ?
Incidentally, yesterday I happened to focus on the second of the videos suggested by InspectorGadget and I think using a VNA (here performed by Florian Hämmerle of Omicron Labs) to investigate what happens on the PDN line while it is powered up (but maybe in a non-active way, i.e. no data & no clock) would give relevant information about impedance levels of the PDN that includes the non-active-state impedance of the DAC/ADC power inputs ... Does that make sense, and do you think it would provide real & useful information?
Additionally, I imagine looking at the PDN with an FFT and a scope so as to see any power "pins" and ringing issues that may be present. Does this combination (VNA, FFT & scope) sound useful and sufficient in your experience - or do you have other approaches/ideas? I'd appreciate your feedback as I reckon you have been doing this for a while ...
@Bonsai : Thanks for the suggestion on nextpcb ... I'll check it out
@InspectorGadget : Thank you also for the links to Robert Feranec's videos
To this end: Any of you have tried to measure all the components used in one of your PDNs beforehand e.g. with a VNA - and then verifying that things were as e.g. simulated in LTSpice - following soldering the components into the board? ...
@MarcelvdG : Well, anyway thanks for considering! ...
Eventually what really matters I suppose is how the overall design ends up sounding - with this as an aim just hoping to tie together simulation & measurements.
Cheers & have a good day ...
Jesper
1. Get the DAC to switch between 0 output and full scale ie square wave output (or whatever output signal generates the largest supply current changes into the DAC). You’d have to select f for say 3-5 kHz so you get a few harmonics in the audio BW. Then monitor the supply rails to look for ringing etc
2. Run the DAC and get it to output a clean sine wave while monitoring with an analyser. Ideally, you should get harmonics down on the fundamental something better than -110dB FS. Then modulate the supply voltage - you will only need to do this by a few 10’s of mV by using say a mosfet + load resistor across the supply rail switched from a pulse source. You will get a spray of harmonics on the analyser and can then investigate decoupling/filtering to reduce the level. Other options are a two tone IMD test or some of the newer ‘comb’ output stimulus’ that will simultaneously exercise the DAC<> PSU system at multiple frequencies.
In this later test, you could start with no decoupling and then see how it improves as you add the decoupling (you’d have to have the locations already on the PCB).
Kendall Caster-Perry did an investigation in to decoupling etc a few years ago. Here is a link to one of the articles
https://www.idc-online.com/technical_references/pdfs/instrumentation/More On Decoupling.pdf
It might be an idea to find all them (I believe there were 4 or 6 parts to the series) because they do provide some good insight into this stuff.
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May depend in part on what you mean when you say "...that may not be so simple." What may not be so simple? Measuring PDN characteristics at DAC/ADC power pins more or less in isolation, determining to what extent PDN design affects the 'sound' of the DAC/ADC in question, or maybe something else?
IME trying to understand the various things that affect the 'sound' of a DAC is a bit complicated. First thing is how to avoid the rest of the reproduction system from masking or skewing the perceptual process of judging the sound of the DAC/ADC alone. There is also the issue of calibrating whoever will be judging the sound. Then focusing in on the DAC itself, IME it turns out that the PDN for the digital portion is one of the least sensitive things to optimize. At least in the case of DAC chips, the manufacturer's recommendations or eval board design choices for that are often fine.
What most dac builders/modders I have interreacted with seem to find is that output stage and the AVCC/Vref PDN design have the biggest effect on sound. Clocking and rise-times and or relative timing of digital input signals have more subtle effects. To what extent they may be audible depends a lot on the output stage design (including its PDN), and the reference voltage PDN.
Stray coupling of RF also can make an audible difference. Having a USB board EMI interacting with DAC chip EMI radiation and DAC chip EMI ingress sensitivity can be an audible problem. Separating circuitry that can interact in a way that can affect sound can be pretty simple so long as one remembers to think about it.
The more layers of steady state and dynamic distortions and noise that get peeled away make lesser and lesser problems more audible as there is less masking of slight imperfections.
Anyway, I think you can see where this is going. Its hard for me to see how the general problem of DAC/ADC PDN design possibly affecting sound can be evaluated in isolation, particularly if its one of the first things one attempts to tackle. Of course AVCC/Vref PDN is an exception as already mentioned.
@gentlevoice ha!! right, yes it doesnt surprise me youve seen his stuff; although I dont see him linked here much, perhaps because he doesnt relate anything to lower frequency/audio, so you have to make that link yourself.
Yes, I had planned to undertake something like example 2 by @Bonsai with this series of boards im undertaking at the moment. With all the pricing increases and lack of availability I had to prioritise what would actually get my dacs done first ... hell, getting it done at all the way things are going. I had planned on doing a series of test builds first with more simple dacs and power supplies.
No, I have not attempted to match and contrast simulation with reality as yet. I dont have the spice skillset for a decent simulation that would be telling enough to trust that much and honestly I wear too many hats as it is at the moment. For now its basic sim, plus build/measure/build/measure.
Yes, I had planned to undertake something like example 2 by @Bonsai with this series of boards im undertaking at the moment. With all the pricing increases and lack of availability I had to prioritise what would actually get my dacs done first ... hell, getting it done at all the way things are going. I had planned on doing a series of test builds first with more simple dacs and power supplies.
No, I have not attempted to match and contrast simulation with reality as yet. I dont have the spice skillset for a decent simulation that would be telling enough to trust that much and honestly I wear too many hats as it is at the moment. For now its basic sim, plus build/measure/build/measure.
@Bonsai ... Thanks again for you feedback & suggestions. I think I will try out your suggestions above in #47 and see if I can make a set up that allows for measurement & listening at the same time. Could be interesting if it were possible to improve the associations between simulation - measurements - sound quality.
I actually think I am familiar with Kendall Castor-Perry's articles - I remember reading something with the "format" and scope that I can see his articles have, however, if I am it would be years back that I read them. Will just consider them again .. thanks for the suggestion!
@Markw4 ... Thank you also for your fine feedback. While reading your feedback as a whole I suppose this sentence of yours is a key one:
This also is my experience, although I have observed some quite clear SQ changes from altering just the decoupling capacitor make (brand), no capacitance etc. difference, at the digital VDD on a PCM1794. No measurable differences but the sound changed audibly in the upper frequencies (air, fizziness reduction).
This one made me smile:
... Oh, yes ... I don't know if this is also an English "proverb" but in Danish there's a saying going sort of like this: "Life would be boring if we were all alike" ... Which I reckon is not a risk with the human perceptual systems - hearing included. Essentially never identical ...
@InspectorGadget ... Hmmm ... sounds as if you have a lot going for the time being. Fortunately I am not (yet) in the market with an actual device so I have only been peripherally affected by the electronic components supply shortage. Yet, I can imagine that it is no fun maybe having to re-design something that is actually good/working/appropriate because some or more components are intermittently unobtainable. Hope you make it through in a feasible way
I think I will rest my case for now and evaluate your feedbacks, read-up on what is inspiring/needed, and then continue my DAC build. Thank you all for so many fine inputs -
-& should somebody else feel inclined to continue the thread, indeed please feel welcome ...
Cheers,
Jesper
I actually think I am familiar with Kendall Castor-Perry's articles - I remember reading something with the "format" and scope that I can see his articles have, however, if I am it would be years back that I read them. Will just consider them again .. thanks for the suggestion!
@Markw4 ... Thank you also for your fine feedback. While reading your feedback as a whole I suppose this sentence of yours is a key one:
This also is my experience, although I have observed some quite clear SQ changes from altering just the decoupling capacitor make (brand), no capacitance etc. difference, at the digital VDD on a PCM1794. No measurable differences but the sound changed audibly in the upper frequencies (air, fizziness reduction).
This one made me smile:
... Oh, yes ... I don't know if this is also an English "proverb" but in Danish there's a saying going sort of like this: "Life would be boring if we were all alike" ... Which I reckon is not a risk with the human perceptual systems - hearing included. Essentially never identical ...@InspectorGadget ... Hmmm ... sounds as if you have a lot going for the time being. Fortunately I am not (yet) in the market with an actual device so I have only been peripherally affected by the electronic components supply shortage. Yet, I can imagine that it is no fun maybe having to re-design something that is actually good/working/appropriate because some or more components are intermittently unobtainable. Hope you make it through in a feasible way
I think I will rest my case for now and evaluate your feedbacks, read-up on what is inspiring/needed, and then continue my DAC build. Thank you all for so many fine inputs -
-& should somebody else feel inclined to continue the thread, indeed please feel welcome ...Cheers,
Jesper
I would think one would have to model the plane as densely populated 2-dimensional grid to better reflect the distributed character. The end elements along the edges probably should have different LCR than more central elements but if we restrict the hookup points to central regions of the plane capacitor then I think it would not make much of a difference in a, say, 20x20 grid.
Then again, looking at this resource it seems sufficient to model a plane capacitor as single lumped element being purely capacitive up to several 100 MHz. Later they add the stiching capacitors simply as parallel elements to reduce impedance below 10MHz and look at simulated and measured results, from a point-of-load view.
Hi KSTR ... Thanks for the link. Looks like an approachable method if one has access to a VNA or somehow can find simulation data on the components used.
BTW, regarding the VNA that I linked to above: It seems that most all (nano)VNAs variants (according to Joe Smith testing the LiteVNA on youtube), including the one I linked to above, output a square wave test signal with a couple of ns rise/fall time so they may not be that feasible for testing audio amplifier or, well, much else audio. An exception - according to a seller eleshop.eu - would be the LibreVNA which should output sine waves for testing. Unfortunately the spectrum analyzer part appears to be a minimum implementation, so ... on the other hand it is a two port device so it should be able to go down into the milliohm impedance region (which - if I understand Istvan Novak correctly in this slide show:
http://electrical-integrity.com/Paper_download_files/DC99_ProbesAndSetup_slides.pdf
is not the case with a one-port device.
Anyway, I am not sure there's interest in this here so I just wanted to update on the square wave signal - which I was not aware of until yesterday.
Cheers,
Jesper
BTW, regarding the VNA that I linked to above: It seems that most all (nano)VNAs variants (according to Joe Smith testing the LiteVNA on youtube), including the one I linked to above, output a square wave test signal with a couple of ns rise/fall time so they may not be that feasible for testing audio amplifier or, well, much else audio. An exception - according to a seller eleshop.eu - would be the LibreVNA which should output sine waves for testing. Unfortunately the spectrum analyzer part appears to be a minimum implementation, so ... on the other hand it is a two port device so it should be able to go down into the milliohm impedance region (which - if I understand Istvan Novak correctly in this slide show:
http://electrical-integrity.com/Paper_download_files/DC99_ProbesAndSetup_slides.pdf
is not the case with a one-port device.
Anyway, I am not sure there's interest in this here so I just wanted to update on the square wave signal - which I was not aware of until yesterday.
Cheers,
Jesper
Hi Jesper,
I've only used two-port shunt measurements and my analyzer is classic sine wave. I usually got good results down to some 10mOhm noise floor up to 100Mhz. Setup with my analyzer is not straight-forward so I always use a known low-inductance 0.1Ohm test resistor (SMT) to calibrate the display level to dB(Ohm). Full normalization often fails on my machine as too many parameters have drifted, therefore I usually have to do visual compare to the 0.1R Reference trace but for qualitative inspection it more than good enough and any anomalies are clearly seen.
The libreVNA looks quite nice spec-wise and IMHO should be suited to S21 point-of-load supply impedance measurements (preferably on a test board with no ICs populated). The inputs are not protected so one would have to be extra careful when trying to measure in live circuits.
Hi all,
I just wanted to share this article which IMHO is very good at approaching the challenges of PCB & component resonances from a practical perspective. It appears that it is almost possible to achieve a non-resonant PCB layering - it "just" takes very thin dielectrics (pre-pregs) of a thickness comparable to the skin-effect-depth of the relevant frequencies (i.e. very thin).
https://cecas.clemson.edu/cvel/pdf/ADVP02-424.pdf
Cheers,
Jesper
I just wanted to share this article which IMHO is very good at approaching the challenges of PCB & component resonances from a practical perspective. It appears that it is almost possible to achieve a non-resonant PCB layering - it "just" takes very thin dielectrics (pre-pregs) of a thickness comparable to the skin-effect-depth of the relevant frequencies (i.e. very thin).
https://cecas.clemson.edu/cvel/pdf/ADVP02-424.pdf
Cheers,
Jesper
Hi again,
I know this is slightly off topic but yesterday I happened to stumble upon this capacitor:
https://www.kemet.com/en/us/capacitors/ceramic/product/T520T107M006APE055.html
No idea what its distortion level is, nor what it may sound like - but look at the impedance curve - virtually straight from 100 kHz to 20 MHz. I don't remember having seen anything like this before
Unfortunately, it appears to be "unobtainable" ...
"Cheers",
Jesper
I know this is slightly off topic but yesterday I happened to stumble upon this capacitor:
https://www.kemet.com/en/us/capacitors/ceramic/product/T520T107M006APE055.html
No idea what its distortion level is, nor what it may sound like - but look at the impedance curve - virtually straight from 100 kHz to 20 MHz. I don't remember having seen anything like this before
Unfortunately, it appears to be "unobtainable" ...
"Cheers",
Jesper
Hi again,
Sounds interesting - I for one would be quite interested in hearing about how they measure. However, as I can see it is a tantalum type and - although it is some years back - Cyril Bateman in his capacitor measurements found that tantalum capacitors distorted hugely, so ... ?? Can I ask you where you use them?
Cheers, Jesper
Sounds interesting - I for one would be quite interested in hearing about how they measure. However, as I can see it is a tantalum type and - although it is some years back - Cyril Bateman in his capacitor measurements found that tantalum capacitors distorted hugely, so ... ?? Can I ask you where you use them?
Cheers, Jesper